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  1. May 18, 2017
  2. May 15, 2017
  3. May 12, 2017
    • gabrielC's avatar
      bug fixes from Fujitsu (bug 37) · ad6d0ac5
      gabrielC authored
      ----------------------------------------------------------
      bug 37
      
      Ttile:
      Sending side is as follows.
      rar[3] = (((mcs&0x7)<<5)) | ((TPC&7)<<2) | ((ULdelay&1)<<1) | (cqireq&1);
      So, 2 bit shift looks correct.
      
      Bug Location:
      ulsch->harq_processes[harq_pid]->TPC = (rar[3]>>3)&7;//rar->TPC;
      ----------------------------------------------------------
      ad6d0ac5
  4. May 03, 2017
  5. May 02, 2017
  6. Apr 26, 2017
  7. Apr 25, 2017
  8. Apr 24, 2017
  9. Apr 21, 2017
  10. Apr 14, 2017
    • Cedric Roux's avatar
      hotfix: fix TDD 20MHz DCI0 structure · 20a2bfd1
      Cedric Roux authored
      In 20MHz the UE didn't do any uplink granted by DCI0.
      It was replying to RAR, so uplink decoding was okay.
      
      Turns out the DCI0 structure for TDD was wrong.
      20a2bfd1
  11. Apr 12, 2017
  12. Apr 04, 2017
  13. Mar 27, 2017
  14. Mar 24, 2017
  15. Mar 23, 2017
    • Cedric Roux's avatar
      RRC Rel14 · 4fcb6272
      Cedric Roux authored
      - import RRC ASN.1 defintions from the specifications
        (file openair2/RRC/LITE/MESSAGES/asn1c/ASN1_files/RRC-e10.asn)
        contrary to rel8/10, all modules have been imported, maybe it's too much
        to refine in case of problems
      - deal with rel14 in fix_asn1
      - all code that was for Rel10 is now for Rel10/Rel14
      - some incompatible changes (mostly in naming) were resolved in favor
        of rel14, see in openair2/RRC/LITE/defs.h
      - unsure about the rlc layer, some arrays have changed (values appended),
        I only changed the definition and in tests in the code, I changed
        the index limit, maybe it's not enough
      
      Rel14 is the default compilation mode.
      4fcb6272
  16. Mar 21, 2017
  17. Mar 20, 2017
    • Cedric Roux's avatar
      hotfix: LLR was calling qam64_qam16_avx2 instead of qam64_qam64_avx2 · e2350103
      Cedric Roux authored
      Not sure of this one, to be checked by TCL.
      e2350103
    • Cedric Roux's avatar
      bugfix: fix dump_dlsch2 · 1218cc8f
      Cedric Roux authored
      the argument 'coded_bits_per_codeword' has to be an array in
      case of several codewords.
      
      The calling sites have been adapted.
      
      Today, only the first index is used, so calling sites where
      'coded_bits_per_codeword' is an integer pass the address
      of it. It is expected that 'dump_dlsch2' will check in the
      future that there is one or two codewords and only access
      'coded_bits_per_codeword[1]' when it's sure there are
      really two codewords.
      1218cc8f
  18. Mar 17, 2017
  19. Mar 16, 2017
  20. Mar 15, 2017
  21. Mar 14, 2017
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