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  1. Dec 27, 2016
  2. Dec 19, 2016
    • Cedric Roux's avatar
      integration fix: align32 missing (NOT DEFINITIVE!) · 5ebdbf9f
      Cedric Roux authored
      We have a crash:
      
      Program received signal SIGSEGV, Segmentation fault.
      [Switching to Thread 0x7fff7387d700 (LWP 1944)]
      ulsch_decoding (eNB=eNB@entry=0x7fffaf73b010, proc=proc@entry=0x7fffaf73b480,
          UE_id=UE_id@entry=0 '\000',
          control_only_flag=control_only_flag@entry=0 '\000',
          Nbundled=<optimised out>, llr8_flag=<optimised out>)
          at /roux/merge/openairinterface5g/openair1/PHY/LTE_TRANSPORT/ulsch_decoding.c:1450
      1450          *((__m256i *)&ulsch_harq->e[iprime]) = *((__m256i *)&y[j2]);
      
      This commit reduces the apparition of the crash, but does not
      eliminate it completely.
      
      To be fixed after integration.
      5ebdbf9f
  3. Dec 14, 2016
  4. Dec 12, 2016
  5. Dec 08, 2016
  6. Dec 07, 2016
  7. Dec 06, 2016
  8. Dec 05, 2016
  9. Dec 04, 2016
  10. Dec 01, 2016
    • ROBERT Benoit's avatar
      - Problem in DCI NDI : the implementation use 5 HARQ processes, but process 0... · f22e56ee
      ROBERT Benoit authored
       - Problem in DCI NDI : the implementation use 5 HARQ processes, but process 0 NDI never toggled because it was reused on subframe 5 that is not carrying format 1 DCI. Fix -> use 8 harq processes instead of 5.
       - SI scheduled on every subframe 5 (even and odd frames) instead of only on even frames
       - Add DLSCH scheduling on subframe 5 for odd frames
       - change default rballoc from 0x7FFF to 0x1FFFF to support maximum 10MHz throughput
      f22e56ee
  11. Nov 30, 2016
    • Cedric Roux's avatar
      T: update traces · 7adc4703
      Cedric Roux authored
      - add mcs to ENB_PHY_DLSCH_UE_DCI
      - add mcs, round, first_rb, nb_rb, TBS to ENB_PHY_ULSCH_UE_DCI
      7adc4703
  12. Nov 28, 2016
  13. Nov 25, 2016
  14. Nov 24, 2016
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