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OAI-RAN-5G-sheduler_MaxTBS
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MAQ5G-PFC
OAI-RAN-5G-sheduler_MaxTBS
Commits
a5bfd51d
Commit
a5bfd51d
authored
11 years ago
by
ghaddab
Browse files
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git-svn-id:
http://svn.eurecom.fr/openair4G/trunk@4066
818b1a75-f10b-46b9-bf7c-635c3b92a50f
parent
764de0e8
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Changes
2
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2 changed files
targets/ARCH/EXMIMO/DRIVER/eurecom/exmimo_fw.c
+3
-0
3 additions, 0 deletions
targets/ARCH/EXMIMO/DRIVER/eurecom/exmimo_fw.c
targets/ARCH/EXMIMO/DRIVER/eurecom/irq.c
+31
-1
31 additions, 1 deletion
targets/ARCH/EXMIMO/DRIVER/eurecom/irq.c
with
34 additions
and
1 deletion
targets/ARCH/EXMIMO/DRIVER/eurecom/exmimo_fw.c
+
3
−
0
View file @
a5bfd51d
...
...
@@ -245,6 +245,9 @@ int exmimo_firmware_init(int card)
// put DMA pointer to exmimo_pci_interface_bot into LEON register
iowrite32
(
pphys_exmimo_pci_phys
[
card
],
(
bar
[
card
]
+
PCIE_PCIBASEL
)
);
// lower 32bit of address
iowrite32
(
0
,
(
bar
[
card
]
+
PCIE_PCIBASEH
)
);
// higher 32bit of address
if
(
exmimo_pci_kvirt
[
card
].
exmimo_id_ptr
->
board_swrev
==
BOARD_SWREV_CMDREGISTERS
)
iowrite32
(
EXMIMO_CONTROL2_COOKIE
,
bar
[
card
]
+
PCIE_CONTROL2
);
//printk("exmimo_firmware_init(): initializing Leon (EXMIMO_PCIE_INIT)...\n");
exmimo_send_pccmd
(
card
,
EXMIMO_PCIE_INIT
);
...
...
This diff is collapsed.
Click to expand it.
targets/ARCH/EXMIMO/DRIVER/eurecom/irq.c
+
31
−
1
View file @
a5bfd51d
...
...
@@ -45,6 +45,11 @@ irqreturn_t openair_irq_handler(int irq, void *cookie)
if
(
pdev
[
card_id
]
==
cookie
)
break
;
if
(
exmimo_pci_kvirt
[
card_id
].
exmimo_id_ptr
->
board_swrev
==
BOARD_SWREV_LEGACY
)
pcie_control
=
PCIE_CONTROL1
;
else
pcie_control
=
PCIE_CONTROL2
;
//printk("irq hndl called: card_id=%i, irqval=%i\n", card_id, irqval);
// get AHBPCIE interrupt line (bit 7) to determine if IRQ was for us from ExMIMO card, or from a different device
...
...
@@ -55,11 +60,31 @@ irqreturn_t openair_irq_handler(int irq, void *cookie)
//printk("IRQ handler: ctrl0: %08x, ctrl1: %08x, ctrl2: %08x, status: %08x\n", irqval, ioread32(bar[card_id]+PCIE_CONTROL1), ioread32(bar[card_id]+PCIE_CONTROL2), ioread32(bar[card_id]+PCIE_STATUS));
if
(
(
irqval
&
0x80
)
==
0
)
{
// CTRL0.bit7 is no set -> IRQ is not from ExMIMO i.e. not for us
if
(
exmimo_pci_kvirt
[
card_id
].
exmimo_id_ptr
->
board_swrev
==
BOARD_SWREV_CMDREGISTERS
){
if
(
irqcmd
!=
EXMIMO_NOP
&&
irqcmd
!=
EXMIMO_CONTROL2_COOKIE
)
{
if
(
irqcmd
==
GET_FRAME_DONE
)
{
get_frame_done
=
1
;
}
openair_tasklet
.
data
=
card_id
;
tasklet_schedule
(
&
openair_tasklet
);
openair_bh_cnt
++
;
return
IRQ_HANDLED
;
}
else
{
return
IRQ_NONE
;
}
}
else
return
IRQ_NONE
;
}
else
{
if
(
exmimo_pci_kvirt
[
card_id
].
exmimo_id_ptr
->
board_swrev
==
BOARD_SWREV_LEGACY
){
// clear PCIE interrupt (bit 7 of register 0x0)
iowrite32
(
irqval
&
0xffffff7f
,
bar
[
card_id
]
+
PCIE_CONTROL0
);
}
if
(
irqcmd
==
GET_FRAME_DONE
)
{
get_frame_done
=
1
;
...
...
@@ -80,6 +105,11 @@ void openair_do_tasklet (unsigned long card_id)
unsigned
int
pcie_control
=
PCIE_CONTROL2
;
openair_bh_cnt
=
0
;
if
(
exmimo_pci_kvirt
[
card_id
].
exmimo_id_ptr
->
board_swrev
==
BOARD_SWREV_LEGACY
)
pcie_control
=
PCIE_CONTROL1
;
else
pcie_control
=
PCIE_CONTROL2
;
irqcmd
=
ioread32
(
bar
[
card_id
]
+
pcie_control
);
if
(
save_irq_cnt
>
1
)
...
...
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