Merge branch 'nr_initialsync' of...

Merge branch 'nr_initialsync' of https://gitlab.eurecom.fr/oai/openairinterface5g into nr_initialsync

cmake_targets/CMakeLists.txt

@@ -1271,6 +1271,9 @@ set(PHY_SRC_UE
   ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/sss_nr.c
   ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/cic_filter_nr.c
   ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/dmrs_nr.c
+  ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
+  ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_pbch.c
+  ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/
   ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/srs_modulation_nr.c
   ${OPENAIR1_DIR}/PHY/NR_REFSIG/ul_ref_seq_nr.c
   ${OPENAIR1_DIR}/PHY/TOOLS/file_output.c

openair1/PHY/INIT/nr_init_ue.c

@@ -928,3 +928,45 @@ void nr_lte_ue_transport(PHY_VARS_UE *ue,int abstraction_flag) {
   ue->dlsch_MCH[0]  = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_TURBO_ITERATIONS_MBSFN,ue->frame_parms.N_RB_DL,0);
 
 }*/
+
+void phy_init_nr_top(NR_DL_FRAME_PARMS *frame_parms)
+{
+
+  crcTableInit();
+
+  ccodedot11_init();
+  ccodedot11_init_inv();
+
+  ccodelte_init();
+  ccodelte_init_inv();
+
+  //treillis_table_init();
+
+  phy_generate_viterbi_tables();
+  phy_generate_viterbi_tables_lte();
+
+  //init_td8();
+  //init_td16();
+#ifdef __AVX2__
+  //init_td16avx2();
+#endif
+
+  init_context_synchro_nr(frame_parms);
+
+  generate_ul_reference_signal_sequences(SHRT_MAX);
+
+  //lte_sync_time_init(frame_parms);
+
+  //generate_ul_ref_sigs();
+  //generate_ul_ref_sigs_rx();
+
+  //generate_64qam_table();
+  //generate_16qam_table();
+  //generate_RIV_tables();
+
+  //init_unscrambling_lut();
+  //init_scrambling_lut();
+  
+  //set_taus_seed(1328);
+
+}

openair1/PHY/INIT/nr_parms.c

@@ -34,6 +34,131 @@ int nr_init_frame_parms(nfapi_config_request_t* config,
   int Ncp = config->subframe_config.dl_cyclic_prefix_type.value;
   int mu = config->subframe_config.numerology_index_mu.value;
 
+#if DISABLE_LOG_X
+  printf("Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, N_RB, Ncp);
+#else
+  LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, N_RB, Ncp);
+#endif
+
+  if (Ncp == EXTENDED)
+    AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu);
+
+  switch(mu) {
+
+    case NR_MU_0: //15kHz scs
+      frame_parms->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_0];
+      frame_parms->slots_per_subframe = nr_slots_per_subframe[NR_MU_0];
+      break;
+
+    case NR_MU_1: //30kHz scs
+      frame_parms->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_1];
+      frame_parms->slots_per_subframe = nr_slots_per_subframe[NR_MU_1];
+
+      switch(N_RB){
+        case 11:
+        case 24:
+        case 38:
+        case 78:
+        case 51:
+        case 65:
+
+        case 106: //40 MHz
+          if (frame_parms->threequarter_fs) {
+            frame_parms->ofdm_symbol_size = 1536;
+            frame_parms->first_carrier_offset = 900; //1536 - 636
+            frame_parms->nb_prefix_samples0 = 132;
+            frame_parms->nb_prefix_samples = 108;
+          }
+          else {
+            frame_parms->ofdm_symbol_size = 2048;
+            frame_parms->first_carrier_offset = 1412; //2048 - 636
+            frame_parms->nb_prefix_samples0 = 176;
+            frame_parms->nb_prefix_samples = 144;
+          }
+          break;
+
+        case 133:
+        case 162:
+        case 189:
+
+        case 217: //80 MHz
+          if (frame_parms->threequarter_fs) {
+            frame_parms->ofdm_symbol_size = 3072;
+            frame_parms->first_carrier_offset = 1770; //3072 - 1302
+            frame_parms->nb_prefix_samples0 = 264;
+            frame_parms->nb_prefix_samples = 216;
+          }
+          else {
+            frame_parms->ofdm_symbol_size = 4096;
+            frame_parms->first_carrier_offset = 2794; //4096 - 1302
+            frame_parms->nb_prefix_samples0 = 352;
+            frame_parms->nb_prefix_samples = 288;
+          }
+          break;
+
+        case 245:
+        case 273:
+      default:
+        AssertFatal(1==0,"Number of resource blocks %d undefined for mu %d, frame parms = %p\n", N_RB, mu, frame_parms);
+      }
+      break;
+
+    case NR_MU_2: //60kHz scs
+      frame_parms->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_2];
+      frame_parms->slots_per_subframe = nr_slots_per_subframe[NR_MU_2];
+
+      switch(N_RB){ //FR1 bands only
+        case 11:
+        case 18:
+        case 38:
+        case 24:
+        case 31:
+        case 51:
+        case 65:
+        case 79:
+        case 93:
+        case 107:
+        case 121:
+        case 135:
+      default:
+        AssertFatal(1==0,"Number of resource blocks %d undefined for mu %d, frame parms = %p\n", N_RB, mu, frame_parms);
+      }
+      break;
+
+    case NR_MU_3:
+      frame_parms->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_3];
+      frame_parms->slots_per_subframe = nr_slots_per_subframe[NR_MU_3];
+      break;
+
+    case NR_MU_4:
+      frame_parms->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_4];
+      frame_parms->slots_per_subframe = nr_slots_per_subframe[NR_MU_4];
+      break;
+
+  default:
+    AssertFatal(1==0,"Invalid numerology index %d", mu);
+  }
+
+
+  frame_parms->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats
+  frame_parms->samples_per_subframe_wCP = frame_parms->ofdm_symbol_size * frame_parms->symbols_per_slot * frame_parms->slots_per_subframe;
+  frame_parms->samples_per_frame_wCP = 10 * frame_parms->samples_per_subframe_wCP;
+  frame_parms->samples_per_subframe = (frame_parms->samples_per_subframe_wCP + (frame_parms->nb_prefix_samples0 * frame_parms->slots_per_subframe) +
+                                      (frame_parms->nb_prefix_samples * frame_parms->slots_per_subframe * (frame_parms->symbols_per_slot - 1)));
+  frame_parms->samples_per_frame = 10 * frame_parms->samples_per_subframe;
+
+
+  return 0;
+}
+
+int nr_init_frame_parms_ue(nfapi_config_request_t* config,
+                        NR_DL_FRAME_PARMS *frame_parms)
+{
+
+  int N_RB = 106;
+  int Ncp = 0;
+  int mu = 1;
+
 #if DISABLE_LOG_X
   printf("Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, N_RB, Ncp);
 #else
@@ -152,11 +277,23 @@ int nr_init_frame_parms(nfapi_config_request_t* config,
     AssertFatal(1==0,"Invalid numerology index %d", mu);
   }
 
+    frame_parms->nb_prefix_samples0 = 160;
+    frame_parms->nb_prefix_samples = 144;
+    frame_parms->symbols_per_tti = 14;
+    frame_parms->numerology_index = 0;
+    frame_parms->ttis_per_subframe = 1;
+    frame_parms->slots_per_tti = 2; //only slot config 1 is supported     
+
+    frame_parms->ofdm_symbol_size = 2048;
+    frame_parms->samples_per_tti = 30720;
+    frame_parms->samples_per_subframe = 30720 * frame_parms->ttis_per_subframe;
+    frame_parms->first_carrier_offset = 2048-600;
+
   frame_parms->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats
   frame_parms->samples_per_subframe_wCP = frame_parms->ofdm_symbol_size * frame_parms->symbols_per_slot * frame_parms->slots_per_subframe;
   frame_parms->samples_per_frame_wCP = 10 * frame_parms->samples_per_subframe_wCP;
-  frame_parms->samples_per_subframe = frame_parms->samples_per_subframe_wCP + (frame_parms->nb_prefix_samples0 * frame_parms->slots_per_subframe) +
-                                      (frame_parms->nb_prefix_samples * frame_parms->slots_per_subframe * (frame_parms->symbols_per_slot - 1));
+  //frame_parms->samples_per_subframe = (frame_parms->samples_per_subframe_wCP + (frame_parms->nb_prefix_samples0 * frame_parms->slots_per_subframe) +
+  //                                    (frame_parms->nb_prefix_samples * frame_parms->slots_per_subframe * (frame_parms->symbols_per_slot - 1)));
   frame_parms->samples_per_frame = 10 * frame_parms->samples_per_subframe;
 
 

openair1/PHY/INIT/phy_init.h

@@ -375,6 +375,7 @@ void phy_config_request(PHY_Config_t *phy_config);
 int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf);
 void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
 int nr_init_frame_parms(nfapi_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
+int nr_init_frame_parms_ue(nfapi_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
 void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms);
 int phy_init_nr_gNB(PHY_VARS_gNB *gNB, unsigned char is_secondary_gNB, unsigned char abstraction_flag);
 void nr_phy_config_request(PHY_VARS_gNB *gNB);

openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c

+/*
+ * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.
+ * The OpenAirInterface Software Alliance licenses this file to You under
+ * the OAI Public License, Version 1.0  (the "License"); you may not use this file
+ * except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.openairinterface.org/?page_id=698
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *-------------------------------------------------------------------------------
+ * For more information about the OpenAirInterface (OAI) Software Alliance:
+ *      contact@openairinterface.org
+ */
+
+/*! \file PHY/LTE_TRANSPORT/initial_sync.c
+* \brief Routines for initial UE synchronization procedure (PSS,SSS,PBCH and frame format detection)
+* \author R. Knopp, F. Kaltenberger
+* \date 2011
+* \version 0.1
+* \company Eurecom
+* \email: knopp@eurecom.fr,kaltenberger@eurecom.fr
+* \note
+* \warning
+*/
+#include "PHY/types.h"
+#include "PHY/defs_nr_UE.h"
+#include "PHY/phy_extern_nr_ue.h"
+//#include "SCHED/defs.h"
+//#include "SCHED/extern.h"
+//#include "defs.h"
+//#include "extern.h"
+
+
+#include "common_lib.h"
+
+#include "PHY/NR_REFSIG/pss_nr.h"
+#include "PHY/NR_REFSIG/sss_nr.h"
+
+extern openair0_config_t openair0_cfg[];
+static  nfapi_config_request_t config_t;
+static  nfapi_config_request_t* config =&config_t;
+/* forward declarations */
+void set_default_frame_parms_single(nfapi_config_request_t *config, NR_DL_FRAME_PARMS *frame_parms);
+
+//#define DEBUG_INITIAL_SYNCH
+
+int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
+{
+
+  uint8_t l,pbch_decoded,frame_mod4,pbch_tx_ant,dummy;
+  NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
+  char phich_resource[6];
+
+#ifdef DEBUG_INITIAL_SYNCH
+  LOG_I(PHY,"[UE%d] Initial sync: starting PBCH detection (rx_offset %d)\n",ue->Mod_id,
+        ue->rx_offset);
+#endif
+
+  //symbol 1
+  slot_fep_pbch(ue,
+    	   1,
+    	   0,
+    	   ue->rx_offset,
+    	   0,
+    	   1);
+
+  //symbol 2
+  slot_fep_pbch(ue,
+    	   2,
+    	   0,
+    	   ue->rx_offset,
+    	   0,
+    	   1);
+
+  //symbol 3
+  slot_fep_pbch(ue,
+    	   3,
+    	   0,
+    	   ue->rx_offset,
+    	   0,
+    	   1);
+
+  pbch_decoded = 0;
+
+  //for (frame_mod4=0; frame_mod4<4; frame_mod4++) {
+    pbch_tx_ant = nr_rx_pbch(ue,
+						  &ue->proc.proc_rxtx[0],
+                          ue->pbch_vars[0],
+                          frame_parms,
+                          0,
+                          SISO,
+                          ue->high_speed_flag,
+                          frame_mod4);
+
+    if ((pbch_tx_ant>0) && (pbch_tx_ant<=2)) {
+      pbch_decoded = 1;
+//      break;
+    }
+
+  //}
+
+
+  if (pbch_decoded) {
+
+    frame_parms->nb_antenna_ports_eNB = pbch_tx_ant;
+
+    // set initial transmission mode to 1 or 2 depending on number of detected TX antennas
+    //frame_parms->mode1_flag = (pbch_tx_ant==1);
+    // openair_daq_vars.dlsch_transmission_mode = (pbch_tx_ant>1) ? 2 : 1;
+
+
+    // flip byte endian on 24-bits for MIB
+    //    dummy = ue->pbch_vars[0]->decoded_output[0];
+    //    ue->pbch_vars[0]->decoded_output[0] = ue->pbch_vars[0]->decoded_output[2];
+    //    ue->pbch_vars[0]->decoded_output[2] = dummy;
+
+    // now check for Bandwidth of Cell
+    dummy = (ue->pbch_vars[0]->decoded_output[2]>>5)&7;
+
+    switch (dummy) {
+
+    case 0 :
+      frame_parms->N_RB_DL = 6;
+      break;
+
+    case 1 :
+      frame_parms->N_RB_DL = 15;
+      break;
+
+    case 2 :
+      frame_parms->N_RB_DL = 25;
+      break;
+
+    case 3 :
+      frame_parms->N_RB_DL = 50;
+      break;
+
+    case 4 :
+      frame_parms->N_RB_DL = 75;
+      break;
+
+    case 5:
+      frame_parms->N_RB_DL = 100;
+      break;
+
+    default:
+      LOG_E(PHY,"[UE%d] Initial sync: PBCH decoding: Unknown N_RB_DL\n",ue->Mod_id);
+      return -1;
+      break;
+    }
+
+
+
+    for(int i=0; i<RX_NB_TH;i++)
+    {
+        ue->proc.proc_rxtx[i].frame_rx =   (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2;
+        ue->proc.proc_rxtx[i].frame_rx =   (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2;
+
+#ifndef USER_MODE
+        // one frame delay
+        ue->proc.proc_rxtx[i].frame_rx ++;
+#endif
+        ue->proc.proc_rxtx[i].frame_tx = ue->proc.proc_rxtx[0].frame_rx;
+    }
+#ifdef DEBUG_INITIAL_SYNCH
+    LOG_I(PHY,"[UE%d] Initial sync: pbch decoded sucessfully mode1_flag %d, tx_ant %d, frame %d, N_RB_DL %d, phich_duration %d, phich_resource %s!\n",
+          ue->Mod_id,
+          frame_parms->mode1_flag,
+          pbch_tx_ant,
+          ue->proc.proc_rxtx[0].frame_rx,
+          frame_parms->N_RB_DL,
+          frame_parms->phich_config_common.phich_duration,
+          phich_resource);  //frame_parms->phich_config_common.phich_resource);
+#endif
+    return(0);
+  } else {
+    return(-1);
+  }
+
+}
+
+char phich_string[13][4] = {"","1/6","","1/2","","","one","","","","","","two"};
+char duplex_string[2][4] = {"FDD","TDD"};
+char prefix_string[2][9] = {"NORMAL","EXTENDED"};
+
+int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
+{
+
+  int32_t sync_pos, sync_pos2, k_ssb, N_ssb_crb;
+  int32_t metric_fdd_ncp=0;
+  uint8_t phase_fdd_ncp;
+
+  NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
+  int ret=-1;
+  int aarx,rx_power=0;
+  //nfapi_config_request_t* config;
+
+  /*offset parameters to be updated from higher layer */
+  k_ssb =0;
+  N_ssb_crb = 0;
+
+  /*#ifdef OAI_USRP
+  __m128i *rxdata128;
+  #endif*/
+  //  LOG_I(PHY,"**************************************************************\n");
+  // First try FDD normal prefix
+  frame_parms->Ncp=NORMAL;
+  frame_parms->frame_type=FDD;
+  set_default_frame_parms_single(config,frame_parms);
+  nr_init_frame_parms_ue(config,frame_parms);
+  /*
+  write_output("rxdata0.m","rxd0",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
+  exit(-1);
+  */
+
+  /*   Initial synchronisation
+   *
+  *                                 1 radio frame = 10 ms
+  *     <--------------------------------------------------------------------------->
+  *     -----------------------------------------------------------------------------
+  *     |                                 Received UE data buffer                    |
+  *     ----------------------------------------------------------------------------
+  *                     --------------------------
+  *     <-------------->| pss | pbch | sss | pbch |
+  *                     --------------------------
+  *          sync_pos            SS/PBCH block
+  */
+
+  /* process pss search on received buffer */
+  sync_pos = pss_synchro_nr(ue, NO_RATE_CHANGE);
+
+  /* offset is used by sss serach as it is returned from pss search */
+  ue->rx_offset = sync_pos;
+
+  //  write_output("rxdata1.m","rxd1",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
+
+#ifdef DEBUG_INITIAL_SYNCH
+  LOG_I(PHY,"[UE%d] Initial sync : Estimated PSS position %d, Nid2 %d\n", ue->Mod_id, sync_pos,ue->common_vars.eNb_id);
+#endif
+
+  /* check that SSS/PBCH block is continuous inside the received buffer */
+  if (sync_pos < (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->ttis_per_subframe*frame_parms->samples_per_tti - (NB_SYMBOLS_PBCH * frame_parms->ofdm_symbol_size))) {
+
+#ifdef DEBUG_INITIAL_SYNCH
+    LOG_I(PHY,"Calling sss detection (normal CP)\n");
+#endif
+
+    rx_sss_nr(ue,&metric_fdd_ncp,&phase_fdd_ncp);
+
+    set_default_frame_parms_single(config,&ue->frame_parms);
+    nr_init_frame_parms_ue(config,&ue->frame_parms);
+    //generate_dmrs_pbch(ue->dmrs_pbch_bitmap_nr, frame_parms->Nid_cell);
+    ret = pbch_detection(ue,mode);
+    //   write_output("rxdata2.m","rxd2",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
+
+#ifdef DEBUG_INITIAL_SYNCH
+    LOG_I(PHY,"FDD Normal prefix: CellId %d metric %d, phase %d, flip %d, pbch %d\n",
+          frame_parms->Nid_cell,metric_fdd_ncp,phase_fdd_ncp,flip_fdd_ncp,ret);
+#endif
+  }
+  else {
+#ifdef DEBUG_INITIAL_SYNCH
+    LOG_I(PHY,"FDD Normal prefix: SSS error condition: sync_pos %d, sync_pos_slot %d\n", sync_pos, sync_pos_slot);
+#endif
+  }
+
+  /* Consider this is a false detection if the offset is > 1000 Hz */
+  if( (abs(ue->common_vars.freq_offset) > 150) && (ret == 0) )
+  {
+	  ret=-1;
+#if DISABLE_LOG_X
+	  printf("Ignore MIB with high freq offset [%d Hz] estimation \n",ue->common_vars.freq_offset);
+#else
+	  LOG_E(HW, "Ignore MIB with high freq offset [%d Hz] estimation \n",ue->common_vars.freq_offset);
+#endif
+  }
+
+  if (ret==0) {  // PBCH found so indicate sync to higher layers and configure frame parameters
+
+    //#ifdef DEBUG_INITIAL_SYNCH
+#if DISABLE_LOG_X
+    printf("[UE%d] In synch, rx_offset %d samples\n",ue->Mod_id, ue->rx_offset);
+#else
+    LOG_I(PHY, "[UE%d] In synch, rx_offset %d samples\n",ue->Mod_id, ue->rx_offset);
+#endif
+    //#endif
+
+    if (ue->UE_scan_carrier == 0) {
+
+    #if UE_AUTOTEST_TRACE
+      LOG_I(PHY,"[UE  %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %d \n",
+              ue->Mod_id,
+              ue->proc.proc_rxtx[0].frame_rx,
+              ue->rx_offset,
+              ue->common_vars.freq_offset );
+    #endif
+
+// send sync status to higher layers later when timing offset converge to target timing
+#if OAISIM
+      if (ue->mac_enabled==1) {
+	LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",ue->Mod_id);
+	//mac_resynch();
+	mac_xface->dl_phy_sync_success(ue->Mod_id,ue->proc.proc_rxtx[0].frame_rx,0,1);//ue->common_vars.eNb_id);
+	ue->UE_mode[0] = PRACH;
+      }
+      else {
+	ue->UE_mode[0] = PUSCH;
+      }
+#endif
+
+      generate_pcfich_reg_mapping(frame_parms);
+      generate_phich_reg_mapping(frame_parms);
+
+
+      ue->pbch_vars[0]->pdu_errors_conseq=0;
+
+    }
+
+#if DISABLE_LOG_X
+    printf("[UE %d] Frame %d RRC Measurements => rssi %3.1f dBm (dig %3.1f dB, gain %d), N0 %d dBm,  rsrp %3.1f dBm/RE, rsrq %3.1f dB\n",ue->Mod_id,
+	  ue->proc.proc_rxtx[0].frame_rx,
+	  10*log10(ue->measurements.rssi)-ue->rx_total_gain_dB,
+	  10*log10(ue->measurements.rssi),
+	  ue->rx_total_gain_dB,
+	  ue->measurements.n0_power_tot_dBm,
+	  10*log10(ue->measurements.rsrp[0])-ue->rx_total_gain_dB,
+	  (10*log10(ue->measurements.rsrq[0])));
+
+
+    printf("[UE %d] Frame %d MIB Information => %s, %s, NidCell %d, N_RB_DL %d, PHICH DURATION %d, PHICH RESOURCE %s, TX_ANT %d\n",
+	  ue->Mod_id,
+	  ue->proc.proc_rxtx[0].frame_rx,
+	  duplex_string[ue->frame_parms.frame_type],
+	  prefix_string[ue->frame_parms.Ncp],
+	  ue->frame_parms.Nid_cell,
+	  ue->frame_parms.N_RB_DL,
+	  ue->frame_parms.phich_config_common.phich_duration,
+	  phich_string[ue->frame_parms.phich_config_common.phich_resource],
+	  ue->frame_parms.nb_antenna_ports_eNB);
+#else
+    LOG_I(PHY, "[UE %d] Frame %d RRC Measurements => rssi %3.1f dBm (dig %3.1f dB, gain %d), N0 %d dBm,  rsrp %3.1f dBm/RE, rsrq %3.1f dB\n",ue->Mod_id,
+	  ue->proc.proc_rxtx[0].frame_rx,
+	  10*log10(ue->measurements.rssi)-ue->rx_total_gain_dB,
+	  10*log10(ue->measurements.rssi),
+	  ue->rx_total_gain_dB,
+	  ue->measurements.n0_power_tot_dBm,
+	  10*log10(ue->measurements.rsrp[0])-ue->rx_total_gain_dB,
+	  (10*log10(ue->measurements.rsrq[0])));
+
+/*    LOG_I(PHY, "[UE %d] Frame %d MIB Information => %s, %s, NidCell %d, N_RB_DL %d, PHICH DURATION %d, PHICH RESOURCE %s, TX_ANT %d\n",
+	  ue->Mod_id,
+	  ue->proc.proc_rxtx[0].frame_rx,
+	  duplex_string[ue->frame_parms.frame_type],
+	  prefix_string[ue->frame_parms.Ncp],
+	  ue->frame_parms.Nid_cell,
+	  ue->frame_parms.N_RB_DL,
+	  ue->frame_parms.phich_config_common.phich_duration,
+	  phich_string[ue->frame_parms.phich_config_common.phich_resource],
+	  ue->frame_parms.nb_antenna_ports_eNB);*/
+#endif
+
+#if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
+#  if DISABLE_LOG_X
+    printf("[UE %d] Frame %d Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
+	  ue->Mod_id,
+	  ue->proc.proc_rxtx[0].frame_rx,
+	  openair0_cfg[0].rx_freq[0]-ue->common_vars.freq_offset,
+	  ue->common_vars.freq_offset);
+#  else
+    LOG_I(PHY, "[UE %d] Frame %d Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
+	  ue->Mod_id,
+	  ue->proc.proc_rxtx[0].frame_rx,
+	  openair0_cfg[0].rx_freq[0]-ue->common_vars.freq_offset,
+	  ue->common_vars.freq_offset);
+#  endif
+#endif
+  } else {
+#ifdef DEBUG_INITIAL_SYNC
+    LOG_I(PHY,"[UE%d] Initial sync : PBCH not ok\n",ue->Mod_id);
+    LOG_I(PHY,"[UE%d] Initial sync : Estimated PSS position %d, Nid2 %d\n",ue->Mod_id,sync_pos,ue->common_vars.eNb_id);
+    /*      LOG_I(PHY,"[UE%d] Initial sync: (metric fdd_ncp %d (%d), metric fdd_ecp %d (%d), metric_tdd_ncp %d (%d), metric_tdd_ecp %d (%d))\n",
+          ue->Mod_id,
+          metric_fdd_ncp,Nid_cell_fdd_ncp,
+          metric_fdd_ecp,Nid_cell_fdd_ecp,
+          metric_tdd_ncp,Nid_cell_tdd_ncp,
+          metric_tdd_ecp,Nid_cell_tdd_ecp);*/
+    LOG_I(PHY,"[UE%d] Initial sync : Estimated Nid_cell %d, Frame_type %d\n",ue->Mod_id,
+          frame_parms->Nid_cell,frame_parms->frame_type);
+#endif
+
+    ue->UE_mode[0] = NOT_SYNCHED;
+    ue->pbch_vars[0]->pdu_errors_last=ue->pbch_vars[0]->pdu_errors;
+    ue->pbch_vars[0]->pdu_errors++;
+    ue->pbch_vars[0]->pdu_errors_conseq++;
+
+  }
+
+  // gain control
+  if (ret!=0) { //we are not synched, so we cannot use rssi measurement (which is based on channel estimates)
+    rx_power = 0;
+
+    // do a measurement on the best guess of the PSS
+    for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++)
+      rx_power += signal_energy(&ue->common_vars.rxdata[aarx][sync_pos2],
+				frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples);
+
+    /*
+    // do a measurement on the full frame
+    for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++)
+      rx_power += signal_energy(&ue->common_vars.rxdata[aarx][0],
+				frame_parms->samples_per_subframe*10);
+    */
+
+    // we might add a low-pass filter here later
+    ue->measurements.rx_power_avg[0] = rx_power/frame_parms->nb_antennas_rx;
+
+    ue->measurements.rx_power_avg_dB[0] = dB_fixed(ue->measurements.rx_power_avg[0]);
+
+#ifdef DEBUG_INITIAL_SYNCH
+  LOG_I(PHY,"[UE%d] Initial sync : Estimated power: %d dB\n",ue->Mod_id,ue->measurements.rx_power_avg_dB[0] );
+#endif
+
+#ifndef OAI_USRP
+#ifndef OAI_BLADERF
+#ifndef OAI_LMSSDR
+#ifndef OAI_ADRV9371_ZC706
+  phy_adjust_gain(ue,ue->measurements.rx_power_avg_dB[0],0);
+#endif
+#endif
+#endif
+#endif
+
+  }
+  else {
+
+#ifndef OAI_USRP
+#ifndef OAI_BLADERF
+#ifndef OAI_LMSSDR
+#ifndef OAI_ADRV9371_ZC706
+  phy_adjust_gain(ue,dB_fixed(ue->measurements.rssi),0);
+#endif
+#endif
+#endif
+#endif
+
+  }
+
+  //  exit_fun("debug exit");
+  return ret;
+}
+

openair1/PHY/NR_UE_TRANSPORT/pss_nr.c

@@ -846,14 +846,14 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain
 
   LOG_I(PHY,"[UE] nr_synchro_time: Sync source = %d, Peak found at pos %d, val = %d (%d dB)\n", pss_source, peak_position, peak_value, dB_fixed(peak_value)/2);
 
-#ifdef DEBUG_PSS_NR
+//#ifdef DEBUG_PSS_NR
 
 #define  PSS_DETECTION_FLOOR_NR     (31)
   if ((dB_fixed(peak_value)/2) > PSS_DETECTION_FLOOR_NR) {
 
     printf("[UE] nr_synchro_time: Sync source = %d, Peak found at pos %d, val = %d (%d dB)\n", pss_source, peak_position, peak_value,dB_fixed(peak_value)/2);
   }
-#endif
+//#endif
 
 #ifdef DEBUG_PHY
 

openair1/PHY/NR_UE_TRANSPORT/sss_nr.c

@@ -589,7 +589,7 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
     }
   }
 
-#ifdef DEBUG_SSS_NR
+//#ifdef DEBUG_SSS_NR
 
 #define SSS_METRIC_FLOOR_NR   (30000)
 if (*tot_metric > SSS_METRIC_FLOOR_NR) {	
@@ -597,7 +597,7 @@ if (*tot_metric > SSS_METRIC_FLOOR_NR) {
     Nid1 = GET_NID1(frame_parms->Nid_cell);
     printf("Nid2 %d Nid1 %d tot_metric %d, phase_max %d \n", Nid2, Nid1, *tot_metric, *phase_max);
 }
-#endif
+//#endif
 
   return(0);
 }

openair1/PHY/defs_nr_common.h

@@ -143,6 +143,8 @@ typedef struct NR_DL_FRAME_PARMS {
   uint8_t nb_antenna_ports_eNB;
   /// Cyclic Prefix for DL (0=Normal CP, 1=Extended CP)
   lte_prefix_type_t Ncp;
+  /// shift of pilot position in one RB
+  uint8_t nushift;
   /// SRS configuration from TS 38.331 RRC
   SRS_NR srs_nr;
 

targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/ue.band7.tm1.PRB100.NR80.adrv9371-zc706.ini

+[AD9371]
+ad9371-phy.in_voltage2_rf_port_select = OFF
+ad9371-phy.in_voltage2_hardwaregain = -156.000000 dB
+ad9371-phy.in_voltage2_temp_comp_gain = 0.00 dB
+ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
+ad9371-phy.out_voltage0_lo_leakage_tracking_en = 0
+ad9371-phy.out_voltage0_hardwaregain = 0.000000 dB
+ad9371-phy.out_voltage0_quadrature_tracking_en = 1
+ad9371-phy.out_voltage1_hardwaregain = 0.000000 dB
+ad9371-phy.out_voltage1_lo_leakage_tracking_en = 0
+ad9371-phy.out_voltage1_quadrature_tracking_en = 1
+ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
+ad9371-phy.out_altvoltage1_TX_LO_frequency = 2560000000
+ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = 2680000000
+ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
+ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
+ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
+ad9371-phy.in_voltage0_gain_control_mode = manual
+ad9371-phy.in_voltage0_quadrature_tracking_en = 1
+ad9371-phy.in_voltage0_hardwaregain = 30.000000 dB
+ad9371-phy.in_voltage0_temp_comp_gain = 0.00 dB
+ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
+ad9371-phy.in_voltage1_quadrature_tracking_en = 1
+ad9371-phy.in_voltage1_hardwaregain = 30.000000 dB
+ad9371-phy.in_voltage1_temp_comp_gain = 0.00 dB
+ad9371-phy.in_voltage1_gain_control_mode = manual
+ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
+ad9371-phy.out_altvoltage0_RX_LO_frequency = 2680000000
+ad9371-phy.calibrate_rx_qec_en = 0
+ad9371-phy.calibrate_tx_lol_en = 0
+ad9371-phy.calibrate_vswr_en = 0
+ad9371-phy.calibrate_tx_qec_en = 0
+ad9371-phy.calibrate_clgc_en = 0
+ad9371-phy.ensm_mode = radio_on
+ad9371-phy.calibrate_tx_lol_ext_en = 0
+ad9371-phy.calibrate_dpd_en = 0
+axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_phase = 90000
+axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_scale = 0.501160
+axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_frequency = 1999718
+axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_raw = 1
+axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_phase = 90000
+axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_scale = 0.000000
+axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_raw = 1
+axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_frequency = 1000327
+axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_frequency = 7999809
+axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_phase = 90000
+axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_scale = 0.251160
+axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_raw = 1
+axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_frequency = 7999809
+axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_raw = 1
+axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_phase = 0
+axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_scale = 0.251160
+axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_raw = 1
+axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_phase = 0
+axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_scale = 0.000000
+axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_frequency = 19998117
+axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_raw = 1
+axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_phase = 0
+axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_scale = 0.000000
+axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_frequency = 1000327
+axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_raw = 1
+axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_phase = 0
+axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_scale = 0.501160
+axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_frequency = 1999718
+axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_frequency = 19998117
+axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_raw = 1
+axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_phase = 90000
+axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_scale = 0.000000
+load_myk_profile_file = /targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profileNR80MHz.txt
+dds_mode_tx1 = 1
+dds_mode_tx2 = 1
+dac_buf_filename = /usr/local/lib/osc/waveforms/LTE20.mat
+tx_channel_0 = 1
+tx_channel_1 = 1
+tx_channel_2 = 0
+tx_channel_3 = 0
+global_settings_show = 1
+tx_show = 1
+rx_show = 1
+obs_show = 1
+fpga_show = 1
+
+[ADRV9371_ZC706]
+# NO_DEBUG=0; DEBUG=1
+debug_mode = 0
+# 20MHz 40MHz 80MHz=1; 10MHz=2; 5MHz=4
+interpolation_decimation_factor = 1
+# is taken into account only if "ad9371-phy.in_voltage0_gain_control_mode = manual"
+rx_gain_offset = 53

targets/RT/USER/nr-ue.c

@@ -354,7 +354,7 @@ static void *UE_thread_synch(void *arg) {
 #else
             LOG_I(PHY, "[UE thread Synch] Running Initial Synch (mode %d)\n",UE->mode);
 #endif
-            if (initial_sync( UE, UE->mode ) == 0) {
+            if (nr_initial_sync( UE, UE->mode ) == 0) {
 
                 hw_slot_offset = (UE->rx_offset<<1) / UE->frame_parms.samples_per_tti;
                 printf("Got synch: hw_slot_offset %d, carrier off %d Hz, rxgain %d (DL %u, UL %u), UE_scan_carrier %d\n",
@@ -413,7 +413,7 @@ static void *UE_thread_synch(void *arg) {
                     //UE->rfdevice.trx_set_gains_func(&openair0,&openair0_cfg[0]);
                     //UE->rfdevice.trx_stop_func(&UE->rfdevice);
                     // sleep(1);
-                    //nr_init_frame_parms(&UE->frame_parms);
+                    nr_init_frame_parms_ue(&UE->frame_parms);
                     /*if (UE->rfdevice.trx_start_func(&UE->rfdevice) != 0 ) {
                         LOG_E(HW,"Could not start the device\n");
                         oai_exit=1;
@@ -733,8 +733,8 @@ void *UE_thread(void *arg) {
 
 #ifdef NAS_UE
     MessageDef *message_p;
-    message_p = itti_alloc_new_message(TASK_NAS_UE, INITIALIZE_MESSAGE);
-    itti_send_msg_to_task (TASK_NAS_UE, UE->Mod_id + NB_eNB_INST, message_p);
+    //message_p = itti_alloc_new_message(TASK_NAS_UE, INITIALIZE_MESSAGE);
+    //itti_send_msg_to_task (TASK_NAS_UE, UE->Mod_id + NB_eNB_INST, message_p);
 #endif
 
     int tti_nr=-1;

targets/RT/USER/nr-uesoftmodem.c

@@ -693,6 +693,73 @@ int T_dont_fork = 0;  /* default is to fork, see 'T_init' to understand */
 
     }
 
+}
+
+void set_default_frame_parms_single(nfapi_config_request_t *config, NR_DL_FRAME_PARMS *frame_parms) {
+
+  //int CC_id;
+
+  //for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
+        frame_parms = (NR_DL_FRAME_PARMS*) malloc(sizeof(NR_DL_FRAME_PARMS));
+        /* Set some default values that may be overwritten while reading options */
+        frame_parms = (NR_DL_FRAME_PARMS*) malloc(sizeof(NR_DL_FRAME_PARMS));
+        config = (nfapi_config_request_t*) malloc(sizeof(nfapi_config_request_t));
+        config->subframe_config.numerology_index_mu.value =1;
+        config->subframe_config.duplex_mode.value = 1; //FDD
+        config->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
+        config->rf_config.dl_channel_bandwidth.value = 106;
+        config->rf_config.ul_channel_bandwidth.value = 106;
+        config->rf_config.tx_antenna_ports.value = 1;
+        config->rf_config.rx_antenna_ports.value = 1;
+        config->sch_config.physical_cell_id.value = 0;
+
+        frame_parms->frame_type          = FDD;
+        frame_parms->tdd_config          = 3;
+        //frame_parms[CC_id]->tdd_config_S        = 0;
+        frame_parms->N_RB_DL             = 100;
+        frame_parms->N_RB_UL             = 100;
+        frame_parms->Ncp                 = NORMAL;
+        //frame_parms[CC_id]->Ncp_UL              = NORMAL;
+        frame_parms->Nid_cell            = 0;
+        //frame_parms[CC_id]->num_MBSFN_config    = 0;
+        frame_parms->nb_antenna_ports_eNB  = 1;
+        frame_parms->nb_antennas_tx      = 1;
+        frame_parms->nb_antennas_rx      = 1;
+
+        //frame_parms[CC_id]->nushift             = 0;
+
+        ///frame_parms[CC_id]->phich_config_common.phich_resource = oneSixth;
+        //frame_parms[CC_id]->phich_config_common.phich_duration = normal;
+    // UL RS Config
+        /*frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = 1;//n_DMRS1 set to 0
+        frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
+        frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
+        frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
+
+	frame_parms[CC_id]->pusch_config_common.n_SB = 1;
+	frame_parms[CC_id]->pusch_config_common.hoppingMode = 0;
+	frame_parms[CC_id]->pusch_config_common.pusch_HoppingOffset = 0;
+	frame_parms[CC_id]->pusch_config_common.enable64QAM = 0;
+		
+        frame_parms[CC_id]->prach_config_common.rootSequenceIndex=22;
+        frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig=1;
+        frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_ConfigIndex=0;
+        frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.highSpeedFlag=0;
+        frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_FreqOffset=0;*/
+
+        // NR: Init to legacy LTE 20Mhz params
+        frame_parms->numerology_index	= 0;
+        frame_parms->ttis_per_subframe	= 1;
+        frame_parms->slots_per_tti		= 2;
+
+        downlink_frequency[0][0] = 2680000000; // Use float to avoid issue with frequency over 2^31.
+        //downlink_frequency[CC_id][1] = downlink_frequency[CC_id][0];
+        //downlink_frequency[CC_id][2] = downlink_frequency[CC_id][0];
+        //downlink_frequency[CC_id][3] = downlink_frequency[CC_id][0];
+        //printf("Downlink for CC_id %d frequency set to %u\n", CC_id, downlink_frequency[CC_id][0]);
+
+    //}
+
 }
 void init_openair0(void);
 void init_openair0() {
@@ -931,10 +998,10 @@ int main( int argc, char **argv ) {
       set_default_frame_parms(config[CC_id],frame_parms[CC_id]);
       
     //init_ul_hopping(frame_parms[CC_id]);
-    nr_init_frame_parms(config[CC_id],frame_parms[CC_id]);
+    nr_init_frame_parms_ue(config[CC_id],frame_parms[CC_id]);
     printf("after init frame_parms %d\n",frame_parms[CC_id]->ofdm_symbol_size);
     //   phy_init_top(frame_parms[CC_id]);
-    //phy_init_lte_top(frame_parms[CC_id]);
+    phy_init_nr_top(frame_parms[CC_id]);
   }
 
 
@@ -1009,8 +1076,11 @@ int main( int argc, char **argv ) {
                 //UE[CC_id]->pdcch_vars[1][0]->crnti = 0x1235;
             }
 
-            //UE[CC_id]->rx_total_gain_dB =  (int)rx_gain[CC_id][0] + rx_gain_off;
-            //UE[CC_id]->tx_power_max_dBm = tx_max_power[CC_id];
+	    rx_gain[CC_id][0] = 81;
+	    tx_max_power[CC_id] = -40;
+
+            UE[CC_id]->rx_total_gain_dB =  (int)rx_gain[CC_id][0] + rx_gain_off;
+            UE[CC_id]->tx_power_max_dBm = tx_max_power[CC_id];
 
             if (frame_parms[CC_id]->frame_type==FDD) {
                 UE[CC_id]->N_TA_offset = 0;
@@ -1025,7 +1095,7 @@ int main( int argc, char **argv ) {
 
         }
 
-        //  printf("tx_max_power = %d -> amp %d\n",tx_max_power,get_tx_amp(tx_max_poHwer,tx_max_power));
+        //  printf("tx_max_power = %d -> amp %d\n",tx_max_power[0],get_tx_amp(tx_max_poHwer,tx_max_power));
   
 
     fill_modeled_runtime_table(runtime_phy_rx,runtime_phy_tx);