Timer A working for 32kHz crystal

firmware/src/crystal.c

@@ -16,17 +16,23 @@ void initCrystal(void)
     //Configure LED1 as output
     P1DIR |= LED1;
     //HFXIN - HFXOUT PJ.2 and PJ.3 pin functions
-    PJSEL1 =  0x0000;
-    PJSEL0 = 0x0030;
+    //PJSEL1 =  0x0000;
+    //PJSEL0 = 0x0030;
+
+    //Leo's
+    PJSEL1 =  0x00;
+    PJSEL0 = 0x08;
+
 
     //Clock System Key Register. This unlocks CS registers
     CS -> KEY = CS_KEY_VAL;
 
     //Basic Clock System Control Register 1 HFXTCLK / HSMCLK-SMCLK Divider = 1
+    //ACLK sourced by LFXTL (32kHz)
     CS->CTL1 |=CS_CTL1_DIVHS_0 + CS_CTL1_SELS_5 ;
 
     //Basic Clock System Control Register 2 - Use external  (>8MHz - 16 MHz) crystal for HSMCLK / capacitance of 14pF
-    CS->CTL2 |=CS_CTL2_HFXTBYPASS_OFS + CS_CTL2_HFXT_EN + CS_CTL2_HFXTFREQ_2 + CS_CTL2_HFXTDRIVE;
+    CS->CTL2 |= CS_CTL2_HFXT_EN + CS_CTL2_HFXTFREQ_2 + CS_CTL2_HFXTDRIVE;
 
     CS -> KEY = 0X0000FFFF;
 
@@ -38,8 +44,8 @@ void initCrystal(void)
     //Timer A Control Register - Capture compare interrupts are enabled
     TIMER_A0 -> CCTL[0] |= TIMER_A_CCTLN_CCIE;
     //Timer A Capture/Compare Register 0 - set as 250mS(1/f), being f the clock frequency. No prescaler.
-    //TACCR = 250mS / (1 / 16MHz) - 1. 1 is substracted because the flag is triggered one cycle later
-    TIMER_A0 -> CCR[0] = 3999;
+    //TACCR = 250mS / (1 / 32MkHz) - 1. 1 is substracted because the flag is triggered one cycle later
+    TIMER_A0 -> CCR[0] = 7999;
 
     __NVIC_SetPriority(TA0_0_IRQn,0);
     __NVIC_EnableIRQ(TA0_0_IRQn);