From d943cd281d4533d8dfb8465f21c1cf677c41f16a Mon Sep 17 00:00:00 2001
From: Raymond Knopp <raymond.knopp@eurecom.fr>
Date: Tue, 13 Mar 2018 01:17:10 -0700
Subject: [PATCH] initial split of UE/eNB directories
---
openair1/PHY/LTE_TRANSPORT/dci.c | 3526 +------
openair1/PHY/LTE_TRANSPORT/pbch.c | 621 --
openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c | 9093 +++++++++++++++++
.../dlsch_decoding.c | 0
.../dlsch_demodulation.c | 0
.../dlsch_llr_computation.c | 0
.../dlsch_llr_computation_avx2.c | 0
.../drs_modulation.c | 0
.../ulsch_coding.c | 0
.../ulsch_modulation.c | 0
10 files changed, 9100 insertions(+), 4140 deletions(-)
create mode 100644 openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c
rename openair1/PHY/{LTE_TRANSPORT => LTE_UE_TRANSPORT}/dlsch_decoding.c (100%)
rename openair1/PHY/{LTE_TRANSPORT => LTE_UE_TRANSPORT}/dlsch_demodulation.c (100%)
rename openair1/PHY/{LTE_TRANSPORT => LTE_UE_TRANSPORT}/dlsch_llr_computation.c (100%)
rename openair1/PHY/{LTE_TRANSPORT => LTE_UE_TRANSPORT}/dlsch_llr_computation_avx2.c (100%)
rename openair1/PHY/{LTE_TRANSPORT => LTE_UE_TRANSPORT}/drs_modulation.c (100%)
rename openair1/PHY/{LTE_TRANSPORT => LTE_UE_TRANSPORT}/ulsch_coding.c (100%)
rename openair1/PHY/{LTE_TRANSPORT => LTE_UE_TRANSPORT}/ulsch_modulation.c (100%)
diff --git a/openair1/PHY/LTE_TRANSPORT/dci.c b/openair1/PHY/LTE_TRANSPORT/dci.c
index ded49d1c73..0c39ad6cc4 100755
--- a/openair1/PHY/LTE_TRANSPORT/dci.c
+++ b/openair1/PHY/LTE_TRANSPORT/dci.c
@@ -112,51 +112,6 @@ uint32_t check_phich_reg(LTE_DL_FRAME_PARMS *frame_parms,uint32_t kprime,uint8_t
return(0);
}
-uint16_t extract_crc(uint8_t *dci,uint8_t dci_len)
-{
-
- uint16_t crc16;
- // uint8_t i;
-
- /*
- uint8_t crc;
- crc = ((uint16_t *)dci)[DCI_LENGTH>>4];
- printf("crc1: %x, shift %d (DCI_LENGTH %d)\n",crc,DCI_LENGTH&0xf,DCI_LENGTH);
- crc = (crc>>(DCI_LENGTH&0xf));
- // clear crc bits
- ((uint16_t *)dci)[DCI_LENGTH>>4] &= (0xffff>>(16-(DCI_LENGTH&0xf)));
- printf("crc2: %x, dci0 %x\n",crc,((int16_t *)dci)[DCI_LENGTH>>4]);
- crc |= (((uint16_t *)dci)[1+(DCI_LENGTH>>4)])<<(16-(DCI_LENGTH&0xf));
- // clear crc bits
- (((uint16_t *)dci)[1+(DCI_LENGTH>>4)]) = 0;
- printf("extract_crc: crc %x\n",crc);
- */
-#ifdef DEBUG_DCI_DECODING
- LOG_I(PHY,"dci_crc (%x,%x,%x), dci_len&0x7=%d\n",dci[dci_len>>3],dci[1+(dci_len>>3)],dci[2+(dci_len>>3)],
- dci_len&0x7);
-#endif
-
- if ((dci_len&0x7) > 0) {
- ((uint8_t *)&crc16)[0] = dci[1+(dci_len>>3)]<<(dci_len&0x7) | dci[2+(dci_len>>3)]>>(8-(dci_len&0x7));
- ((uint8_t *)&crc16)[1] = dci[(dci_len>>3)]<<(dci_len&0x7) | dci[1+(dci_len>>3)]>>(8-(dci_len&0x7));
- } else {
- ((uint8_t *)&crc16)[0] = dci[1+(dci_len>>3)];
- ((uint8_t *)&crc16)[1] = dci[(dci_len>>3)];
- }
-
-#ifdef DEBUG_DCI_DECODING
- LOG_I(PHY,"dci_crc =>%x\n",crc16);
-#endif
-
- // dci[(dci_len>>3)]&=(0xffff<<(dci_len&0xf));
- // dci[(dci_len>>3)+1] = 0;
- // dci[(dci_len>>3)+2] = 0;
- return((uint16_t)crc16);
-
-}
-
-
-
static uint8_t d[3*(MAX_DCI_SIZE_BITS + 16) + 96];
static uint8_t w[3*3*(MAX_DCI_SIZE_BITS+16)];
@@ -346,1720 +301,6 @@ void pdcch_interleaving(LTE_DL_FRAME_PARMS *frame_parms,int32_t **z, int32_t **w
}
}
-void pdcch_demapping(uint16_t *llr,uint16_t *wbar,LTE_DL_FRAME_PARMS *frame_parms,uint8_t num_pdcch_symbols,uint8_t mi)
-{
-
- uint32_t i, lprime;
- uint16_t kprime,kprime_mod12,mprime,symbol_offset,tti_offset,tti_offset0;
- int16_t re_offset,re_offset0;
-
- // This is the REG allocation algorithm from 36-211, second part of Section 6.8.5
-
- int Msymb2;
-
- switch (frame_parms->N_RB_DL) {
- case 100:
- Msymb2 = Msymb;
- break;
-
- case 75:
- Msymb2 = 3*Msymb/4;
- break;
-
- case 50:
- Msymb2 = Msymb>>1;
- break;
-
- case 25:
- Msymb2 = Msymb>>2;
- break;
-
- case 15:
- Msymb2 = Msymb*15/100;
- break;
-
- case 6:
- Msymb2 = Msymb*6/100;
- break;
-
- default:
- Msymb2 = Msymb>>2;
- break;
- }
-
- mprime=0;
-
-
- re_offset = 0;
- re_offset0 = 0; // counter for symbol with pilots (extracted outside!)
-
- for (kprime=0; kprime<frame_parms->N_RB_DL*12; kprime++) {
- for (lprime=0; lprime<num_pdcch_symbols; lprime++) {
-
- symbol_offset = (uint32_t)frame_parms->N_RB_DL*12*lprime;
-
- tti_offset = symbol_offset + re_offset;
- tti_offset0 = symbol_offset + re_offset0;
-
- // if REG is allocated to PHICH, skip it
- if (check_phich_reg(frame_parms,kprime,lprime,mi) == 1) {
- // printf("dci_demapping : skipping REG %d (RE %d)\n",(lprime==0)?kprime/6 : kprime>>2,kprime);
- if ((lprime == 0)&&((kprime%6)==0))
- re_offset0+=4;
- } else { // not allocated to PHICH/PCFICH
- // printf("dci_demapping: REG %d\n",(lprime==0)?kprime/6 : kprime>>2);
- if (lprime == 0) {
- // first symbol, or second symbol+4 TX antennas skip pilots
- kprime_mod12 = kprime%12;
-
- if ((kprime_mod12 == 0) || (kprime_mod12 == 6)) {
- // kprime represents REG
-
- for (i=0; i<4; i++) {
- wbar[mprime] = llr[tti_offset0+i];
-#ifdef DEBUG_DCI_DECODING
-// LOG_I(PHY,"PDCCH demapping mprime %d.%d <= llr %d (symbol %d re %d) -> (%d,%d)\n",mprime/4,i,tti_offset0+i,symbol_offset,re_offset0,*(char*)&wbar[mprime],*(1+(char*)&wbar[mprime]));
-#endif
- mprime++;
- re_offset0++;
- }
- }
- } else if ((lprime==1)&&(frame_parms->nb_antenna_ports_eNB == 4)) {
- // LATER!!!!
- } else { // no pilots in this symbol
- kprime_mod12 = kprime%12;
-
- if ((kprime_mod12 == 0) || (kprime_mod12 == 4) || (kprime_mod12 == 8)) {
- // kprime represents REG
- for (i=0; i<4; i++) {
- wbar[mprime] = llr[tti_offset+i];
-#ifdef DEBUG_DCI_DECODING
-// LOG_I(PHY,"PDCCH demapping mprime %d.%d <= llr %d (symbol %d re %d) -> (%d,%d)\n",mprime/4,i,tti_offset+i,symbol_offset,re_offset+i,*(char*)&wbar[mprime],*(1+(char*)&wbar[mprime]));
-#endif
- mprime++;
- }
- } // is representative
- } // no pilots case
- } // not allocated to PHICH/PCFICH
-
- // Stop when all REGs are copied in
- if (mprime>=Msymb2)
- break;
- } //lprime loop
-
- re_offset++;
-
- } // kprime loop
-}
-
-static uint16_t wtemp_rx[Msymb];
-void pdcch_deinterleaving(LTE_DL_FRAME_PARMS *frame_parms,uint16_t *z, uint16_t *wbar,uint8_t number_pdcch_symbols,uint8_t mi)
-{
-
- uint16_t *wptr,*zptr,*wptr2;
-
- uint16_t Mquad=get_nquad(number_pdcch_symbols,frame_parms,mi);
- uint32_t RCC = (Mquad>>5), ND;
- uint32_t row,col,Kpi,index;
- int32_t i,k;
-
-
- // printf("Mquad %d, RCC %d\n",Mquad,RCC);
-
- AssertFatal(z!=NULL,"dci.c: pdcch_deinterleaving: FATAL z is Null\n");
-
- // undo permutation
- for (i=0; i<Mquad; i++) {
- wptr = &wtemp_rx[((i+frame_parms->Nid_cell)%Mquad)<<2];
- wptr2 = &wbar[i<<2];
-
- wptr[0] = wptr2[0];
- wptr[1] = wptr2[1];
- wptr[2] = wptr2[2];
- wptr[3] = wptr2[3];
- /*
- printf("pdcch_deinterleaving (%p,%p): quad %d (%d) -> (%d,%d %d,%d %d,%d %d,%d)\n",wptr,wptr2,i,(i+frame_parms->Nid_cell)%Mquad,
- ((char*)wptr2)[0],
- ((char*)wptr2)[1],
- ((char*)wptr2)[2],
- ((char*)wptr2)[3],
- ((char*)wptr2)[4],
- ((char*)wptr2)[5],
- ((char*)wptr2)[6],
- ((char*)wptr2)[7]);
- */
-
- }
-
- if ((Mquad&0x1f) > 0)
- RCC++;
-
- Kpi = (RCC<<5);
- ND = Kpi - Mquad;
-
- k=0;
-
- for (col=0; col<32; col++) {
- index = bitrev_cc_dci[col];
-
- for (row=0; row<RCC; row++) {
- // printf("row %d, index %d, Nd %d\n",row,index,ND);
- if (index>=ND) {
-
-
-
- wptr = &wtemp_rx[k<<2];
- zptr = &z[(index-ND)<<2];
-
- zptr[0] = wptr[0];
- zptr[1] = wptr[1];
- zptr[2] = wptr[2];
- zptr[3] = wptr[3];
-
- /*
- printf("deinterleaving ; k %d, index-Nd %d => (%d,%d,%d,%d,%d,%d,%d,%d)\n",k,(index-ND),
- ((int8_t *)wptr)[0],
- ((int8_t *)wptr)[1],
- ((int8_t *)wptr)[2],
- ((int8_t *)wptr)[3],
- ((int8_t *)wptr)[4],
- ((int8_t *)wptr)[5],
- ((int8_t *)wptr)[6],
- ((int8_t *)wptr)[7]);
- */
- k++;
- }
-
- index+=32;
-
- }
- }
-
- for (i=0; i<Mquad; i++) {
- zptr = &z[i<<2];
- /*
- printf("deinterleaving ; quad %d => (%d,%d,%d,%d,%d,%d,%d,%d)\n",i,
- ((int8_t *)zptr)[0],
- ((int8_t *)zptr)[1],
- ((int8_t *)zptr)[2],
- ((int8_t *)zptr)[3],
- ((int8_t *)zptr)[4],
- ((int8_t *)zptr)[5],
- ((int8_t *)zptr)[6],
- ((int8_t *)zptr)[7]);
- */
- }
-
-}
-
-
-int32_t pdcch_qpsk_qpsk_llr(LTE_DL_FRAME_PARMS *frame_parms,
- int32_t **rxdataF_comp,
- int32_t **rxdataF_comp_i,
- int32_t **rho_i,
- int16_t *pdcch_llr16,
- int16_t *pdcch_llr8in,
- uint8_t symbol)
-{
-
- int16_t *rxF=(int16_t*)&rxdataF_comp[0][(symbol*frame_parms->N_RB_DL*12)];
- int16_t *rxF_i=(int16_t*)&rxdataF_comp_i[0][(symbol*frame_parms->N_RB_DL*12)];
- int16_t *rho=(int16_t*)&rho_i[0][(symbol*frame_parms->N_RB_DL*12)];
- int16_t *llr128;
- int32_t i;
- char *pdcch_llr8;
- int16_t *pdcch_llr;
- pdcch_llr8 = (char *)&pdcch_llr8in[symbol*frame_parms->N_RB_DL*12];
- pdcch_llr = &pdcch_llr16[symbol*frame_parms->N_RB_DL*12];
-
- // printf("dlsch_qpsk_qpsk: symbol %d\n",symbol);
-
- llr128 = (int16_t*)pdcch_llr;
-
- if (!llr128) {
- printf("dlsch_qpsk_qpsk_llr: llr is null, symbol %d\n",symbol);
- return -1;
- }
-
- qpsk_qpsk(rxF,
- rxF_i,
- llr128,
- rho,
- frame_parms->N_RB_DL*12);
-
- //prepare for Viterbi which accepts 8 bit, but prefers 4 bit, soft input.
- for (i=0; i<(frame_parms->N_RB_DL*24); i++) {
- if (*pdcch_llr>7)
- *pdcch_llr8=7;
- else if (*pdcch_llr<-8)
- *pdcch_llr8=-8;
- else
- *pdcch_llr8 = (char)(*pdcch_llr);
-
- pdcch_llr++;
- pdcch_llr8++;
- }
-
- return(0);
-}
-
-
-int32_t pdcch_llr(LTE_DL_FRAME_PARMS *frame_parms,
- int32_t **rxdataF_comp,
- char *pdcch_llr,
- uint8_t symbol)
-{
-
- int16_t *rxF= (int16_t*) &rxdataF_comp[0][(symbol*frame_parms->N_RB_DL*12)];
- int32_t i;
- char *pdcch_llr8;
-
- pdcch_llr8 = &pdcch_llr[2*symbol*frame_parms->N_RB_DL*12];
-
- if (!pdcch_llr8) {
- printf("pdcch_qpsk_llr: llr is null, symbol %d\n",symbol);
- return(-1);
- }
-
- // printf("pdcch qpsk llr for symbol %d (pos %d), llr offset %d\n",symbol,(symbol*frame_parms->N_RB_DL*12),pdcch_llr8-pdcch_llr);
-
- for (i=0; i<(frame_parms->N_RB_DL*((symbol==0) ? 16 : 24)); i++) {
-
- if (*rxF>31)
- *pdcch_llr8=31;
- else if (*rxF<-32)
- *pdcch_llr8=-32;
- else
- *pdcch_llr8 = (char)(*rxF);
-
- // printf("%d %d => %d\n",i,*rxF,*pdcch_llr8);
- rxF++;
- pdcch_llr8++;
- }
-
- return(0);
-
-}
-
-//__m128i avg128P;
-
-//compute average channel_level on each (TX,RX) antenna pair
-void pdcch_channel_level(int32_t **dl_ch_estimates_ext,
- LTE_DL_FRAME_PARMS *frame_parms,
- int32_t *avg,
- uint8_t nb_rb)
-{
-
- int16_t rb;
- uint8_t aatx,aarx;
-#if defined(__x86_64__) || defined(__i386__)
- __m128i *dl_ch128;
- __m128i avg128P;
-#elif defined(__arm__)
- int16x8_t *dl_ch128;
- int32x4_t *avg128P;
-#endif
- for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++)
- for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
- //clear average level
-#if defined(__x86_64__) || defined(__i386__)
- avg128P = _mm_setzero_si128();
- dl_ch128=(__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][0];
-#elif defined(__arm__)
-
-#endif
- for (rb=0; rb<nb_rb; rb++) {
-
-#if defined(__x86_64__) || defined(__i386__)
- avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[0],dl_ch128[0]));
- avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[1],dl_ch128[1]));
- avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[2],dl_ch128[2]));
-#elif defined(__arm__)
-
-#endif
- dl_ch128+=3;
- /*
- if (rb==0) {
- print_shorts("dl_ch128",&dl_ch128[0]);
- print_shorts("dl_ch128",&dl_ch128[1]);
- print_shorts("dl_ch128",&dl_ch128[2]);
- }
- */
- }
-
- DevAssert( nb_rb );
- avg[(aatx<<1)+aarx] = (((int32_t*)&avg128P)[0] +
- ((int32_t*)&avg128P)[1] +
- ((int32_t*)&avg128P)[2] +
- ((int32_t*)&avg128P)[3])/(nb_rb*12);
-
- // printf("Channel level : %d\n",avg[(aatx<<1)+aarx]);
- }
-
-#if defined(__x86_64__) || defined(__i386__)
- _mm_empty();
- _m_empty();
-#endif
-
-}
-
-#if defined(__x86_64) || defined(__i386__)
-__m128i mmtmpPD0,mmtmpPD1,mmtmpPD2,mmtmpPD3;
-#elif defined(__arm__)
-
-#endif
-void pdcch_dual_stream_correlation(LTE_DL_FRAME_PARMS *frame_parms,
- uint8_t symbol,
- int32_t **dl_ch_estimates_ext,
- int32_t **dl_ch_estimates_ext_i,
- int32_t **dl_ch_rho_ext,
- uint8_t output_shift)
-{
-
- uint16_t rb;
-#if defined(__x86_64__) || defined(__i386__)
- __m128i *dl_ch128,*dl_ch128i,*dl_ch_rho128;
-#elif defined(__arm__)
-
-#endif
- uint8_t aarx;
-
- // printf("dlsch_dual_stream_correlation: symbol %d\n",symbol);
-
-
- for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
-
-#if defined(__x86_64__) || defined(__i386__)
- dl_ch128 = (__m128i *)&dl_ch_estimates_ext[aarx][symbol*frame_parms->N_RB_DL*12];
- dl_ch128i = (__m128i *)&dl_ch_estimates_ext_i[aarx][symbol*frame_parms->N_RB_DL*12];
- dl_ch_rho128 = (__m128i *)&dl_ch_rho_ext[aarx][symbol*frame_parms->N_RB_DL*12];
-
-#elif defined(__arm__)
-
-#endif
-
- for (rb=0; rb<frame_parms->N_RB_DL; rb++) {
- // multiply by conjugated channel
-#if defined(__x86_64__) || defined(__i386__)
- mmtmpPD0 = _mm_madd_epi16(dl_ch128[0],dl_ch128i[0]);
- // print_ints("re",&mmtmpPD0);
-
- // mmtmpD0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpPD1 = _mm_shufflelo_epi16(dl_ch128[0],_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_shufflehi_epi16(mmtmpPD1,_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_sign_epi16(mmtmpPD1,*(__m128i*)&conjugate[0]);
- // print_ints("im",&mmtmpPD1);
- mmtmpPD1 = _mm_madd_epi16(mmtmpPD1,dl_ch128i[0]);
- // mmtmpD1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpPD0 = _mm_srai_epi32(mmtmpPD0,output_shift);
- // print_ints("re(shift)",&mmtmpPD0);
- mmtmpPD1 = _mm_srai_epi32(mmtmpPD1,output_shift);
- // print_ints("im(shift)",&mmtmpPD1);
- mmtmpPD2 = _mm_unpacklo_epi32(mmtmpPD0,mmtmpPD1);
- mmtmpPD3 = _mm_unpackhi_epi32(mmtmpPD0,mmtmpPD1);
- // print_ints("c0",&mmtmpPD2);
- // print_ints("c1",&mmtmpPD3);
- dl_ch_rho128[0] = _mm_packs_epi32(mmtmpPD2,mmtmpPD3);
-
- //print_shorts("rx:",dl_ch128_2);
- //print_shorts("ch:",dl_ch128);
- //print_shorts("pack:",rho128);
-
- // multiply by conjugated channel
- mmtmpPD0 = _mm_madd_epi16(dl_ch128[1],dl_ch128i[1]);
- // mmtmpPD0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpPD1 = _mm_shufflelo_epi16(dl_ch128[1],_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_shufflehi_epi16(mmtmpPD1,_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_sign_epi16(mmtmpPD1,*(__m128i*)conjugate);
- mmtmpPD1 = _mm_madd_epi16(mmtmpPD1,dl_ch128i[1]);
- // mmtmpPD1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpPD0 = _mm_srai_epi32(mmtmpPD0,output_shift);
- mmtmpPD1 = _mm_srai_epi32(mmtmpPD1,output_shift);
- mmtmpPD2 = _mm_unpacklo_epi32(mmtmpPD0,mmtmpPD1);
- mmtmpPD3 = _mm_unpackhi_epi32(mmtmpPD0,mmtmpPD1);
-
-
- dl_ch_rho128[1] =_mm_packs_epi32(mmtmpPD2,mmtmpPD3);
- //print_shorts("rx:",dl_ch128_2+1);
- //print_shorts("ch:",dl_ch128+1);
- //print_shorts("pack:",rho128+1);
- // multiply by conjugated channel
- mmtmpPD0 = _mm_madd_epi16(dl_ch128[2],dl_ch128i[2]);
- // mmtmpPD0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpPD1 = _mm_shufflelo_epi16(dl_ch128[2],_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_shufflehi_epi16(mmtmpPD1,_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_sign_epi16(mmtmpPD1,*(__m128i*)conjugate);
- mmtmpPD1 = _mm_madd_epi16(mmtmpPD1,dl_ch128i[2]);
- // mmtmpPD1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpPD0 = _mm_srai_epi32(mmtmpPD0,output_shift);
- mmtmpPD1 = _mm_srai_epi32(mmtmpPD1,output_shift);
- mmtmpPD2 = _mm_unpacklo_epi32(mmtmpPD0,mmtmpPD1);
- mmtmpPD3 = _mm_unpackhi_epi32(mmtmpPD0,mmtmpPD1);
-
- dl_ch_rho128[2] = _mm_packs_epi32(mmtmpPD2,mmtmpPD3);
- //print_shorts("rx:",dl_ch128_2+2);
- //print_shorts("ch:",dl_ch128+2);
- //print_shorts("pack:",rho128+2);
-
- dl_ch128+=3;
- dl_ch128i+=3;
- dl_ch_rho128+=3;
-
-
-#elif defined(__arm__)
-
-#endif
- }
- }
-#if defined(__x86_64__) || defined(__i386__)
- _mm_empty();
- _m_empty();
-#endif
-
-}
-
-
-void pdcch_detection_mrc_i(LTE_DL_FRAME_PARMS *frame_parms,
- int32_t **rxdataF_comp,
- int32_t **rxdataF_comp_i,
- int32_t **rho,
- int32_t **rho_i,
- uint8_t symbol)
-{
-
- uint8_t aatx;
-
-#if defined(__x86_64__) || defined(__i386__)
- __m128i *rxdataF_comp128_0,*rxdataF_comp128_1,*rxdataF_comp128_i0,*rxdataF_comp128_i1,*rho128_0,*rho128_1,*rho128_i0,*rho128_i1;
-#elif defined(__arm__)
- int16x8_t *rxdataF_comp128_0,*rxdataF_comp128_1,*rxdataF_comp128_i0,*rxdataF_comp128_i1,*rho128_0,*rho128_1,*rho128_i0,*rho128_i1;
-#endif
- int32_t i;
-
- if (frame_parms->nb_antennas_rx>1) {
- for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++) {
- //if (frame_parms->mode1_flag && (aatx>0)) break;
-
-#if defined(__x86_64__) || defined(__i386__)
- rxdataF_comp128_0 = (__m128i *)&rxdataF_comp[(aatx<<1)][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_1 = (__m128i *)&rxdataF_comp[(aatx<<1)+1][symbol*frame_parms->N_RB_DL*12];
-#elif defined(__arm__)
- rxdataF_comp128_0 = (int16x8_t *)&rxdataF_comp[(aatx<<1)][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_1 = (int16x8_t *)&rxdataF_comp[(aatx<<1)+1][symbol*frame_parms->N_RB_DL*12];
-#endif
- // MRC on each re of rb on MF output
- for (i=0; i<frame_parms->N_RB_DL*3; i++) {
-#if defined(__x86_64__) || defined(__i386__)
- rxdataF_comp128_0[i] = _mm_adds_epi16(_mm_srai_epi16(rxdataF_comp128_0[i],1),_mm_srai_epi16(rxdataF_comp128_1[i],1));
-#elif defined(__arm__)
- rxdataF_comp128_0[i] = vhaddq_s16(rxdataF_comp128_0[i],rxdataF_comp128_1[i]);
-#endif
- }
- }
-
-#if defined(__x86_64__) || defined(__i386__)
- rho128_0 = (__m128i *) &rho[0][symbol*frame_parms->N_RB_DL*12];
- rho128_1 = (__m128i *) &rho[1][symbol*frame_parms->N_RB_DL*12];
-#elif defined(__arm__)
- rho128_0 = (int16x8_t *) &rho[0][symbol*frame_parms->N_RB_DL*12];
- rho128_1 = (int16x8_t *) &rho[1][symbol*frame_parms->N_RB_DL*12];
-#endif
- for (i=0; i<frame_parms->N_RB_DL*3; i++) {
-#if defined(__x86_64__) || defined(__i386__)
- rho128_0[i] = _mm_adds_epi16(_mm_srai_epi16(rho128_0[i],1),_mm_srai_epi16(rho128_1[i],1));
-#elif defined(__arm__)
- rho128_0[i] = vhaddq_s16(rho128_0[i],rho128_1[i]);
-#endif
- }
-
-#if defined(__x86_64__) || defined(__i386__)
- rho128_i0 = (__m128i *) &rho_i[0][symbol*frame_parms->N_RB_DL*12];
- rho128_i1 = (__m128i *) &rho_i[1][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_i0 = (__m128i *)&rxdataF_comp_i[0][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_i1 = (__m128i *)&rxdataF_comp_i[1][symbol*frame_parms->N_RB_DL*12];
-#elif defined(__arm__)
- rho128_i0 = (int16x8_t*) &rho_i[0][symbol*frame_parms->N_RB_DL*12];
- rho128_i1 = (int16x8_t*) &rho_i[1][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_i0 = (int16x8_t *)&rxdataF_comp_i[0][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_i1 = (int16x8_t *)&rxdataF_comp_i[1][symbol*frame_parms->N_RB_DL*12];
-
-#endif
- // MRC on each re of rb on MF and rho
- for (i=0; i<frame_parms->N_RB_DL*3; i++) {
-#if defined(__x86_64__) || defined(__i386__)
- rxdataF_comp128_i0[i] = _mm_adds_epi16(_mm_srai_epi16(rxdataF_comp128_i0[i],1),_mm_srai_epi16(rxdataF_comp128_i1[i],1));
- rho128_i0[i] = _mm_adds_epi16(_mm_srai_epi16(rho128_i0[i],1),_mm_srai_epi16(rho128_i1[i],1));
-#elif defined(__arm__)
- rxdataF_comp128_i0[i] = vhaddq_s16(rxdataF_comp128_i0[i],rxdataF_comp128_i1[i]);
- rho128_i0[i] = vhaddq_s16(rho128_i0[i],rho128_i1[i]);
-
-#endif
- }
- }
-
-#if defined(__x86_64__) || defined(__i386__)
- _mm_empty();
- _m_empty();
-#endif
-}
-
-
-void pdcch_extract_rbs_single(int32_t **rxdataF,
- int32_t **dl_ch_estimates,
- int32_t **rxdataF_ext,
- int32_t **dl_ch_estimates_ext,
- uint8_t symbol,
- uint32_t high_speed_flag,
- LTE_DL_FRAME_PARMS *frame_parms)
-{
-
-
- uint16_t rb,nb_rb=0;
- uint8_t i,j,aarx;
- int32_t *dl_ch0,*dl_ch0_ext,*rxF,*rxF_ext;
-
-
- int nushiftmod3 = frame_parms->nushift%3;
- uint8_t symbol_mod;
-
- symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
-#ifdef DEBUG_DCI_DECODING
- LOG_I(PHY, "extract_rbs_single: symbol_mod %d\n",symbol_mod);
-#endif
-
- for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
-
- if (high_speed_flag == 1)
- dl_ch0 = &dl_ch_estimates[aarx][5+(symbol*(frame_parms->ofdm_symbol_size))];
- else
- dl_ch0 = &dl_ch_estimates[aarx][5];
-
- dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol*(frame_parms->N_RB_DL*12)];
-
- rxF_ext = &rxdataF_ext[aarx][symbol*(frame_parms->N_RB_DL*12)];
-
- rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + (symbol*(frame_parms->ofdm_symbol_size)))];
-
- if ((frame_parms->N_RB_DL&1) == 0) { // even number of RBs
- for (rb=0; rb<frame_parms->N_RB_DL; rb++) {
-
- // For second half of RBs skip DC carrier
- if (rb==(frame_parms->N_RB_DL>>1)) {
- rxF = &rxdataF[aarx][(1 + (symbol*(frame_parms->ofdm_symbol_size)))];
-
- //dl_ch0++;
- }
-
- if (symbol_mod>0) {
- memcpy(dl_ch0_ext,dl_ch0,12*sizeof(int32_t));
-
- for (i=0; i<12; i++) {
-
- rxF_ext[i]=rxF[i];
-
- }
-
- nb_rb++;
- dl_ch0_ext+=12;
- rxF_ext+=12;
-
- dl_ch0+=12;
- rxF+=12;
- } else {
- j=0;
-
- for (i=0; i<12; i++) {
- if ((i!=nushiftmod3) &&
- (i!=(nushiftmod3+3)) &&
- (i!=(nushiftmod3+6)) &&
- (i!=(nushiftmod3+9))) {
- rxF_ext[j]=rxF[i];
- // printf("extract rb %d, re %d => (%d,%d)\n",rb,i,*(short *)&rxF_ext[j],*(1+(short*)&rxF_ext[j]));
- dl_ch0_ext[j++]=dl_ch0[i];
- // printf("ch %d => (%d,%d)\n",i,*(short *)&dl_ch0[i],*(1+(short*)&dl_ch0[i]));
- }
- }
-
- nb_rb++;
- dl_ch0_ext+=8;
- rxF_ext+=8;
-
- dl_ch0+=12;
- rxF+=12;
- }
- }
- } else { // Odd number of RBs
- for (rb=0; rb<frame_parms->N_RB_DL>>1; rb++) {
-
- if (symbol_mod>0) {
- memcpy(dl_ch0_ext,dl_ch0,12*sizeof(int32_t));
-
- for (i=0; i<12; i++)
- rxF_ext[i]=rxF[i];
-
- nb_rb++;
- dl_ch0_ext+=12;
- rxF_ext+=12;
-
- dl_ch0+=12;
- rxF+=12;
- } else {
- j=0;
-
- for (i=0; i<12; i++) {
- if ((i!=nushiftmod3) &&
- (i!=(nushiftmod3+3)) &&
- (i!=(nushiftmod3+6)) &&
- (i!=(nushiftmod3+9))) {
- rxF_ext[j]=rxF[i];
- // printf("extract rb %d, re %d => (%d,%d)\n",rb,i,*(short *)&rxF_ext[j],*(1+(short*)&rxF_ext[j]));
- dl_ch0_ext[j++]=dl_ch0[i];
- // printf("ch %d => (%d,%d)\n",i,*(short *)&dl_ch0[i],*(1+(short*)&dl_ch0[i]));
- }
- }
-
- nb_rb++;
- dl_ch0_ext+=8;
- rxF_ext+=8;
-
- dl_ch0+=12;
- rxF+=12;
- }
- }
-
- // Do middle RB (around DC)
- // printf("dlch_ext %d\n",dl_ch0_ext-&dl_ch_estimates_ext[aarx][0]);
-
- if (symbol_mod==0) {
- j=0;
-
- for (i=0; i<6; i++) {
- if ((i!=nushiftmod3) &&
- (i!=(nushiftmod3+3))) {
- dl_ch0_ext[j]=dl_ch0[i];
- rxF_ext[j++]=rxF[i];
- // printf("**extract rb %d, re %d => (%d,%d)\n",rb,i,*(short *)&rxF_ext[j-1],*(1+(short*)&rxF_ext[j-1]));
- }
- }
-
- rxF = &rxdataF[aarx][((symbol*(frame_parms->ofdm_symbol_size)))];
-
- for (; i<12; i++) {
- if ((i!=(nushiftmod3+6)) &&
- (i!=(nushiftmod3+9))) {
- dl_ch0_ext[j]=dl_ch0[i];
- rxF_ext[j++]=rxF[(1+i-6)];
- // printf("**extract rb %d, re %d => (%d,%d)\n",rb,i,*(short *)&rxF_ext[j-1],*(1+(short*)&rxF_ext[j-1]));
- }
- }
-
-
- nb_rb++;
- dl_ch0_ext+=8;
- rxF_ext+=8;
- dl_ch0+=12;
- rxF+=7;
- rb++;
- } else {
- for (i=0; i<6; i++) {
- dl_ch0_ext[i]=dl_ch0[i];
- rxF_ext[i]=rxF[i];
- }
-
- rxF = &rxdataF[aarx][((symbol*(frame_parms->ofdm_symbol_size)))];
-
- for (; i<12; i++) {
- dl_ch0_ext[i]=dl_ch0[i];
- rxF_ext[i]=rxF[(1+i-6)];
- }
-
-
- nb_rb++;
- dl_ch0_ext+=12;
- rxF_ext+=12;
- dl_ch0+=12;
- rxF+=7;
- rb++;
- }
-
- for (; rb<frame_parms->N_RB_DL; rb++) {
- if (symbol_mod > 0) {
- memcpy(dl_ch0_ext,dl_ch0,12*sizeof(int32_t));
-
- for (i=0; i<12; i++)
- rxF_ext[i]=rxF[i];
-
- nb_rb++;
- dl_ch0_ext+=12;
- rxF_ext+=12;
-
- dl_ch0+=12;
- rxF+=12;
- } else {
- j=0;
-
- for (i=0; i<12; i++) {
- if ((i!=(nushiftmod3)) &&
- (i!=(nushiftmod3+3)) &&
- (i!=(nushiftmod3+6)) &&
- (i!=(nushiftmod3+9))) {
- rxF_ext[j]=rxF[i];
- // printf("extract rb %d, re %d => (%d,%d)\n",rb,i,*(short *)&rxF_ext[j],*(1+(short*)&rxF_ext[j]));
- dl_ch0_ext[j++]=dl_ch0[i];
- }
- }
-
- nb_rb++;
- dl_ch0_ext+=8;
- rxF_ext+=8;
-
- dl_ch0+=12;
- rxF+=12;
- }
- }
- }
- }
-}
-
-void pdcch_extract_rbs_dual(int32_t **rxdataF,
- int32_t **dl_ch_estimates,
- int32_t **rxdataF_ext,
- int32_t **dl_ch_estimates_ext,
- uint8_t symbol,
- uint32_t high_speed_flag,
- LTE_DL_FRAME_PARMS *frame_parms)
-{
-
-
- uint16_t rb,nb_rb=0;
- uint8_t i,aarx,j;
- int32_t *dl_ch0,*dl_ch0_ext,*dl_ch1,*dl_ch1_ext,*rxF,*rxF_ext;
- uint8_t symbol_mod;
- int nushiftmod3 = frame_parms->nushift%3;
-
- symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
-#ifdef DEBUG_DCI_DECODING
- LOG_I(PHY, "extract_rbs_dual: symbol_mod %d\n",symbol_mod);
-#endif
-
- for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
-
- if (high_speed_flag==1) {
- dl_ch0 = &dl_ch_estimates[aarx][5+(symbol*(frame_parms->ofdm_symbol_size))];
- dl_ch1 = &dl_ch_estimates[2+aarx][5+(symbol*(frame_parms->ofdm_symbol_size))];
- } else {
- dl_ch0 = &dl_ch_estimates[aarx][5];
- dl_ch1 = &dl_ch_estimates[2+aarx][5];
- }
-
- dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol*(frame_parms->N_RB_DL*12)];
- dl_ch1_ext = &dl_ch_estimates_ext[2+aarx][symbol*(frame_parms->N_RB_DL*12)];
-
- // printf("pdcch extract_rbs: rxF_ext pos %d\n",symbol*(frame_parms->N_RB_DL*12));
- rxF_ext = &rxdataF_ext[aarx][symbol*(frame_parms->N_RB_DL*12)];
-
- rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + (symbol*(frame_parms->ofdm_symbol_size)))];
-
- if ((frame_parms->N_RB_DL&1) == 0) // even number of RBs
- for (rb=0; rb<frame_parms->N_RB_DL; rb++) {
-
- // For second half of RBs skip DC carrier
- if (rb==(frame_parms->N_RB_DL>>1)) {
- rxF = &rxdataF[aarx][(1 + (symbol*(frame_parms->ofdm_symbol_size)))];
- // dl_ch0++;
- //dl_ch1++;
- }
-
- if (symbol_mod>0) {
- memcpy(dl_ch0_ext,dl_ch0,12*sizeof(int32_t));
- memcpy(dl_ch1_ext,dl_ch1,12*sizeof(int32_t));
-
- /*
- printf("rb %d\n",rb);
- for (i=0;i<12;i++)
- printf("(%d %d)",((int16_t *)dl_ch0)[i<<1],((int16_t*)dl_ch0)[1+(i<<1)]);
- printf("\n");
- */
- for (i=0; i<12; i++) {
- rxF_ext[i]=rxF[i];
- // printf("%d : (%d,%d)\n",(rxF+(2*i)-&rxdataF[aarx][( (symbol*(frame_parms->ofdm_symbol_size)))*2])/2,
- // ((int16_t*)&rxF[i<<1])[0],((int16_t*)&rxF[i<<1])[0]);
- }
-
- nb_rb++;
- dl_ch0_ext+=12;
- dl_ch1_ext+=12;
- rxF_ext+=12;
- } else {
- j=0;
-
- for (i=0; i<12; i++) {
- if ((i!=nushiftmod3) &&
- (i!=nushiftmod3+3) &&
- (i!=nushiftmod3+6) &&
- (i!=nushiftmod3+9)) {
- rxF_ext[j]=rxF[i];
- // printf("extract rb %d, re %d => (%d,%d)\n",rb,i,*(short *)&rxF_ext[j],*(1+(short*)&rxF_ext[j]));
- dl_ch0_ext[j] =dl_ch0[i];
- dl_ch1_ext[j++]=dl_ch1[i];
- }
- }
-
- nb_rb++;
- dl_ch0_ext+=8;
- dl_ch1_ext+=8;
- rxF_ext+=8;
- }
-
- dl_ch0+=12;
- dl_ch1+=12;
- rxF+=12;
- }
-
- else { // Odd number of RBs
- for (rb=0; rb<frame_parms->N_RB_DL>>1; rb++) {
-
- // printf("rb %d: %d\n",rb,rxF-&rxdataF[aarx][(symbol*(frame_parms->ofdm_symbol_size))*2]);
-
- if (symbol_mod>0) {
- memcpy(dl_ch0_ext,dl_ch0,12*sizeof(int32_t));
- memcpy(dl_ch1_ext,dl_ch1,12*sizeof(int32_t));
-
- for (i=0; i<12; i++)
- rxF_ext[i]=rxF[i];
-
- nb_rb++;
- dl_ch0_ext+=12;
- dl_ch1_ext+=12;
- rxF_ext+=12;
-
- dl_ch0+=12;
- dl_ch1+=12;
- rxF+=12;
-
- } else {
- j=0;
-
- for (i=0; i<12; i++) {
- if ((i!=nushiftmod3) &&
- (i!=nushiftmod3+3) &&
- (i!=nushiftmod3+6) &&
- (i!=nushiftmod3+9)) {
- rxF_ext[j]=rxF[i];
- // printf("extract rb %d, re %d => (%d,%d)\n",rb,i,*(short *)&rxF_ext[j],*(1+(short*)&rxF_ext[j]));
- dl_ch0_ext[j]=dl_ch0[i];
- dl_ch1_ext[j++]=dl_ch1[i];
- // printf("ch %d => (%d,%d)\n",i,*(short *)&dl_ch0[i],*(1+(short*)&dl_ch0[i]));
- }
- }
-
- nb_rb++;
- dl_ch0_ext+=8;
- dl_ch1_ext+=8;
- rxF_ext+=8;
-
-
- dl_ch0+=12;
- dl_ch1+=12;
- rxF+=12;
- }
- }
-
- // Do middle RB (around DC)
-
- if (symbol_mod > 0) {
- for (i=0; i<6; i++) {
- dl_ch0_ext[i]=dl_ch0[i];
- dl_ch1_ext[i]=dl_ch1[i];
- rxF_ext[i]=rxF[i];
- }
-
- rxF = &rxdataF[aarx][((symbol*(frame_parms->ofdm_symbol_size)))];
-
- for (; i<12; i++) {
- dl_ch0_ext[i]=dl_ch0[i];
- dl_ch1_ext[i]=dl_ch1[i];
- rxF_ext[i]=rxF[(1+i)];
- }
-
- nb_rb++;
- dl_ch0_ext+=12;
- dl_ch1_ext+=12;
- rxF_ext+=12;
-
- dl_ch0+=12;
- dl_ch1+=12;
- rxF+=7;
- rb++;
- } else {
- j=0;
-
- for (i=0; i<6; i++) {
- if ((i!=nushiftmod3) &&
- (i!=nushiftmod3+3)) {
- dl_ch0_ext[j]=dl_ch0[i];
- dl_ch1_ext[j]=dl_ch1[i];
- rxF_ext[j++]=rxF[i];
- // printf("**extract rb %d, re %d => (%d,%d)\n",rb,i,*(short *)&rxF_ext[j-1],*(1+(short*)&rxF_ext[j-1]));
- }
- }
-
- rxF = &rxdataF[aarx][((symbol*(frame_parms->ofdm_symbol_size)))];
-
- for (; i<12; i++) {
- if ((i!=nushiftmod3+6) &&
- (i!=nushiftmod3+9)) {
- dl_ch0_ext[j]=dl_ch0[i];
- dl_ch1_ext[j]=dl_ch1[i];
- rxF_ext[j++]=rxF[(1+i-6)];
- // printf("**extract rb %d, re %d => (%d,%d)\n",rb,i,*(short *)&rxF_ext[j-1],*(1+(short*)&rxF_ext[j-1]));
- }
- }
-
-
- nb_rb++;
- dl_ch0_ext+=8;
- dl_ch1_ext+=8;
- rxF_ext+=8;
- dl_ch0+=12;
- dl_ch1+=12;
- rxF+=7;
- rb++;
- }
-
- for (; rb<frame_parms->N_RB_DL; rb++) {
-
- if (symbol_mod>0) {
- // printf("rb %d: %d\n",rb,rxF-&rxdataF[aarx][(symbol*(frame_parms->ofdm_symbol_size))*2]);
- memcpy(dl_ch0_ext,dl_ch0,12*sizeof(int32_t));
- memcpy(dl_ch1_ext,dl_ch1,12*sizeof(int32_t));
-
- for (i=0; i<12; i++)
- rxF_ext[i]=rxF[i];
-
- nb_rb++;
- dl_ch0_ext+=12;
- dl_ch1_ext+=12;
- rxF_ext+=12;
-
- dl_ch0+=12;
- dl_ch1+=12;
- rxF+=12;
- } else {
- j=0;
-
- for (i=0; i<12; i++) {
- if ((i!=nushiftmod3) &&
- (i!=nushiftmod3+3) &&
- (i!=nushiftmod3+6) &&
- (i!=nushiftmod3+9)) {
- rxF_ext[j]=rxF[i];
- // printf("extract rb %d, re %d => (%d,%d)\n",rb,i,*(short *)&rxF_ext[j],*(1+(short*)&rxF_ext[j]));
- dl_ch0_ext[j]=dl_ch0[i];
- dl_ch1_ext[j++]=dl_ch1[i];
- }
- }
-
- nb_rb++;
- dl_ch0_ext+=8;
- dl_ch1_ext+=8;
- rxF_ext+=8;
-
- dl_ch0+=12;
- dl_ch1+=12;
- rxF+=12;
- }
- }
- }
- }
-}
-
-
-void pdcch_channel_compensation(int32_t **rxdataF_ext,
- int32_t **dl_ch_estimates_ext,
- int32_t **rxdataF_comp,
- int32_t **rho,
- LTE_DL_FRAME_PARMS *frame_parms,
- uint8_t symbol,
- uint8_t output_shift)
-{
-
- uint16_t rb;
-#if defined(__x86_64__) || defined(__i386__)
- __m128i *dl_ch128,*rxdataF128,*rxdataF_comp128;
- __m128i *dl_ch128_2, *rho128;
-#elif defined(__arm__)
-
-#endif
- uint8_t aatx,aarx,pilots=0;
-
-
-
-
-#ifdef DEBUG_DCI_DECODING
- LOG_I(PHY, "PDCCH comp: symbol %d\n",symbol);
-#endif
-
- if (symbol==0)
- pilots=1;
-
- for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++) {
- //if (frame_parms->mode1_flag && aatx>0) break; //if mode1_flag is set then there is only one stream to extract, independent of nb_antenna_ports_eNB
-
- for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
-
-#if defined(__x86_64__) || defined(__i386__)
- dl_ch128 = (__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*frame_parms->N_RB_DL*12];
- rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128 = (__m128i *)&rxdataF_comp[(aatx<<1)+aarx][symbol*frame_parms->N_RB_DL*12];
-
-#elif defined(__arm__)
-
-#endif
-
- for (rb=0; rb<frame_parms->N_RB_DL; rb++) {
-
-#if defined(__x86_64__) || defined(__i386__)
- // multiply by conjugated channel
- mmtmpPD0 = _mm_madd_epi16(dl_ch128[0],rxdataF128[0]);
- // print_ints("re",&mmtmpPD0);
-
- // mmtmpPD0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpPD1 = _mm_shufflelo_epi16(dl_ch128[0],_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_shufflehi_epi16(mmtmpPD1,_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_sign_epi16(mmtmpPD1,*(__m128i*)&conjugate[0]);
- // print_ints("im",&mmtmpPD1);
- mmtmpPD1 = _mm_madd_epi16(mmtmpPD1,rxdataF128[0]);
- // mmtmpPD1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpPD0 = _mm_srai_epi32(mmtmpPD0,output_shift);
- // print_ints("re(shift)",&mmtmpPD0);
- mmtmpPD1 = _mm_srai_epi32(mmtmpPD1,output_shift);
- // print_ints("im(shift)",&mmtmpPD1);
- mmtmpPD2 = _mm_unpacklo_epi32(mmtmpPD0,mmtmpPD1);
- mmtmpPD3 = _mm_unpackhi_epi32(mmtmpPD0,mmtmpPD1);
- // print_ints("c0",&mmtmpPD2);
- // print_ints("c1",&mmtmpPD3);
- rxdataF_comp128[0] = _mm_packs_epi32(mmtmpPD2,mmtmpPD3);
- // print_shorts("rx:",rxdataF128);
- // print_shorts("ch:",dl_ch128);
- // print_shorts("pack:",rxdataF_comp128);
-
- // multiply by conjugated channel
- mmtmpPD0 = _mm_madd_epi16(dl_ch128[1],rxdataF128[1]);
- // mmtmpPD0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpPD1 = _mm_shufflelo_epi16(dl_ch128[1],_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_shufflehi_epi16(mmtmpPD1,_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_sign_epi16(mmtmpPD1,*(__m128i*)conjugate);
- mmtmpPD1 = _mm_madd_epi16(mmtmpPD1,rxdataF128[1]);
- // mmtmpPD1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpPD0 = _mm_srai_epi32(mmtmpPD0,output_shift);
- mmtmpPD1 = _mm_srai_epi32(mmtmpPD1,output_shift);
- mmtmpPD2 = _mm_unpacklo_epi32(mmtmpPD0,mmtmpPD1);
- mmtmpPD3 = _mm_unpackhi_epi32(mmtmpPD0,mmtmpPD1);
-
- rxdataF_comp128[1] = _mm_packs_epi32(mmtmpPD2,mmtmpPD3);
-
- // print_shorts("rx:",rxdataF128+1);
- // print_shorts("ch:",dl_ch128+1);
- // print_shorts("pack:",rxdataF_comp128+1);
- // multiply by conjugated channel
- if (pilots == 0) {
- mmtmpPD0 = _mm_madd_epi16(dl_ch128[2],rxdataF128[2]);
- // mmtmpPD0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpPD1 = _mm_shufflelo_epi16(dl_ch128[2],_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_shufflehi_epi16(mmtmpPD1,_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_sign_epi16(mmtmpPD1,*(__m128i*)conjugate);
- mmtmpPD1 = _mm_madd_epi16(mmtmpPD1,rxdataF128[2]);
- // mmtmpPD1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpPD0 = _mm_srai_epi32(mmtmpPD0,output_shift);
- mmtmpPD1 = _mm_srai_epi32(mmtmpPD1,output_shift);
- mmtmpPD2 = _mm_unpacklo_epi32(mmtmpPD0,mmtmpPD1);
- mmtmpPD3 = _mm_unpackhi_epi32(mmtmpPD0,mmtmpPD1);
-
- rxdataF_comp128[2] = _mm_packs_epi32(mmtmpPD2,mmtmpPD3);
- }
-
- // print_shorts("rx:",rxdataF128+2);
- // print_shorts("ch:",dl_ch128+2);
- // print_shorts("pack:",rxdataF_comp128+2);
-
- if (pilots==0) {
- dl_ch128+=3;
- rxdataF128+=3;
- rxdataF_comp128+=3;
- } else {
- dl_ch128+=2;
- rxdataF128+=2;
- rxdataF_comp128+=2;
- }
-#elif defined(__arm__)
-
-#endif
- }
- }
- }
-
-
- if (rho) {
-
- for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
-
-#if defined(__x86_64__) || defined(__i386__)
- rho128 = (__m128i *)&rho[aarx][symbol*frame_parms->N_RB_DL*12];
- dl_ch128 = (__m128i *)&dl_ch_estimates_ext[aarx][symbol*frame_parms->N_RB_DL*12];
- dl_ch128_2 = (__m128i *)&dl_ch_estimates_ext[2+aarx][symbol*frame_parms->N_RB_DL*12];
-
-#elif defined(__arm__)
-
-#endif
- for (rb=0; rb<frame_parms->N_RB_DL; rb++) {
-#if defined(__x86_64__) || defined(__i386__)
-
- // multiply by conjugated channel
- mmtmpPD0 = _mm_madd_epi16(dl_ch128[0],dl_ch128_2[0]);
- // print_ints("re",&mmtmpD0);
-
- // mmtmpD0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpPD1 = _mm_shufflelo_epi16(dl_ch128[0],_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_shufflehi_epi16(mmtmpPD1,_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_sign_epi16(mmtmpPD1,*(__m128i*)&conjugate[0]);
- // print_ints("im",&mmtmpPD1);
- mmtmpPD1 = _mm_madd_epi16(mmtmpPD1,dl_ch128_2[0]);
- // mmtmpPD1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpPD0 = _mm_srai_epi32(mmtmpPD0,output_shift);
- // print_ints("re(shift)",&mmtmpD0);
- mmtmpPD1 = _mm_srai_epi32(mmtmpPD1,output_shift);
- // print_ints("im(shift)",&mmtmpD1);
- mmtmpPD2 = _mm_unpacklo_epi32(mmtmpPD0,mmtmpPD1);
- mmtmpPD3 = _mm_unpackhi_epi32(mmtmpPD0,mmtmpPD1);
- // print_ints("c0",&mmtmpPD2);
- // print_ints("c1",&mmtmpPD3);
- rho128[0] = _mm_packs_epi32(mmtmpPD2,mmtmpPD3);
-
- //print_shorts("rx:",dl_ch128_2);
- //print_shorts("ch:",dl_ch128);
- //print_shorts("pack:",rho128);
-
- // multiply by conjugated channel
- mmtmpPD0 = _mm_madd_epi16(dl_ch128[1],dl_ch128_2[1]);
- // mmtmpD0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpPD1 = _mm_shufflelo_epi16(dl_ch128[1],_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_shufflehi_epi16(mmtmpPD1,_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_sign_epi16(mmtmpPD1,*(__m128i*)conjugate);
- mmtmpPD1 = _mm_madd_epi16(mmtmpPD1,dl_ch128_2[1]);
- // mmtmpD1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpPD0 = _mm_srai_epi32(mmtmpPD0,output_shift);
- mmtmpPD1 = _mm_srai_epi32(mmtmpPD1,output_shift);
- mmtmpPD2 = _mm_unpacklo_epi32(mmtmpPD0,mmtmpPD1);
- mmtmpPD3 = _mm_unpackhi_epi32(mmtmpPD0,mmtmpPD1);
-
-
- rho128[1] =_mm_packs_epi32(mmtmpPD2,mmtmpPD3);
- //print_shorts("rx:",dl_ch128_2+1);
- //print_shorts("ch:",dl_ch128+1);
- //print_shorts("pack:",rho128+1);
- // multiply by conjugated channel
- mmtmpPD0 = _mm_madd_epi16(dl_ch128[2],dl_ch128_2[2]);
- // mmtmpPD0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpPD1 = _mm_shufflelo_epi16(dl_ch128[2],_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_shufflehi_epi16(mmtmpPD1,_MM_SHUFFLE(2,3,0,1));
- mmtmpPD1 = _mm_sign_epi16(mmtmpPD1,*(__m128i*)conjugate);
- mmtmpPD1 = _mm_madd_epi16(mmtmpPD1,dl_ch128_2[2]);
- // mmtmpPD1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpPD0 = _mm_srai_epi32(mmtmpPD0,output_shift);
- mmtmpPD1 = _mm_srai_epi32(mmtmpPD1,output_shift);
- mmtmpPD2 = _mm_unpacklo_epi32(mmtmpPD0,mmtmpPD1);
- mmtmpPD3 = _mm_unpackhi_epi32(mmtmpPD0,mmtmpPD1);
-
- rho128[2] = _mm_packs_epi32(mmtmpPD2,mmtmpPD3);
- //print_shorts("rx:",dl_ch128_2+2);
- //print_shorts("ch:",dl_ch128+2);
- //print_shorts("pack:",rho128+2);
-
- dl_ch128+=3;
- dl_ch128_2+=3;
- rho128+=3;
-
-#elif defined(__arm_)
-
-
-#endif
- }
- }
-
- }
-
-#if defined(__x86_64__) || defined(__i386__)
- _mm_empty();
- _m_empty();
-#endif
-}
-
-void pdcch_detection_mrc(LTE_DL_FRAME_PARMS *frame_parms,
- int32_t **rxdataF_comp,
- uint8_t symbol)
-{
-
- uint8_t aatx;
-
-#if defined(__x86_64__) || defined(__i386__)
- __m128i *rxdataF_comp128_0,*rxdataF_comp128_1;
-#elif defined(__arm__)
- int16x8_t *rxdataF_comp128_0,*rxdataF_comp128_1;
-#endif
- int32_t i;
-
- if (frame_parms->nb_antennas_rx>1) {
- for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++) {
-#if defined(__x86_64__) || defined(__i386__)
- rxdataF_comp128_0 = (__m128i *)&rxdataF_comp[(aatx<<1)][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_1 = (__m128i *)&rxdataF_comp[(aatx<<1)+1][symbol*frame_parms->N_RB_DL*12];
-#elif defined(__arm__)
- rxdataF_comp128_0 = (int16x8_t *)&rxdataF_comp[(aatx<<1)][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_1 = (int16x8_t *)&rxdataF_comp[(aatx<<1)+1][symbol*frame_parms->N_RB_DL*12];
-#endif
- // MRC on each re of rb
- for (i=0; i<frame_parms->N_RB_DL*3; i++) {
-#if defined(__x86_64__) || defined(__i386__)
- rxdataF_comp128_0[i] = _mm_adds_epi16(_mm_srai_epi16(rxdataF_comp128_0[i],1),_mm_srai_epi16(rxdataF_comp128_1[i],1));
-#elif defined(__arm__)
- rxdataF_comp128_0[i] = vhaddq_s16(rxdataF_comp128_0[i],rxdataF_comp128_1[i]);
-#endif
- }
- }
- }
-
-#if defined(__x86_64__) || defined(__i386__)
- _mm_empty();
- _m_empty();
-#endif
-
-}
-
-void pdcch_siso(LTE_DL_FRAME_PARMS *frame_parms,
- int32_t **rxdataF_comp,
- uint8_t l)
-{
-
-
- uint8_t rb,re,jj,ii;
-
- jj=0;
- ii=0;
-
- for (rb=0; rb<frame_parms->N_RB_DL; rb++) {
-
- for (re=0; re<12; re++) {
-
- rxdataF_comp[0][jj++] = rxdataF_comp[0][ii];
- ii++;
- }
- }
-}
-
-
-void pdcch_alamouti(LTE_DL_FRAME_PARMS *frame_parms,
- int32_t **rxdataF_comp,
- uint8_t symbol)
-{
-
-
- int16_t *rxF0,*rxF1;
- uint8_t rb,re;
- int32_t jj=(symbol*frame_parms->N_RB_DL*12);
-
- rxF0 = (int16_t*)&rxdataF_comp[0][jj]; //tx antenna 0 h0*y
- rxF1 = (int16_t*)&rxdataF_comp[2][jj]; //tx antenna 1 h1*y
-
- for (rb=0; rb<frame_parms->N_RB_DL; rb++) {
-
- for (re=0; re<12; re+=2) {
-
- // Alamouti RX combining
-
- rxF0[0] = rxF0[0] + rxF1[2];
- rxF0[1] = rxF0[1] - rxF1[3];
-
- rxF0[2] = rxF0[2] - rxF1[0];
- rxF0[3] = rxF0[3] + rxF1[1];
-
- rxF0+=4;
- rxF1+=4;
- }
- }
-
-
-}
-
-int32_t avgP[4];
-
-int32_t rx_pdcch(PHY_VARS_UE *ue,
- uint32_t frame,
- uint8_t subframe,
- uint8_t eNB_id,
- MIMO_mode_t mimo_mode,
- uint32_t high_speed_flag,
- uint8_t is_secondary_ue)
-{
-
- LTE_UE_COMMON *common_vars = &ue->common_vars;
- LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
- LTE_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[subframe]];
-
- uint8_t log2_maxh,aatx,aarx;
-#ifdef MU_RECEIVER
- uint8_t eNB_id_i=eNB_id+1;//add 1 to eNB_id to separate from wanted signal, chosen as the B/F'd pilots from the SeNB are shifted by 1
-#endif
- int32_t avgs;
- uint8_t n_pdcch_symbols;
- uint8_t mi = get_mi(frame_parms,subframe);
-
- //printf("In rx_pdcch, subframe %d, eNB_id %d, pdcch_vars %d \n",subframe,eNB_id,pdcch_vars);
- // procress ofdm symbol 0
- if (is_secondary_ue == 1) {
- pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF,
- common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].dl_ch_estimates[eNB_id+1], //add 1 to eNB_id to compensate for the shifted B/F'd pilots from the SeNB
- pdcch_vars[eNB_id]->rxdataF_ext,
- pdcch_vars[eNB_id]->dl_ch_estimates_ext,
- 0,
- high_speed_flag,
- frame_parms);
-#ifdef MU_RECEIVER
- pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF,
- common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].dl_ch_estimates[eNB_id_i - 1],//subtract 1 to eNB_id_i to compensate for the non-shifted pilots from the PeNB
- pdcch_vars[eNB_id_i]->rxdataF_ext,//shift by two to simulate transmission from a second antenna
- pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,//shift by two to simulate transmission from a second antenna
- 0,
- high_speed_flag,
- frame_parms);
-#endif //MU_RECEIVER
- } else if (frame_parms->nb_antenna_ports_eNB>1) {
- pdcch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF,
- common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].dl_ch_estimates[eNB_id],
- pdcch_vars[eNB_id]->rxdataF_ext,
- pdcch_vars[eNB_id]->dl_ch_estimates_ext,
- 0,
- high_speed_flag,
- frame_parms);
- } else {
- pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF,
- common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].dl_ch_estimates[eNB_id],
- pdcch_vars[eNB_id]->rxdataF_ext,
- pdcch_vars[eNB_id]->dl_ch_estimates_ext,
- 0,
- high_speed_flag,
- frame_parms);
- }
-
-
- // compute channel level based on ofdm symbol 0
- pdcch_channel_level(pdcch_vars[eNB_id]->dl_ch_estimates_ext,
- frame_parms,
- avgP,
- frame_parms->N_RB_DL);
-
- avgs = 0;
-
- for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++)
- for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++)
- avgs = cmax(avgs,avgP[(aarx<<1)+aatx]);
-
- log2_maxh = (log2_approx(avgs)/2) + 5; //+frame_parms->nb_antennas_rx;
-#ifdef UE_DEBUG_TRACE
- LOG_D(PHY,"subframe %d: pdcch log2_maxh = %d (%d,%d)\n",subframe,log2_maxh,avgP[0],avgs);
-#endif
-
- T(T_UE_PHY_PDCCH_ENERGY, T_INT(eNB_id), T_INT(frame%1024), T_INT(subframe),
- T_INT(avgP[0]), T_INT(avgP[1]), T_INT(avgP[2]), T_INT(avgP[3]));
-
- // compute LLRs for ofdm symbol 0 only
- pdcch_channel_compensation(pdcch_vars[eNB_id]->rxdataF_ext,
- pdcch_vars[eNB_id]->dl_ch_estimates_ext,
- pdcch_vars[eNB_id]->rxdataF_comp,
- (aatx>1) ? pdcch_vars[eNB_id]->rho : NULL,
- frame_parms,
- 0,
- log2_maxh); // log2_maxh+I0_shift
-
-
-#ifdef DEBUG_PHY
-
- if (subframe==5)
- write_output("rxF_comp_d.m","rxF_c_d",&pdcch_vars[eNB_id]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
-
-#endif
-
-#ifdef MU_RECEIVER
-
- if (is_secondary_ue) {
- //get MF output for interfering stream
- pdcch_channel_compensation(pdcch_vars[eNB_id_i]->rxdataF_ext,
- pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,
- pdcch_vars[eNB_id_i]->rxdataF_comp,
- (aatx>1) ? pdcch_vars[eNB_id_i]->rho : NULL,
- frame_parms,
- 0,
- log2_maxh); // log2_maxh+I0_shift
-#ifdef DEBUG_PHY
- write_output("rxF_comp_i.m","rxF_c_i",&pdcch_vars[eNB_id_i]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
-#endif
- pdcch_dual_stream_correlation(frame_parms,
- 0,
- pdcch_vars[eNB_id]->dl_ch_estimates_ext,
- pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,
- pdcch_vars[eNB_id]->dl_ch_rho_ext,
- log2_maxh);
- }
-
-#endif //MU_RECEIVER
-
-
- if (frame_parms->nb_antennas_rx > 1) {
-#ifdef MU_RECEIVER
-
- if (is_secondary_ue) {
- pdcch_detection_mrc_i(frame_parms,
- pdcch_vars[eNB_id]->rxdataF_comp,
- pdcch_vars[eNB_id_i]->rxdataF_comp,
- pdcch_vars[eNB_id]->rho,
- pdcch_vars[eNB_id]->dl_ch_rho_ext,
- 0);
-#ifdef DEBUG_PHY
- write_output("rxF_comp_d.m","rxF_c_d",&pdcch_vars[eNB_id]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
- write_output("rxF_comp_i.m","rxF_c_i",&pdcch_vars[eNB_id_i]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
-#endif
- } else
-#endif //MU_RECEIVER
- pdcch_detection_mrc(frame_parms,
- pdcch_vars[eNB_id]->rxdataF_comp,
- 0);
- }
-
- if (mimo_mode == SISO)
- pdcch_siso(frame_parms,pdcch_vars[eNB_id]->rxdataF_comp,0);
- else
- pdcch_alamouti(frame_parms,pdcch_vars[eNB_id]->rxdataF_comp,0);
-
-
-#ifdef MU_RECEIVER
-
- if (is_secondary_ue) {
- pdcch_qpsk_qpsk_llr(frame_parms,
- pdcch_vars[eNB_id]->rxdataF_comp,
- pdcch_vars[eNB_id_i]->rxdataF_comp,
- pdcch_vars[eNB_id]->dl_ch_rho_ext,
- pdcch_vars[eNB_id]->llr16, //subsequent function require 16 bit llr, but output must be 8 bit (actually clipped to 4, because of the Viterbi decoder)
- pdcch_vars[eNB_id]->llr,
- 0);
- /*
- #ifdef DEBUG_PHY
- if (subframe==5) {
- write_output("llr8_seq.m","llr8",&pdcch_vars[eNB_id]->llr[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
- write_output("llr16_seq.m","llr16",&pdcch_vars[eNB_id]->llr16[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
- }
- #endif*/
- } else {
-#endif //MU_RECEIVER
- pdcch_llr(frame_parms,
- pdcch_vars[eNB_id]->rxdataF_comp,
- (char *)pdcch_vars[eNB_id]->llr,
- 0);
- /*#ifdef DEBUG_PHY
- write_output("llr8_seq.m","llr8",&pdcch_vars[eNB_id]->llr[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
- #endif*/
-
-#ifdef MU_RECEIVER
- }
-
-#endif //MU_RECEIVER
-
-
- // decode pcfich here and find out pdcch ofdm symbol number
- n_pdcch_symbols = rx_pcfich(frame_parms,
- subframe,
- pdcch_vars[eNB_id],
- mimo_mode);
-
-
- if (n_pdcch_symbols>3)
- n_pdcch_symbols=1;
-
-#if T_TRACER
- T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL),
- T_INT(n_pdcch_symbols),
- T_BUFFER(pdcch_vars[eNB_id]->rxdataF_comp, frame_parms->N_RB_DL*12*n_pdcch_symbols* 4));
-#endif
-
-
-#ifdef DEBUG_DCI_DECODING
-
- LOG_I(PHY,"demapping: subframe %d, mi %d, tdd_config %d\n",subframe,get_mi(frame_parms,subframe),frame_parms->tdd_config);
-#endif
-
- // process pdcch ofdm symbol 1 and 2 if necessary
- for (int s=1; s<n_pdcch_symbols; s++){
- if (is_secondary_ue == 1) {
- pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF,
- common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].dl_ch_estimates[eNB_id+1], //add 1 to eNB_id to compensate for the shifted B/F'd pilots from the SeNB
- pdcch_vars[eNB_id]->rxdataF_ext,
- pdcch_vars[eNB_id]->dl_ch_estimates_ext,
- s,
- high_speed_flag,
- frame_parms);
-#ifdef MU_RECEIVER
-pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF,
- common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].dl_ch_estimates[eNB_id_i - 1],//subtract 1 to eNB_id_i to compensate for the non-shifted pilots from the PeNB
- pdcch_vars[eNB_id_i]->rxdataF_ext,//shift by two to simulate transmission from a second antenna
- pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,//shift by two to simulate transmission from a second antenna
- s,
- high_speed_flag,
- frame_parms);
-#endif //MU_RECEIVER
- } else if (frame_parms->nb_antenna_ports_eNB>1) {
- pdcch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF,
- common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].dl_ch_estimates[eNB_id],
- pdcch_vars[eNB_id]->rxdataF_ext,
- pdcch_vars[eNB_id]->dl_ch_estimates_ext,
- s,
- high_speed_flag,
- frame_parms);
- } else {
- pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF,
- common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].dl_ch_estimates[eNB_id],
- pdcch_vars[eNB_id]->rxdataF_ext,
- pdcch_vars[eNB_id]->dl_ch_estimates_ext,
- s,
- high_speed_flag,
- frame_parms);
- }
-
-
- pdcch_channel_compensation(pdcch_vars[eNB_id]->rxdataF_ext,
- pdcch_vars[eNB_id]->dl_ch_estimates_ext,
- pdcch_vars[eNB_id]->rxdataF_comp,
- (aatx>1) ? pdcch_vars[eNB_id]->rho : NULL,
- frame_parms,
- s,
- log2_maxh); // log2_maxh+I0_shift
-
-
-#ifdef DEBUG_PHY
-
-if (subframe==5)
- write_output("rxF_comp_d.m","rxF_c_d",&pdcch_vars[eNB_id]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
-
-#endif
-
-#ifdef MU_RECEIVER
-
-if (is_secondary_ue) {
- //get MF output for interfering stream
- pdcch_channel_compensation(pdcch_vars[eNB_id_i]->rxdataF_ext,
- pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,
- pdcch_vars[eNB_id_i]->rxdataF_comp,
- (aatx>1) ? pdcch_vars[eNB_id_i]->rho : NULL,
- frame_parms,
- s,
- log2_maxh); // log2_maxh+I0_shift
-#ifdef DEBUG_PHY
-write_output("rxF_comp_i.m","rxF_c_i",&pdcch_vars[eNB_id_i]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
-#endif
-pdcch_dual_stream_correlation(frame_parms,
- s,
- pdcch_vars[eNB_id]->dl_ch_estimates_ext,
- pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,
- pdcch_vars[eNB_id]->dl_ch_rho_ext,
- log2_maxh);
-}
-
-#endif //MU_RECEIVER
-
-
-if (frame_parms->nb_antennas_rx > 1) {
-#ifdef MU_RECEIVER
-
- if (is_secondary_ue) {
- pdcch_detection_mrc_i(frame_parms,
- pdcch_vars[eNB_id]->rxdataF_comp,
- pdcch_vars[eNB_id_i]->rxdataF_comp,
- pdcch_vars[eNB_id]->rho,
- pdcch_vars[eNB_id]->dl_ch_rho_ext,
- s);
-#ifdef DEBUG_PHY
-write_output("rxF_comp_d.m","rxF_c_d",&pdcch_vars[eNB_id]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
-write_output("rxF_comp_i.m","rxF_c_i",&pdcch_vars[eNB_id_i]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
-#endif
- } else
-#endif //MU_RECEIVER
- pdcch_detection_mrc(frame_parms,
- pdcch_vars[eNB_id]->rxdataF_comp,
- s);
-
-}
-
-if (mimo_mode == SISO)
- pdcch_siso(frame_parms,pdcch_vars[eNB_id]->rxdataF_comp,s);
-else
- pdcch_alamouti(frame_parms,pdcch_vars[eNB_id]->rxdataF_comp,s);
-
-
-#ifdef MU_RECEIVER
-
-if (is_secondary_ue) {
- pdcch_qpsk_qpsk_llr(frame_parms,
- pdcch_vars[eNB_id]->rxdataF_comp,
- pdcch_vars[eNB_id_i]->rxdataF_comp,
- pdcch_vars[eNB_id]->dl_ch_rho_ext,
- pdcch_vars[eNB_id]->llr16, //subsequent function require 16 bit llr, but output must be 8 bit (actually clipped to 4, because of the Viterbi decoder)
- pdcch_vars[eNB_id]->llr,
- s);
- /*
- #ifdef DEBUG_PHY
- if (subframe==5) {
- write_output("llr8_seq.m","llr8",&pdcch_vars[eNB_id]->llr[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
- write_output("llr16_seq.m","llr16",&pdcch_vars[eNB_id]->llr16[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
- }
- #endif*/
-} else {
-#endif //MU_RECEIVER
- pdcch_llr(frame_parms,
- pdcch_vars[eNB_id]->rxdataF_comp,
- (char *)pdcch_vars[eNB_id]->llr,
- s);
- /*#ifdef DEBUG_PHY
- write_output("llr8_seq.m","llr8",&pdcch_vars[eNB_id]->llr[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
- #endif*/
-
-#ifdef MU_RECEIVER
-}
-
-#endif //MU_RECEIVER
-
- }
-
- pdcch_demapping(pdcch_vars[eNB_id]->llr,
- pdcch_vars[eNB_id]->wbar,
- frame_parms,
- n_pdcch_symbols,
- get_mi(frame_parms,subframe));
-
- pdcch_deinterleaving(frame_parms,
- (uint16_t*)pdcch_vars[eNB_id]->e_rx,
- pdcch_vars[eNB_id]->wbar,
- n_pdcch_symbols,
- mi);
-
- pdcch_unscrambling(frame_parms,
- subframe,
- pdcch_vars[eNB_id]->e_rx,
- get_nCCE(n_pdcch_symbols,frame_parms,mi)*72);
-
- pdcch_vars[eNB_id]->num_pdcch_symbols = n_pdcch_symbols;
-
- return(0);
-}
-
-
void pdcch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
uint8_t *e,
@@ -2068,131 +309,26 @@ void pdcch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
int i;
uint8_t reset;
uint32_t x1, x2, s=0;
-
- //LOG_D(PHY, "%s(fp, subframe:%d, e, length:%d)\n", __FUNCTION__, subframe, length);
-
- reset = 1;
- // x1 is set in lte_gold_generic
-
- x2 = (subframe<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.8.2
-
- for (i=0; i<length; i++) {
- if ((i&0x1f)==0) {
- s = lte_gold_generic(&x1, &x2, reset);
- //printf("lte_gold[%d]=%x\n",i,s);
- reset = 0;
- }
-
- // printf("scrambling %d : e %d, c %d\n",i,e[i],((s>>(i&0x1f))&1));
- if (e[i] != 2) // <NIL> element is 2
- e[i] = (e[i]&1) ^ ((s>>(i&0x1f))&1);
- }
-}
-
-void pdcch_unscrambling(LTE_DL_FRAME_PARMS *frame_parms,
- uint8_t subframe,
- int8_t* llr,
- uint32_t length)
-{
-
- int i;
- uint8_t reset;
- uint32_t x1, x2, s=0;
+
+ //LOG_D(PHY, "%s(fp, subframe:%d, e, length:%d)\n", __FUNCTION__, subframe, length);
reset = 1;
- // x1 is set in first call to lte_gold_generic
+ // x1 is set in lte_gold_generic
x2 = (subframe<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.8.2
for (i=0; i<length; i++) {
if ((i&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
- // printf("lte_gold[%d]=%x\n",i,s);
+ //printf("lte_gold[%d]=%x\n",i,s);
reset = 0;
}
-
- // printf("unscrambling %d : e %d, c %d => ",i,llr[i],((s>>(i&0x1f))&1));
- if (((s>>(i%32))&1)==0)
- llr[i] = -llr[i];
- // printf("%d\n",llr[i]);
-
- }
-}
-
-/*
-uint8_t get_num_pdcch_symbols(uint8_t num_dci,
- DCI_ALLOC_t *dci_alloc,
- LTE_DL_FRAME_PARMS *frame_parms,
- uint8_t subframe)
-{
-
- uint16_t numCCE = 0;
- uint8_t i;
- uint8_t nCCEmin = 0;
- uint16_t CCE_max_used_index = 0;
- uint16_t firstCCE_max = dci_alloc[0].firstCCE;
- uint8_t L = dci_alloc[0].L;
-
- // check pdcch duration imposed by PHICH duration (Section 6.9 of 36-211)
- if (frame_parms->Ncp==1) { // extended prefix
- if ((frame_parms->frame_type == TDD) &&
- ((frame_parms->tdd_config<3)||(frame_parms->tdd_config==6)) &&
- ((subframe==1) || (subframe==6))) // subframes 1 and 6 (S-subframes) for 5ms switching periodicity are 2 symbols
- nCCEmin = 2;
- else { // 10ms switching periodicity is always 3 symbols, any DL-only subframe is 3 symbols
- nCCEmin = 3;
- }
- }
-
- // compute numCCE
- for (i=0; i<num_dci; i++) {
- // printf("dci %d => %d\n",i,dci_alloc[i].L);
- numCCE += (1<<(dci_alloc[i].L));
-
- if(firstCCE_max < dci_alloc[i].firstCCE) {
- firstCCE_max = dci_alloc[i].firstCCE;
- L = dci_alloc[i].L;
- }
- }
- CCE_max_used_index = firstCCE_max + (1<<L) - 1;
-
- //if ((9*numCCE) <= (frame_parms->N_RB_DL*2))
- if (CCE_max_used_index < get_nCCE(1, frame_parms, get_mi(frame_parms, subframe)))
- return(cmax(1,nCCEmin));
- //else if ((9*numCCE) <= (frame_parms->N_RB_DL*((frame_parms->nb_antenna_ports_eNB==4) ? 4 : 5)))
- else if (CCE_max_used_index < get_nCCE(2, frame_parms, get_mi(frame_parms, subframe)))
- return(cmax(2,nCCEmin));
- //else if ((9*numCCE) <= (frame_parms->N_RB_DL*((frame_parms->nb_antenna_ports_eNB==4) ? 7 : 8)))
- else if (CCE_max_used_index < get_nCCE(3, frame_parms, get_mi(frame_parms, subframe)))
- return(cmax(3,nCCEmin));
- else if (frame_parms->N_RB_DL<=10) {
- if (frame_parms->Ncp == 0) { // normal CP
- printf("numCCE %d, N_RB_DL = %d : should be returning 4 PDCCH symbols (%d,%d,%d)\n",numCCE,frame_parms->N_RB_DL,
- get_nCCE(1, frame_parms, get_mi(frame_parms, subframe)),
- get_nCCE(2, frame_parms, get_mi(frame_parms, subframe)),
- get_nCCE(3, frame_parms, get_mi(frame_parms, subframe)));
-
- if ((9*numCCE) <= (frame_parms->N_RB_DL*((frame_parms->nb_antenna_ports_eNB==4) ? 10 : 11)))
- return(4);
- } else { // extended CP
- if ((9*numCCE) <= (frame_parms->N_RB_DL*((frame_parms->nb_antenna_ports_eNB==4) ? 9 : 10)))
- return(4);
- }
+ // printf("scrambling %d : e %d, c %d\n",i,e[i],((s>>(i&0x1f))&1));
+ if (e[i] != 2) // <NIL> element is 2
+ e[i] = (e[i]&1) ^ ((s>>(i&0x1f))&1);
}
-
-
-
- // LOG_I(PHY," dci.c: get_num_pdcch_symbols subframe %d FATAL, illegal numCCE %d (num_dci %d)\n",subframe,numCCE,num_dci);
- //for (i=0;i<num_dci;i++) {
- // printf("dci_alloc[%d].L = %d\n",i,dci_alloc[i].L);
- //}
- //exit(-1);
-exit(1);
- return(0);
}
-*/
-
uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
uint8_t num_dci,
@@ -2540,73 +676,6 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
}
-
-void dci_decoding(uint8_t DCI_LENGTH,
- uint8_t aggregation_level,
- int8_t *e,
- uint8_t *decoded_output)
-{
-
- uint8_t dummy_w_rx[3*(MAX_DCI_SIZE_BITS+16+64)];
- int8_t w_rx[3*(MAX_DCI_SIZE_BITS+16+32)],d_rx[96+(3*(MAX_DCI_SIZE_BITS+16))];
-
- uint16_t RCC;
-
- uint16_t D=(DCI_LENGTH+16+64);
- uint16_t coded_bits;
-#ifdef DEBUG_DCI_DECODING
- int32_t i;
-#endif
-
- AssertFatal(aggregation_level<4,
- "dci_decoding FATAL, illegal aggregation_level %d\n",aggregation_level);
-
- coded_bits = 72 * (1<<aggregation_level);
-
-#ifdef DEBUG_DCI_DECODING
- LOG_I(PHY," Doing DCI decoding for %d bits, DCI_LENGTH %d,coded_bits %d, e %p\n",3*(DCI_LENGTH+16),DCI_LENGTH,coded_bits,e);
-#endif
-
- // now do decoding
- memset((void*)dummy_w_rx,0,3*D);
- RCC = generate_dummy_w_cc(DCI_LENGTH+16,
- dummy_w_rx);
-
-
-
-#ifdef DEBUG_DCI_DECODING
- LOG_I(PHY," Doing DCI Rate Matching RCC %d, w %p\n",RCC,w);
-#endif
-
- lte_rate_matching_cc_rx(RCC,coded_bits,w_rx,dummy_w_rx,e);
-
- sub_block_deinterleaving_cc((uint32_t)(DCI_LENGTH+16),
- &d_rx[96],
- &w_rx[0]);
-
-#ifdef DEBUG_DCI_DECODING
-
- for (i=0; i<16+DCI_LENGTH; i++)
- LOG_I(PHY," DCI %d : (%d,%d,%d)\n",i,*(d_rx+96+(3*i)),*(d_rx+97+(3*i)),*(d_rx+98+(3*i)));
-
-#endif
- memset(decoded_output,0,2+((16+DCI_LENGTH)>>3));
-
-#ifdef DEBUG_DCI_DECODING
- printf("Before Viterbi\n");
-
- for (i=0; i<16+DCI_LENGTH; i++)
- printf("%d : (%d,%d,%d)\n",i,*(d_rx+96+(3*i)),*(d_rx+97+(3*i)),*(d_rx+98+(3*i)));
-
-#endif
- //debug_printf("Doing DCI Viterbi \n");
- phy_viterbi_lte_sse2(d_rx+96,decoded_output,16+DCI_LENGTH);
- //debug_printf("Done DCI Viterbi \n");
-}
-
-
-static uint8_t dci_decoded_output[RX_NB_TH][(MAX_DCI_SIZE_BITS+64)/8];
-
uint16_t get_nCCE(uint8_t num_pdcch_symbols,LTE_DL_FRAME_PARMS *frame_parms,uint8_t mi)
{
return(get_nquad(num_pdcch_symbols,frame_parms,mi)/9);
@@ -2662,1584 +731,3 @@ uint16_t get_nCCE_mac(uint8_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int sub
get_mi(&RC.eNB[Mod_id][CC_id]->frame_parms,subframe)));
}
-
-int get_nCCE_offset_l1(int *CCE_table,
- const unsigned char L,
- const int nCCE,
- const int common_dci,
- const unsigned short rnti,
- const unsigned char subframe)
-{
-
- int search_space_free,m,nb_candidates = 0,l,i;
- unsigned int Yk;
- /*
- printf("CCE Allocation: ");
- for (i=0;i<nCCE;i++)
- printf("%d.",CCE_table[i]);
- printf("\n");
- */
- if (common_dci == 1) {
- // check CCE(0 ... L-1)
- nb_candidates = (L==4) ? 4 : 2;
- nb_candidates = min(nb_candidates,nCCE/L);
-
- // printf("Common DCI nb_candidates %d, L %d\n",nb_candidates,L);
-
- for (m = nb_candidates-1 ; m >=0 ; m--) {
-
- search_space_free = 1;
- for (l=0; l<L; l++) {
-
- // printf("CCE_table[%d] %d\n",(m*L)+l,CCE_table[(m*L)+l]);
- if (CCE_table[(m*L) + l] == 1) {
- search_space_free = 0;
- break;
- }
- }
-
- if (search_space_free == 1) {
-
- // printf("returning %d\n",m*L);
-
- for (l=0; l<L; l++)
- CCE_table[(m*L)+l]=1;
- return(m*L);
- }
- }
-
- return(-1);
-
- } else { // Find first available in ue specific search space
- // according to procedure in Section 9.1.1 of 36.213 (v. 8.6)
- // compute Yk
- Yk = (unsigned int)rnti;
-
- for (i=0; i<=subframe; i++)
- Yk = (Yk*39827)%65537;
-
- Yk = Yk % (nCCE/L);
-
-
- switch (L) {
- case 1:
- case 2:
- nb_candidates = 6;
- break;
-
- case 4:
- case 8:
- nb_candidates = 2;
- break;
-
- default:
- DevParam(L, nCCE, rnti);
- break;
- }
-
-
- LOG_D(MAC,"rnti %x, Yk = %d, nCCE %d (nCCE/L %d),nb_cand %d\n",rnti,Yk,nCCE,nCCE/L,nb_candidates);
-
- for (m = 0 ; m < nb_candidates ; m++) {
- search_space_free = 1;
-
- for (l=0; l<L; l++) {
- int cce = (((Yk+m)%(nCCE/L))*L) + l;
- if (cce >= nCCE || CCE_table[cce] == 1) {
- search_space_free = 0;
- break;
- }
- }
-
- if (search_space_free == 1) {
- for (l=0; l<L; l++)
- CCE_table[(((Yk+m)%(nCCE/L))*L)+l]=1;
-
- return(((Yk+m)%(nCCE/L))*L);
- }
- }
-
- return(-1);
- }
-}
-
-
-void dci_decoding_procedure0(LTE_UE_PDCCH **pdcch_vars,
- int do_common,
- dci_detect_mode_t mode,
- uint8_t subframe,
- DCI_ALLOC_t *dci_alloc,
- int16_t eNB_id,
- uint8_t current_thread_id,
- LTE_DL_FRAME_PARMS *frame_parms,
- uint8_t mi,
- uint16_t si_rnti,
- uint16_t ra_rnti,
- uint16_t p_rnti,
- uint8_t L,
- uint8_t format_si,
- uint8_t format_p,
- uint8_t format_ra,
- uint8_t format_c,
- uint8_t sizeof_bits,
- uint8_t sizeof_bytes,
- uint8_t *dci_cnt,
- uint8_t *format0_found,
- uint8_t *format_c_found,
- uint32_t *CCEmap0,
- uint32_t *CCEmap1,
- uint32_t *CCEmap2)
-{
-
- uint16_t crc,CCEind,nCCE;
- uint32_t *CCEmap=NULL,CCEmap_mask=0;
- int L2=(1<<L);
- unsigned int Yk,nb_candidates = 0,i,m;
- unsigned int CCEmap_cand;
-
- nCCE = get_nCCE(pdcch_vars[eNB_id]->num_pdcch_symbols,frame_parms,mi);
-
- if (nCCE > get_nCCE(3,frame_parms,1)) {
- LOG_D(PHY,"skip DCI decoding: nCCE=%d > get_nCCE(3,frame_parms,1)=%d\n", nCCE, get_nCCE(3,frame_parms,1));
- return;
- }
-
- if (nCCE<L2) {
- LOG_D(PHY,"skip DCI decoding: nCCE=%d < L2=%d\n", nCCE, L2);
- return;
- }
-
- if (mode == NO_DCI) {
- LOG_D(PHY, "skip DCI decoding: expect no DCIs at subframe %d\n", subframe);
- return;
- }
-
- if (do_common == 1) {
- nb_candidates = (L2==4) ? 4 : 2;
- Yk=0;
- } else {
- // Find first available in ue specific search space
- // according to procedure in Section 9.1.1 of 36.213 (v. 8.6)
- // compute Yk
- Yk = (unsigned int)pdcch_vars[eNB_id]->crnti;
-
- for (i=0; i<=subframe; i++)
- Yk = (Yk*39827)%65537;
-
- Yk = Yk % (nCCE/L2);
-
- switch (L2) {
- case 1:
- case 2:
- nb_candidates = 6;
- break;
-
- case 4:
- case 8:
- nb_candidates = 2;
- break;
-
- default:
- DevParam(L2, do_common, eNB_id);
- break;
- }
- }
-
- /* for (CCEind=0;
- CCEind<nCCE2;
- CCEind+=(1<<L)) {*/
-
- if (nb_candidates*L2 > nCCE)
- nb_candidates = nCCE/L2;
-
- for (m=0; m<nb_candidates; m++) {
-
- CCEind = (((Yk+m)%(nCCE/L2))*L2);
-
- if (CCEind<32)
- CCEmap = CCEmap0;
- else if (CCEind<64)
- CCEmap = CCEmap1;
- else if (CCEind<96)
- CCEmap = CCEmap2;
- else {
- AssertFatal(1==0,
- "Illegal CCEind %d (Yk %d, m %d, nCCE %d, L2 %d\n",CCEind,Yk,m,nCCE,L2);
- }
-
- switch (L2) {
- case 1:
- CCEmap_mask = (1<<(CCEind&0x1f));
- break;
-
- case 2:
- CCEmap_mask = (3<<(CCEind&0x1f));
- break;
-
- case 4:
- CCEmap_mask = (0xf<<(CCEind&0x1f));
- break;
-
- case 8:
- CCEmap_mask = (0xff<<(CCEind&0x1f));
- break;
-
- default:
- AssertFatal(1==0,
- "Illegal L2 value %d\n", L2 );
- }
-
- CCEmap_cand = (*CCEmap)&CCEmap_mask;
-
- // CCE is not allocated yet
-
- if (CCEmap_cand == 0) {
-
- if (do_common == 1)
- LOG_D(PHY,"[DCI search nPdcch %d - common] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x)\n",
- pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask);
- else
- LOG_D(PHY,"[DCI search nPdcch %d - ue spec %x] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x) format %d\n",
- pdcch_vars[eNB_id]->num_pdcch_symbols,pdcch_vars[eNB_id]->crnti,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask,format_c);
-
- dci_decoding(sizeof_bits,
- L,
- &pdcch_vars[eNB_id]->e_rx[CCEind*72],
- &dci_decoded_output[current_thread_id][0]);
- /*
- for (i=0;i<3+(sizeof_bits>>3);i++)
- printf("dci_decoded_output[%d][%d] => %x\n",current_thread_id,i,dci_decoded_output[current_thread_id][i]);
- */
-
- crc = (crc16(&dci_decoded_output[current_thread_id][0],sizeof_bits)>>16) ^ extract_crc(&dci_decoded_output[current_thread_id][0],sizeof_bits);
-#ifdef DEBUG_DCI_DECODING
- printf("crc =>%x\n",crc);
-#endif
-
- if (((L>1) && ((crc == si_rnti)||
- (crc == p_rnti)||
- (crc == ra_rnti)))||
- (crc == pdcch_vars[eNB_id]->crnti)) {
- dci_alloc[*dci_cnt].dci_length = sizeof_bits;
- dci_alloc[*dci_cnt].rnti = crc;
- dci_alloc[*dci_cnt].L = L;
- dci_alloc[*dci_cnt].firstCCE = CCEind;
-
- //printf("DCI FOUND !!! crc =>%x, sizeof_bits %d, sizeof_bytes %d \n",crc, sizeof_bits, sizeof_bytes);
- if (sizeof_bytes<=4) {
- dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[current_thread_id][0];
- dci_alloc[*dci_cnt].dci_pdu[2] = dci_decoded_output[current_thread_id][1];
- dci_alloc[*dci_cnt].dci_pdu[1] = dci_decoded_output[current_thread_id][2];
- dci_alloc[*dci_cnt].dci_pdu[0] = dci_decoded_output[current_thread_id][3];
-#ifdef DEBUG_DCI_DECODING
- printf("DCI => %x,%x,%x,%x\n",dci_decoded_output[current_thread_id][0],
- dci_decoded_output[current_thread_id][1],
- dci_decoded_output[current_thread_id][2],
- dci_decoded_output[current_thread_id][3]);
-#endif
- } else {
- dci_alloc[*dci_cnt].dci_pdu[7] = dci_decoded_output[current_thread_id][0];
- dci_alloc[*dci_cnt].dci_pdu[6] = dci_decoded_output[current_thread_id][1];
- dci_alloc[*dci_cnt].dci_pdu[5] = dci_decoded_output[current_thread_id][2];
- dci_alloc[*dci_cnt].dci_pdu[4] = dci_decoded_output[current_thread_id][3];
- dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[current_thread_id][4];
- dci_alloc[*dci_cnt].dci_pdu[2] = dci_decoded_output[current_thread_id][5];
- dci_alloc[*dci_cnt].dci_pdu[1] = dci_decoded_output[current_thread_id][6];
- dci_alloc[*dci_cnt].dci_pdu[0] = dci_decoded_output[current_thread_id][7];
-#ifdef DEBUG_DCI_DECODING
- printf("DCI => %x,%x,%x,%x,%x,%x,%x,%x\n",
- dci_decoded_output[current_thread_id][0],dci_decoded_output[current_thread_id][1],dci_decoded_output[current_thread_id][2],dci_decoded_output[current_thread_id][3],
- dci_decoded_output[current_thread_id][4],dci_decoded_output[current_thread_id][5],dci_decoded_output[current_thread_id][6],dci_decoded_output[current_thread_id][7]);
-#endif
- }
-
- if (crc==si_rnti) {
- dci_alloc[*dci_cnt].format = format_si;
- *dci_cnt = *dci_cnt+1;
- } else if (crc==p_rnti) {
- dci_alloc[*dci_cnt].format = format_p;
- *dci_cnt = *dci_cnt+1;
- } else if (crc==ra_rnti) {
- dci_alloc[*dci_cnt].format = format_ra;
- // store first nCCE of group for PUCCH transmission of ACK/NAK
- pdcch_vars[eNB_id]->nCCE[subframe]=CCEind;
- *dci_cnt = *dci_cnt+1;
- } else if (crc==pdcch_vars[eNB_id]->crnti) {
-
- if ((mode&UL_DCI)&&(format_c == format0)&&((dci_decoded_output[current_thread_id][0]&0x80)==0)) {// check if pdu is format 0 or 1A
- if (*format0_found == 0) {
- dci_alloc[*dci_cnt].format = format0;
- *format0_found = 1;
- *dci_cnt = *dci_cnt+1;
- pdcch_vars[eNB_id]->nCCE[subframe]=CCEind;
- }
- } else if (format_c == format0) { // this is a format 1A DCI
- dci_alloc[*dci_cnt].format = format1A;
- *dci_cnt = *dci_cnt+1;
- pdcch_vars[eNB_id]->nCCE[subframe]=CCEind;
- } else {
- // store first nCCE of group for PUCCH transmission of ACK/NAK
- if (*format_c_found == 0) {
- dci_alloc[*dci_cnt].format = format_c;
- *dci_cnt = *dci_cnt+1;
- *format_c_found = 1;
- pdcch_vars[eNB_id]->nCCE[subframe]=CCEind;
- }
- }
- }
-
- //LOG_I(PHY,"DCI decoding CRNTI [format: %d, nCCE[subframe: %d]: %d ], AggregationLevel %d \n",format_c, subframe, pdcch_vars[eNB_id]->nCCE[subframe],L2);
- // memcpy(&dci_alloc[*dci_cnt].dci_pdu[0],dci_decoded_output,sizeof_bytes);
-
-
-
- switch (1<<L) {
- case 1:
- *CCEmap|=(1<<(CCEind&0x1f));
- break;
-
- case 2:
- *CCEmap|=(1<<(CCEind&0x1f));
- break;
-
- case 4:
- *CCEmap|=(1<<(CCEind&0x1f));
- break;
-
- case 8:
- *CCEmap|=(1<<(CCEind&0x1f));
- break;
- }
-
-#ifdef DEBUG_DCI_DECODING
- LOG_I(PHY,"[DCI search] Found DCI %d rnti %x Aggregation %d length %d format %s in CCE %d (CCEmap %x) candidate %d / %d \n",
- *dci_cnt,crc,1<<L,sizeof_bits,dci_format_strings[dci_alloc[*dci_cnt-1].format],CCEind,*CCEmap,m,nb_candidates );
- dump_dci(frame_parms,&dci_alloc[*dci_cnt-1]);
-
-#endif
- return;
- } // rnti match
- } // CCEmap_cand == 0
-/*
- if ( agregationLevel != 0xFF &&
- (format_c == format0 && m==0 && si_rnti != SI_RNTI))
- {
- //Only valid for OAI : Save some processing time when looking for DCI format0. From the log we see the DCI only on candidate 0.
- return;
- }
-*/
- } // candidate loop
-}
-
-uint16_t dci_CRNTI_decoding_procedure(PHY_VARS_UE *ue,
- DCI_ALLOC_t *dci_alloc,
- uint8_t DCIFormat,
- uint8_t agregationLevel,
- int16_t eNB_id,
- uint8_t subframe)
-{
-
- uint8_t dci_cnt=0,old_dci_cnt=0;
- uint32_t CCEmap0=0,CCEmap1=0,CCEmap2=0;
- LTE_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[subframe]];
- LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
- uint8_t mi = get_mi(&ue->frame_parms,subframe);
- uint16_t ra_rnti=99;
- uint8_t format0_found=0,format_c_found=0;
- uint8_t tmode = ue->transmission_mode[eNB_id];
- uint8_t frame_type = frame_parms->frame_type;
- uint8_t format0_size_bits=0,format0_size_bytes=0;
- uint8_t format1_size_bits=0,format1_size_bytes=0;
- dci_detect_mode_t mode = dci_detect_mode_select(&ue->frame_parms,subframe);
-
- switch (frame_parms->N_RB_DL) {
- case 6:
- if (frame_type == TDD) {
- format0_size_bits = sizeof_DCI0_1_5MHz_TDD_1_6_t;
- format0_size_bytes = sizeof(DCI0_1_5MHz_TDD_1_6_t);
- format1_size_bits = sizeof_DCI1_1_5MHz_TDD_t;
- format1_size_bytes = sizeof(DCI1_1_5MHz_TDD_t);
-
- } else {
- format0_size_bits = sizeof_DCI0_1_5MHz_FDD_t;
- format0_size_bytes = sizeof(DCI0_1_5MHz_FDD_t);
- format1_size_bits = sizeof_DCI1_1_5MHz_FDD_t;
- format1_size_bytes = sizeof(DCI1_1_5MHz_FDD_t);
- }
-
- break;
-
- case 25:
- default:
- if (frame_type == TDD) {
- format0_size_bits = sizeof_DCI0_5MHz_TDD_1_6_t;
- format0_size_bytes = sizeof(DCI0_5MHz_TDD_1_6_t);
- format1_size_bits = sizeof_DCI1_5MHz_TDD_t;
- format1_size_bytes = sizeof(DCI1_5MHz_TDD_t);
- } else {
- format0_size_bits = sizeof_DCI0_5MHz_FDD_t;
- format0_size_bytes = sizeof(DCI0_5MHz_FDD_t);
- format1_size_bits = sizeof_DCI1_5MHz_FDD_t;
- format1_size_bytes = sizeof(DCI1_5MHz_FDD_t);
- }
-
- break;
-
- case 50:
- if (frame_type == TDD) {
- format0_size_bits = sizeof_DCI0_10MHz_TDD_1_6_t;
- format0_size_bytes = sizeof(DCI0_10MHz_TDD_1_6_t);
- format1_size_bits = sizeof_DCI1_10MHz_TDD_t;
- format1_size_bytes = sizeof(DCI1_10MHz_TDD_t);
-
- } else {
- format0_size_bits = sizeof_DCI0_10MHz_FDD_t;
- format0_size_bytes = sizeof(DCI0_10MHz_FDD_t);
- format1_size_bits = sizeof_DCI1_10MHz_FDD_t;
- format1_size_bytes = sizeof(DCI1_10MHz_FDD_t);
- }
-
- break;
-
- case 100:
- if (frame_type == TDD) {
- format0_size_bits = sizeof_DCI0_20MHz_TDD_1_6_t;
- format0_size_bytes = sizeof(DCI0_20MHz_TDD_1_6_t);
- format1_size_bits = sizeof_DCI1_20MHz_TDD_t;
- format1_size_bytes = sizeof(DCI1_20MHz_TDD_t);
- } else {
- format0_size_bits = sizeof_DCI0_20MHz_FDD_t;
- format0_size_bytes = sizeof(DCI0_20MHz_FDD_t);
- format1_size_bits = sizeof_DCI1_20MHz_FDD_t;
- format1_size_bytes = sizeof(DCI1_20MHz_FDD_t);
- }
-
- break;
- }
-
- if (ue->prach_resources[eNB_id])
- ra_rnti = ue->prach_resources[eNB_id]->ra_RNTI;
-
- // Now check UE_SPEC format0/1A ue_spec search spaces at aggregation 8
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- agregationLevel,
- format1A,
- format1A,
- format1A,
- format0,
- format0_size_bits,
- format0_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- if (DCIFormat == format1)
- {
- if ((tmode < 3) || (tmode == 7)) {
- //printf("Crnti decoding frame param agregation %d DCI %d \n",agregationLevel,DCIFormat);
-
- // Now check UE_SPEC format 1 search spaces at aggregation 1
-
- //printf("[DCI search] Format 1/1A aggregation 1\n");
-
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 0,
- format1A,
- format1A,
- format1A,
- format1,
- format1_size_bits,
- format1_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff) ||
- (format_c_found==1))
- return(dci_cnt);
-
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- //printf("Crnti 1 decoding frame param agregation %d DCI %d \n",agregationLevel,DCIFormat);
-
- }
- else if (DCIFormat == format1A)
- {
- AssertFatal(0,"Other Transmission mode not yet coded\n");
- }
- }
- else
- {
- LOG_W(PHY,"DCI format %d wrong or not yet implemented \n",DCIFormat);
- }
-
- return(dci_cnt);
-
-}
-
-uint16_t dci_decoding_procedure(PHY_VARS_UE *ue,
- DCI_ALLOC_t *dci_alloc,
- int do_common,
- int16_t eNB_id,
- uint8_t subframe)
-{
-
- uint8_t dci_cnt=0,old_dci_cnt=0;
- uint32_t CCEmap0=0,CCEmap1=0,CCEmap2=0;
- LTE_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[subframe]];
- LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
- uint8_t mi = get_mi(&ue->frame_parms,subframe);
- uint16_t ra_rnti=99;
- uint8_t format0_found=0,format_c_found=0;
- uint8_t tmode = ue->transmission_mode[eNB_id];
- uint8_t frame_type = frame_parms->frame_type;
- uint8_t format1A_size_bits=0,format1A_size_bytes=0;
- uint8_t format1C_size_bits=0,format1C_size_bytes=0;
- uint8_t format0_size_bits=0,format0_size_bytes=0;
- uint8_t format1_size_bits=0,format1_size_bytes=0;
- uint8_t format2_size_bits=0,format2_size_bytes=0;
- uint8_t format2A_size_bits=0,format2A_size_bytes=0;
- dci_detect_mode_t mode = dci_detect_mode_select(&ue->frame_parms,subframe);
-
- switch (frame_parms->N_RB_DL) {
- case 6:
- if (frame_type == TDD) {
- format1A_size_bits = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
- format1A_size_bytes = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
- format1C_size_bits = sizeof_DCI1C_1_5MHz_t;
- format1C_size_bytes = sizeof(DCI1C_1_5MHz_t);
- format0_size_bits = sizeof_DCI0_1_5MHz_TDD_1_6_t;
- format0_size_bytes = sizeof(DCI0_1_5MHz_TDD_1_6_t);
- format1_size_bits = sizeof_DCI1_1_5MHz_TDD_t;
- format1_size_bytes = sizeof(DCI1_1_5MHz_TDD_t);
-
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- format2_size_bits = sizeof_DCI2_1_5MHz_2A_TDD_t;
- format2_size_bytes = sizeof(DCI2_1_5MHz_2A_TDD_t);
- format2A_size_bits = sizeof_DCI2A_1_5MHz_2A_TDD_t;
- format2A_size_bytes = sizeof(DCI2A_1_5MHz_2A_TDD_t);
- } else if (frame_parms->nb_antenna_ports_eNB == 4) {
- format2_size_bits = sizeof_DCI2_1_5MHz_4A_TDD_t;
- format2_size_bytes = sizeof(DCI2_1_5MHz_4A_TDD_t);
- format2A_size_bits = sizeof_DCI2A_1_5MHz_4A_TDD_t;
- format2A_size_bytes = sizeof(DCI2A_1_5MHz_4A_TDD_t);
- }
- } else {
- format1A_size_bits = sizeof_DCI1A_1_5MHz_FDD_t;
- format1A_size_bytes = sizeof(DCI1A_1_5MHz_FDD_t);
- format1C_size_bits = sizeof_DCI1C_1_5MHz_t;
- format1C_size_bytes = sizeof(DCI1C_1_5MHz_t);
- format0_size_bits = sizeof_DCI0_1_5MHz_FDD_t;
- format0_size_bytes = sizeof(DCI0_1_5MHz_FDD_t);
- format1_size_bits = sizeof_DCI1_1_5MHz_FDD_t;
- format1_size_bytes = sizeof(DCI1_1_5MHz_FDD_t);
-
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- format2_size_bits = sizeof_DCI2_1_5MHz_2A_FDD_t;
- format2_size_bytes = sizeof(DCI2_1_5MHz_2A_FDD_t);
- format2A_size_bits = sizeof_DCI2A_1_5MHz_2A_FDD_t;
- format2A_size_bytes = sizeof(DCI2A_1_5MHz_2A_FDD_t);
- } else if (frame_parms->nb_antenna_ports_eNB == 4) {
- format2_size_bits = sizeof_DCI2_1_5MHz_4A_FDD_t;
- format2_size_bytes = sizeof(DCI2_1_5MHz_4A_FDD_t);
- format2A_size_bits = sizeof_DCI2A_1_5MHz_4A_FDD_t;
- format2A_size_bytes = sizeof(DCI2A_1_5MHz_4A_FDD_t);
- }
- }
-
- break;
-
- case 25:
- default:
- if (frame_type == TDD) {
- format1A_size_bits = sizeof_DCI1A_5MHz_TDD_1_6_t;
- format1A_size_bytes = sizeof(DCI1A_5MHz_TDD_1_6_t);
- format1C_size_bits = sizeof_DCI1C_5MHz_t;
- format1C_size_bytes = sizeof(DCI1C_5MHz_t);
- format0_size_bits = sizeof_DCI0_5MHz_TDD_1_6_t;
- format0_size_bytes = sizeof(DCI0_5MHz_TDD_1_6_t);
- format1_size_bits = sizeof_DCI1_5MHz_TDD_t;
- format1_size_bytes = sizeof(DCI1_5MHz_TDD_t);
-
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- format2_size_bits = sizeof_DCI2_5MHz_2A_TDD_t;
- format2_size_bytes = sizeof(DCI2_5MHz_2A_TDD_t);
- format2A_size_bits = sizeof_DCI2A_5MHz_2A_TDD_t;
- format2A_size_bytes = sizeof(DCI2A_5MHz_2A_TDD_t);
- } else if (frame_parms->nb_antenna_ports_eNB == 4) {
- format2_size_bits = sizeof_DCI2_5MHz_4A_TDD_t;
- format2_size_bytes = sizeof(DCI2_5MHz_4A_TDD_t);
- format2A_size_bits = sizeof_DCI2A_5MHz_4A_TDD_t;
- format2A_size_bytes = sizeof(DCI2A_5MHz_4A_TDD_t);
- }
- } else {
- format1A_size_bits = sizeof_DCI1A_5MHz_FDD_t;
- format1A_size_bytes = sizeof(DCI1A_5MHz_FDD_t);
- format1C_size_bits = sizeof_DCI1C_5MHz_t;
- format1C_size_bytes = sizeof(DCI1C_5MHz_t);
- format0_size_bits = sizeof_DCI0_5MHz_FDD_t;
- format0_size_bytes = sizeof(DCI0_5MHz_FDD_t);
- format1_size_bits = sizeof_DCI1_5MHz_FDD_t;
- format1_size_bytes = sizeof(DCI1_5MHz_FDD_t);
-
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- format2_size_bits = sizeof_DCI2_5MHz_2A_FDD_t;
- format2_size_bytes = sizeof(DCI2_5MHz_2A_FDD_t);
- format2A_size_bits = sizeof_DCI2A_5MHz_2A_FDD_t;
- format2A_size_bytes = sizeof(DCI2A_5MHz_2A_FDD_t);
- } else if (frame_parms->nb_antenna_ports_eNB == 4) {
- format2_size_bits = sizeof_DCI2_5MHz_4A_FDD_t;
- format2_size_bytes = sizeof(DCI2_5MHz_4A_FDD_t);
- format2A_size_bits = sizeof_DCI2A_5MHz_4A_FDD_t;
- format2A_size_bytes = sizeof(DCI2A_5MHz_4A_FDD_t);
- }
- }
-
- break;
-
- case 50:
- if (frame_type == TDD) {
- format1A_size_bits = sizeof_DCI1A_10MHz_TDD_1_6_t;
- format1A_size_bytes = sizeof(DCI1A_10MHz_TDD_1_6_t);
- format1C_size_bits = sizeof_DCI1C_10MHz_t;
- format1C_size_bytes = sizeof(DCI1C_10MHz_t);
- format0_size_bits = sizeof_DCI0_10MHz_TDD_1_6_t;
- format0_size_bytes = sizeof(DCI0_10MHz_TDD_1_6_t);
- format1_size_bits = sizeof_DCI1_10MHz_TDD_t;
- format1_size_bytes = sizeof(DCI1_10MHz_TDD_t);
-
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- format2_size_bits = sizeof_DCI2_10MHz_2A_TDD_t;
- format2_size_bytes = sizeof(DCI2_10MHz_2A_TDD_t);
- format2A_size_bits = sizeof_DCI2A_10MHz_2A_TDD_t;
- format2A_size_bytes = sizeof(DCI2A_10MHz_2A_TDD_t);
- } else if (frame_parms->nb_antenna_ports_eNB == 4) {
- format2_size_bits = sizeof_DCI2_10MHz_4A_TDD_t;
- format2_size_bytes = sizeof(DCI2_10MHz_4A_TDD_t);
- format2A_size_bits = sizeof_DCI2A_10MHz_4A_TDD_t;
- format2A_size_bytes = sizeof(DCI2A_10MHz_4A_TDD_t);
- }
- } else {
- format1A_size_bits = sizeof_DCI1A_10MHz_FDD_t;
- format1A_size_bytes = sizeof(DCI1A_10MHz_FDD_t);
- format1C_size_bits = sizeof_DCI1C_10MHz_t;
- format1C_size_bytes = sizeof(DCI1C_10MHz_t);
- format0_size_bits = sizeof_DCI0_10MHz_FDD_t;
- format0_size_bytes = sizeof(DCI0_10MHz_FDD_t);
- format1_size_bits = sizeof_DCI1_10MHz_FDD_t;
- format1_size_bytes = sizeof(DCI1_10MHz_FDD_t);
-
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- format2_size_bits = sizeof_DCI2_10MHz_2A_FDD_t;
- format2_size_bytes = sizeof(DCI2_10MHz_2A_FDD_t);
- format2A_size_bits = sizeof_DCI2A_10MHz_2A_FDD_t;
- format2A_size_bytes = sizeof(DCI2A_10MHz_2A_FDD_t);
- } else if (frame_parms->nb_antenna_ports_eNB == 4) {
- format2_size_bits = sizeof_DCI2_10MHz_4A_FDD_t;
- format2_size_bytes = sizeof(DCI2_10MHz_4A_FDD_t);
- format2A_size_bits = sizeof_DCI2A_10MHz_4A_FDD_t;
- format2A_size_bytes = sizeof(DCI2A_10MHz_4A_FDD_t);
- }
- }
-
- break;
-
- case 100:
- if (frame_type == TDD) {
- format1A_size_bits = sizeof_DCI1A_20MHz_TDD_1_6_t;
- format1A_size_bytes = sizeof(DCI1A_20MHz_TDD_1_6_t);
- format1C_size_bits = sizeof_DCI1C_20MHz_t;
- format1C_size_bytes = sizeof(DCI1C_20MHz_t);
- format0_size_bits = sizeof_DCI0_20MHz_TDD_1_6_t;
- format0_size_bytes = sizeof(DCI0_20MHz_TDD_1_6_t);
- format1_size_bits = sizeof_DCI1_20MHz_TDD_t;
- format1_size_bytes = sizeof(DCI1_20MHz_TDD_t);
-
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- format2_size_bits = sizeof_DCI2_20MHz_2A_TDD_t;
- format2_size_bytes = sizeof(DCI2_20MHz_2A_TDD_t);
- format2A_size_bits = sizeof_DCI2A_20MHz_2A_TDD_t;
- format2A_size_bytes = sizeof(DCI2A_20MHz_2A_TDD_t);
- } else if (frame_parms->nb_antenna_ports_eNB == 4) {
- format2_size_bits = sizeof_DCI2_20MHz_4A_TDD_t;
- format2_size_bytes = sizeof(DCI2_20MHz_4A_TDD_t);
- format2A_size_bits = sizeof_DCI2A_20MHz_4A_TDD_t;
- format2A_size_bytes = sizeof(DCI2A_20MHz_4A_TDD_t);
- }
- } else {
- format1A_size_bits = sizeof_DCI1A_20MHz_FDD_t;
- format1A_size_bytes = sizeof(DCI1A_20MHz_FDD_t);
- format1C_size_bits = sizeof_DCI1C_20MHz_t;
- format1C_size_bytes = sizeof(DCI1C_20MHz_t);
- format0_size_bits = sizeof_DCI0_20MHz_FDD_t;
- format0_size_bytes = sizeof(DCI0_20MHz_FDD_t);
- format1_size_bits = sizeof_DCI1_20MHz_FDD_t;
- format1_size_bytes = sizeof(DCI1_20MHz_FDD_t);
-
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- format2_size_bits = sizeof_DCI2_20MHz_2A_FDD_t;
- format2_size_bytes = sizeof(DCI2_20MHz_2A_FDD_t);
- format2A_size_bits = sizeof_DCI2A_20MHz_2A_FDD_t;
- format2A_size_bytes = sizeof(DCI2A_20MHz_2A_FDD_t);
- } else if (frame_parms->nb_antenna_ports_eNB == 4) {
- format2_size_bits = sizeof_DCI2_20MHz_4A_FDD_t;
- format2_size_bytes = sizeof(DCI2_20MHz_4A_FDD_t);
- format2A_size_bits = sizeof_DCI2A_20MHz_4A_FDD_t;
- format2A_size_bytes = sizeof(DCI2A_20MHz_4A_FDD_t);
- }
- }
-
- break;
- }
-
- if (do_common == 1) {
-#ifdef DEBUG_DCI_DECODING
- printf("[DCI search] subframe %d: doing common search/format0 aggregation 4\n",subframe);
-#endif
-
- if (ue->prach_resources[eNB_id])
- ra_rnti = ue->prach_resources[eNB_id]->ra_RNTI;
-
- // First check common search spaces at aggregation 4 (SI_RNTI, P_RNTI and RA_RNTI format 0/1A),
- // and UE_SPEC format0 (PUSCH) too while we're at it
- dci_decoding_procedure0(pdcch_vars,1,mode,subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0) ,
- ra_rnti,
- P_RNTI,
- 2,
- format1A,
- format1A,
- format1A,
- format0,
- format1A_size_bits,
- format1A_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff) ||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- // Now check common search spaces at aggregation 4 (SI_RNTI,P_RNTI and RA_RNTI and C-RNTI format 1C),
- // and UE_SPEC format0 (PUSCH) too while we're at it
- dci_decoding_procedure0(pdcch_vars,1,mode,subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 2,
- format1C,
- format1C,
- format1C,
- format1C,
- format1C_size_bits,
- format1C_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff) ||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- // Now check common search spaces at aggregation 8 (SI_RNTI,P_RNTI and RA_RNTI format 1A),
- // and UE_SPEC format0 (PUSCH) too while we're at it
- // printf("[DCI search] doing common search/format0 aggregation 3\n");
-#ifdef DEBUG_DCI_DECODING
- printf("[DCI search] doing common search/format0 aggregation 8\n");
-#endif
- dci_decoding_procedure0(pdcch_vars,1,mode,subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- P_RNTI,
- ra_rnti,
- 3,
- format1A,
- format1A,
- format1A,
- format0,
- format1A_size_bits,
- format1A_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- // Now check common search spaces at aggregation 8 (SI_RNTI and RA_RNTI and C-RNTI format 1C),
- // and UE_SPEC format0 (PUSCH) too while we're at it
- dci_decoding_procedure0(pdcch_vars,1,mode,subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 3,
- format1C,
- format1C,
- format1C,
- format1C,
- format1C_size_bits,
- format1C_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
- //#endif
-
- }
-
- if (ue->UE_mode[eNB_id] <= PRACH)
- return(dci_cnt);
-
- if (ue->prach_resources[eNB_id])
- ra_rnti = ue->prach_resources[eNB_id]->ra_RNTI;
-
- // Now check UE_SPEC format0/1A ue_spec search spaces at aggregation 8
- // printf("[DCI search] Format 0/1A aggregation 8\n");
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 0,
- format1A,
- format1A,
- format1A,
- format0,
- format0_size_bits,
- format0_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- //printf("[DCI search] Format 0 aggregation 1 dci_cnt %d\n",dci_cnt);
-
- if (dci_cnt == 0)
- {
- // Now check UE_SPEC format 0 search spaces at aggregation 4
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 1,
- format1A,
- format1A,
- format1A,
- format0,
- format0_size_bits,
- format0_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
-
- //printf("[DCI search] Format 0 aggregation 2 dci_cnt %d\n",dci_cnt);
- }
-
- if (dci_cnt == 0)
- {
- // Now check UE_SPEC format 0 search spaces at aggregation 2
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 2,
- format1A,
- format1A,
- format1A,
- format0,
- format0_size_bits,
- format0_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- //printf("[DCI search] Format 0 aggregation 4 dci_cnt %d\n",dci_cnt);
- }
-
- if (dci_cnt == 0)
- {
- // Now check UE_SPEC format 0 search spaces at aggregation 1
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 3,
- format1A,
- format1A,
- format1A,
- format0,
- format0_size_bits,
- format0_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- //printf("[DCI search] Format 0 aggregation 8 dci_cnt %d\n",dci_cnt);
-
- }
- // These are for CRNTI based on transmission mode
- if ((tmode < 3) || (tmode == 7)) {
- // Now check UE_SPEC format 1 search spaces at aggregation 1
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 0,
- format1A,
- format1A,
- format1A,
- format1,
- format1_size_bits,
- format1_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
- //printf("[DCI search] Format 1 aggregation 1 dci_cnt %d\n",dci_cnt);
-
- if ((CCEmap0==0xffff) ||
- (format_c_found==1))
- return(dci_cnt);
-
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- // Now check UE_SPEC format 1 search spaces at aggregation 2
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 1,
- format1A,
- format1A,
- format1A,
- format1,
- format1_size_bits,
- format1_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
- //printf("[DCI search] Format 1 aggregation 2 dci_cnt %d\n",dci_cnt);
-
- if ((CCEmap0==0xffff)||
- (format_c_found==1))
- return(dci_cnt);
-
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- // Now check UE_SPEC format 1 search spaces at aggregation 4
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 2,
- format1A,
- format1A,
- format1A,
- format1,
- format1_size_bits,
- format1_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
- //printf("[DCI search] Format 1 aggregation 4 dci_cnt %d\n",dci_cnt);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- //#ifdef ALL_AGGREGATION
- // Now check UE_SPEC format 1 search spaces at aggregation 8
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 3,
- format1A,
- format1A,
- format1A,
- format1,
- format1_size_bits,
- format1_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
- //printf("[DCI search] Format 1 aggregation 8 dci_cnt %d\n",dci_cnt);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- //#endif //ALL_AGGREGATION
- } else if (tmode == 3) {
-
-
- // LOG_D(PHY," Now check UE_SPEC format 2A_2A search aggregation 1 dci length: %d[bits] %d[bytes]\n",format2A_size_bits,format2A_size_bytes);
- // Now check UE_SPEC format 2A_2A search spaces at aggregation 1
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 0,
- format1A,
- format1A,
- format1A,
- format2A,
- format2A_size_bits,
- format2A_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- LOG_D(PHY," format 2A_2A search CCEmap0 %x, format0_found %d, format_c_found %d \n", CCEmap0, format0_found, format_c_found);
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- LOG_D(PHY," format 2A_2A search dci_cnt %d, old_dci_cn t%d \n", dci_cnt, old_dci_cnt);
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- // Now check UE_SPEC format 2 search spaces at aggregation 2
- LOG_D(PHY," Now check UE_SPEC format 2A_2A search aggregation 2 dci length: %d[bits] %d[bytes]\n",format2A_size_bits,format2A_size_bytes);
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 1,
- format1A,
- format1A,
- format1A,
- format2A,
- format2A_size_bits,
- format2A_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- LOG_D(PHY," format 2A_2A search dci_cnt %d, old_dci_cn t%d \n", dci_cnt, old_dci_cnt);
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- // Now check UE_SPEC format 2_2A search spaces at aggregation 4
- // LOG_D(PHY," Now check UE_SPEC format 2_2A search spaces at aggregation 4 \n");
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 2,
- format1A,
- format1A,
- format1A,
- format2A,
- format2A_size_bits,
- format2A_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- LOG_D(PHY," format 2A_2A search dci_cnt %d, old_dci_cn t%d \n", dci_cnt, old_dci_cnt);
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- //#ifdef ALL_AGGREGATION
- // Now check UE_SPEC format 2_2A search spaces at aggregation 8
- LOG_D(PHY," Now check UE_SPEC format 2_2A search spaces at aggregation 8 dci length: %d[bits] %d[bytes]\n",format2A_size_bits,format2A_size_bytes);
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 3,
- format1A,
- format1A,
- format1A,
- format2A,
- format2A_size_bits,
- format2A_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
- //#endif
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- LOG_D(PHY," format 2A_2A search dci_cnt %d, old_dci_cn t%d \n", dci_cnt, old_dci_cnt);
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
- } else if (tmode == 4) {
-
- // Now check UE_SPEC format 2_2A search spaces at aggregation 1
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 0,
- format1A,
- format1A,
- format1A,
- format2,
- format2_size_bits,
- format2_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- // Now check UE_SPEC format 2 search spaces at aggregation 2
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 1,
- format1A,
- format1A,
- format1A,
- format2,
- format2_size_bits,
- format2_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- // Now check UE_SPEC format 2_2A search spaces at aggregation 4
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 2,
- format1A,
- format1A,
- format1A,
- format2,
- format2_size_bits,
- format2_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- //#ifdef ALL_AGGREGATION
- // Now check UE_SPEC format 2_2A search spaces at aggregation 8
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 3,
- format1A,
- format1A,
- format1A,
- format2,
- format2_size_bits,
- format2_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
- //#endif
- } else if ((tmode==5) || (tmode==6)) { // This is MU-MIMO
-
- // Now check UE_SPEC format 1E_2A_M10PRB search spaces aggregation 1
-#ifdef DEBUG_DCI_DECODING
- LOG_I(PHY," MU-MIMO check UE_SPEC format 1E_2A_M10PRB\n");
-#endif
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 0,
- format1A,
- format1A,
- format1A,
- format1E_2A_M10PRB,
- sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t,
- sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t),
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- // Now check UE_SPEC format 1E_2A_M10PRB search spaces aggregation 2
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 1,
- format1A,
- format1A,
- format1A,
- format1E_2A_M10PRB,
- sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t,
- sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t),
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- // Now check UE_SPEC format 1E_2A_M10PRB search spaces aggregation 4
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 2,
- format1A,
- format1A,
- format1A,
- format1E_2A_M10PRB,
- sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t,
- sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t),
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- //#ifdef ALL_AGGREGATION
-
- // Now check UE_SPEC format 1E_2A_M10PRB search spaces at aggregation 8
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,
- subframe,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[subframe],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 3,
- format1A,
- format1A,
- format1A,
- format1E_2A_M10PRB,
- sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t,
- sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t),
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
-
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- //#endif //ALL_AGGREGATION
-
- }
-
- return(dci_cnt);
-}
diff --git a/openair1/PHY/LTE_TRANSPORT/pbch.c b/openair1/PHY/LTE_TRANSPORT/pbch.c
index 9e5b6757fc..d90d031917 100644
--- a/openair1/PHY/LTE_TRANSPORT/pbch.c
+++ b/openair1/PHY/LTE_TRANSPORT/pbch.c
@@ -392,624 +392,3 @@ int generate_pbch(LTE_eNB_PBCH *eNB_pbch,
return(0);
}
-
-int32_t generate_pbch_emul(PHY_VARS_eNB *phy_vars_eNB,uint8_t *pbch_pdu)
-{
-
- LOG_D(PHY,"[eNB %d] generate_pbch_emul \n",phy_vars_eNB->Mod_id);
- eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].cntl.pbch_flag=1;
- // Copy PBCH payload
- eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].cntl.pbch_payload=*(uint32_t *)pbch_pdu;
- return(0);
-}
-
-uint16_t pbch_extract(int **rxdataF,
- int **dl_ch_estimates,
- int **rxdataF_ext,
- int **dl_ch_estimates_ext,
- uint32_t symbol,
- uint32_t high_speed_flag,
- LTE_DL_FRAME_PARMS *frame_parms)
-{
-
-
- uint16_t rb,nb_rb=6;
- uint8_t i,j,aarx,aatx;
- int *dl_ch0,*dl_ch0_ext,*rxF,*rxF_ext;
-
- uint32_t nsymb = (frame_parms->Ncp==0) ? 7:6;
- uint32_t symbol_mod = symbol % nsymb;
-
- int rx_offset = frame_parms->ofdm_symbol_size-3*12;
- int ch_offset = frame_parms->N_RB_DL*6-3*12;
- int nushiftmod3 = frame_parms->nushift%3;
-
- for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
- /*
- printf("extract_rbs (nushift %d): symbol_mod=%d, rx_offset=%d, ch_offset=%d\n",frame_parms->nushift,symbol_mod,
- (rx_offset + (symbol*(frame_parms->ofdm_symbol_size)))*2,
- LTE_CE_OFFSET+ch_offset+(symbol_mod*(frame_parms->ofdm_symbol_size)));
- */
-
- rxF = &rxdataF[aarx][(rx_offset + (symbol*(frame_parms->ofdm_symbol_size)))];
- rxF_ext = &rxdataF_ext[aarx][symbol_mod*(6*12)];
-
- for (rb=0; rb<nb_rb; rb++) {
- // skip DC carrier
- if (rb==3) {
- rxF = &rxdataF[aarx][(1 + (symbol*(frame_parms->ofdm_symbol_size)))];
- }
-
- if ((symbol_mod==0) || (symbol_mod==1)) {
- j=0;
-
- for (i=0; i<12; i++) {
- if ((i!=nushiftmod3) &&
- (i!=(nushiftmod3+3)) &&
- (i!=(nushiftmod3+6)) &&
- (i!=(nushiftmod3+9))) {
- rxF_ext[j++]=rxF[i];
- }
- }
-
- rxF+=12;
- rxF_ext+=8;
- } else {
- for (i=0; i<12; i++) {
- rxF_ext[i]=rxF[i];
- }
-
- rxF+=12;
- rxF_ext+=12;
- }
- }
-
- for (aatx=0; aatx<4; aatx++) { //frame_parms->nb_antenna_ports_eNB;aatx++) {
- if (high_speed_flag == 1)
- dl_ch0 = &dl_ch_estimates[(aatx<<1)+aarx][LTE_CE_OFFSET+ch_offset+(symbol*(frame_parms->ofdm_symbol_size))];
- else
- dl_ch0 = &dl_ch_estimates[(aatx<<1)+aarx][LTE_CE_OFFSET+ch_offset];
-
- dl_ch0_ext = &dl_ch_estimates_ext[(aatx<<1)+aarx][symbol_mod*(6*12)];
-
- for (rb=0; rb<nb_rb; rb++) {
- // skip DC carrier
- // if (rb==3) dl_ch0++;
- if (symbol_mod>1) {
- memcpy(dl_ch0_ext,dl_ch0,12*sizeof(int));
- dl_ch0+=12;
- dl_ch0_ext+=12;
- } else {
- j=0;
-
- for (i=0; i<12; i++) {
- if ((i!=nushiftmod3) &&
- (i!=(nushiftmod3+3)) &&
- (i!=(nushiftmod3+6)) &&
- (i!=(nushiftmod3+9))) {
- // printf("PBCH extract i %d j %d => (%d,%d)\n",i,j,*(short *)&dl_ch0[i],*(1+(short*)&dl_ch0[i]));
- dl_ch0_ext[j++]=dl_ch0[i];
- }
- }
-
- dl_ch0+=12;
- dl_ch0_ext+=8;
- }
- }
- } //tx antenna loop
-
- }
-
- return(0);
-}
-
-//__m128i avg128;
-
-//compute average channel_level on each (TX,RX) antenna pair
-int pbch_channel_level(int **dl_ch_estimates_ext,
- LTE_DL_FRAME_PARMS *frame_parms,
- uint32_t symbol)
-{
-
- int16_t rb, nb_rb=6;
- uint8_t aatx,aarx;
-
-#if defined(__x86_64__) || defined(__i386__)
- __m128i avg128;
- __m128i *dl_ch128;
-#elif defined(__arm__)
- int32x4_t avg128;
- int16x8_t *dl_ch128;
-#endif
- int avg1=0,avg2=0;
-
- uint32_t nsymb = (frame_parms->Ncp==0) ? 7:6;
- uint32_t symbol_mod = symbol % nsymb;
-
- for (aatx=0; aatx<4; aatx++) //frame_parms->nb_antenna_ports_eNB;aatx++)
- for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
- //clear average level
-
-#if defined(__x86_64__) || defined(__i386__)
- avg128 = _mm_setzero_si128();
- dl_ch128=(__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol_mod*6*12];
-#elif defined(__arm__)
- avg128 = vdupq_n_s32(0);
- dl_ch128=(int16x8_t *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol_mod*6*12];
-
-#endif
- for (rb=0; rb<nb_rb; rb++) {
-#if defined(__x86_64__) || defined(__i386__)
- avg128 = _mm_add_epi32(avg128,_mm_madd_epi16(dl_ch128[0],dl_ch128[0]));
- avg128 = _mm_add_epi32(avg128,_mm_madd_epi16(dl_ch128[1],dl_ch128[1]));
- avg128 = _mm_add_epi32(avg128,_mm_madd_epi16(dl_ch128[2],dl_ch128[2]));
-#elif defined(__arm__)
-// to be filled in
-#endif
- dl_ch128+=3;
- /*
- if (rb==0) {
- print_shorts("dl_ch128",&dl_ch128[0]);
- print_shorts("dl_ch128",&dl_ch128[1]);
- print_shorts("dl_ch128",&dl_ch128[2]);
- }
- */
- }
-
- avg1 = (((int*)&avg128)[0] +
- ((int*)&avg128)[1] +
- ((int*)&avg128)[2] +
- ((int*)&avg128)[3])/(nb_rb*12);
-
- if (avg1>avg2)
- avg2 = avg1;
-
- //msg("Channel level : %d, %d\n",avg1, avg2);
- }
-#if defined(__x86_64__) || defined(__i386__)
- _mm_empty();
- _m_empty();
-#endif
- return(avg2);
-
-}
-
-#if defined(__x86_64__) || defined(__i386__)
-__m128i mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
-#elif defined(__arm__)
-int16x8_t mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
-#endif
-void pbch_channel_compensation(int **rxdataF_ext,
- int **dl_ch_estimates_ext,
- int **rxdataF_comp,
- LTE_DL_FRAME_PARMS *frame_parms,
- uint8_t symbol,
- uint8_t output_shift)
-{
-
- uint16_t rb,nb_rb=6;
- uint8_t aatx,aarx,symbol_mod;
-#if defined(__x86_64__) || defined(__i386__)
- __m128i *dl_ch128,*rxdataF128,*rxdataF_comp128;
-#elif defined(__arm__)
-
-#endif
- symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
-
- for (aatx=0; aatx<4; aatx++) //frame_parms->nb_antenna_ports_eNB;aatx++)
- for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
-
-#if defined(__x86_64__) || defined(__i386__)
- dl_ch128 = (__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol_mod*6*12];
- rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol_mod*6*12];
- rxdataF_comp128 = (__m128i *)&rxdataF_comp[(aatx<<1)+aarx][symbol_mod*6*12];
-
-#elif defined(__arm__)
-// to be filled in
-#endif
-
- for (rb=0; rb<nb_rb; rb++) {
- //printf("rb %d\n",rb);
-#if defined(__x86_64__) || defined(__i386__)
- // multiply by conjugated channel
- mmtmpP0 = _mm_madd_epi16(dl_ch128[0],rxdataF128[0]);
- // print_ints("re",&mmtmpP0);
- // mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[0],_MM_SHUFFLE(2,3,0,1));
- mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
- mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]);
- // print_ints("im",&mmtmpP1);
- mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[0]);
- // mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
- // print_ints("re(shift)",&mmtmpP0);
- mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
- // print_ints("im(shift)",&mmtmpP1);
- mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
- mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
- // print_ints("c0",&mmtmpP2);
- // print_ints("c1",&mmtmpP3);
- rxdataF_comp128[0] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
- // print_shorts("rx:",rxdataF128);
- // print_shorts("ch:",dl_ch128);
- // print_shorts("pack:",rxdataF_comp128);
-
- // multiply by conjugated channel
- mmtmpP0 = _mm_madd_epi16(dl_ch128[1],rxdataF128[1]);
- // mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[1],_MM_SHUFFLE(2,3,0,1));
- mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
- mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]);
- mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[1]);
- // mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
- mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
- mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
- mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
- rxdataF_comp128[1] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
- // print_shorts("rx:",rxdataF128+1);
- // print_shorts("ch:",dl_ch128+1);
- // print_shorts("pack:",rxdataF_comp128+1);
-
- if (symbol_mod>1) {
- // multiply by conjugated channel
- mmtmpP0 = _mm_madd_epi16(dl_ch128[2],rxdataF128[2]);
- // mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[2],_MM_SHUFFLE(2,3,0,1));
- mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
- mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]);
- mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[2]);
- // mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
- mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
- mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
- mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
- rxdataF_comp128[2] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
- // print_shorts("rx:",rxdataF128+2);
- // print_shorts("ch:",dl_ch128+2);
- // print_shorts("pack:",rxdataF_comp128+2);
-
- dl_ch128+=3;
- rxdataF128+=3;
- rxdataF_comp128+=3;
- } else {
- dl_ch128+=2;
- rxdataF128+=2;
- rxdataF_comp128+=2;
- }
-#elif defined(__arm__)
-// to be filled in
-#endif
- }
- }
-#if defined(__x86_64__) || defined(__i386__)
- _mm_empty();
- _m_empty();
-#endif
-}
-
-void pbch_detection_mrc(LTE_DL_FRAME_PARMS *frame_parms,
- int **rxdataF_comp,
- uint8_t symbol)
-{
-
- uint8_t aatx, symbol_mod;
- int i, nb_rb=6;
-#if defined(__x86_64__) || defined(__i386__)
- __m128i *rxdataF_comp128_0,*rxdataF_comp128_1;
-#elif defined(__arm__)
- int16x8_t *rxdataF_comp128_0,*rxdataF_comp128_1;
-#endif
- symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
-
- if (frame_parms->nb_antennas_rx>1) {
- for (aatx=0; aatx<4; aatx++) { //frame_parms->nb_antenna_ports_eNB;aatx++) {
-#if defined(__x86_64__) || defined(__i386__)
- rxdataF_comp128_0 = (__m128i *)&rxdataF_comp[(aatx<<1)][symbol_mod*6*12];
- rxdataF_comp128_1 = (__m128i *)&rxdataF_comp[(aatx<<1)+1][symbol_mod*6*12];
-#elif defined(__arm__)
- rxdataF_comp128_0 = (int16x8_t *)&rxdataF_comp[(aatx<<1)][symbol_mod*6*12];
- rxdataF_comp128_1 = (int16x8_t *)&rxdataF_comp[(aatx<<1)+1][symbol_mod*6*12];
-
-#endif
- // MRC on each re of rb, both on MF output and magnitude (for 16QAM/64QAM llr computation)
- for (i=0; i<nb_rb*3; i++) {
-#if defined(__x86_64__) || defined(__i386__)
- rxdataF_comp128_0[i] = _mm_adds_epi16(_mm_srai_epi16(rxdataF_comp128_0[i],1),_mm_srai_epi16(rxdataF_comp128_1[i],1));
-#elif defined(__arm__)
- rxdataF_comp128_0[i] = vhaddq_s16(rxdataF_comp128_0[i],rxdataF_comp128_1[i]);
-
-#endif
- }
- }
- }
-#if defined(__x86_64__) || defined(__i386__)
- _mm_empty();
- _m_empty();
-#endif
-}
-
-void pbch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
- uint8_t *pbch_e,
- uint32_t length)
-{
- int i;
- uint8_t reset;
- uint32_t x1, x2, s=0;
-
- reset = 1;
- // x1 is set in lte_gold_generic
- x2 = frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.6.1
- // msg("pbch_scrambling: Nid_cell = %d\n",x2);
-
- for (i=0; i<length; i++) {
- if ((i&0x1f)==0) {
- s = lte_gold_generic(&x1, &x2, reset);
- // printf("lte_gold[%d]=%x\n",i,s);
- reset = 0;
- }
-
- pbch_e[i] = (pbch_e[i]&1) ^ ((s>>(i&0x1f))&1);
-
- }
-}
-
-void pbch_unscrambling(LTE_DL_FRAME_PARMS *frame_parms,
- int8_t* llr,
- uint32_t length,
- uint8_t frame_mod4)
-{
- int i;
- uint8_t reset;
- uint32_t x1, x2, s=0;
-
- reset = 1;
- // x1 is set in first call to lte_gold_generic
- x2 = frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.6.1
- // msg("pbch_unscrambling: Nid_cell = %d\n",x2);
-
- for (i=0; i<length; i++) {
- if (i%32==0) {
- s = lte_gold_generic(&x1, &x2, reset);
- // printf("lte_gold[%d]=%x\n",i,s);
- reset = 0;
- }
-
- // take the quarter of the PBCH that corresponds to this frame
- if ((i>=(frame_mod4*(length>>2))) && (i<((1+frame_mod4)*(length>>2)))) {
-
- if (((s>>(i%32))&1)==0)
- llr[i] = -llr[i];
- }
- }
-}
-
-void pbch_alamouti(LTE_DL_FRAME_PARMS *frame_parms,
- int **rxdataF_comp,
- uint8_t symbol)
-{
-
-
- int16_t *rxF0,*rxF1;
- // __m128i *ch_mag0,*ch_mag1,*ch_mag0b,*ch_mag1b;
- uint8_t rb,re,symbol_mod;
- int jj;
-
- // printf("Doing alamouti\n");
- symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
- jj = (symbol_mod*6*12);
-
- rxF0 = (int16_t*)&rxdataF_comp[0][jj]; //tx antenna 0 h0*y
- rxF1 = (int16_t*)&rxdataF_comp[2][jj]; //tx antenna 1 h1*y
-
- for (rb=0; rb<6; rb++) {
-
- for (re=0; re<12; re+=2) {
-
- // Alamouti RX combining
-
- rxF0[0] = rxF0[0] + rxF1[2];
- rxF0[1] = rxF0[1] - rxF1[3];
-
- rxF0[2] = rxF0[2] - rxF1[0];
- rxF0[3] = rxF0[3] + rxF1[1];
-
- rxF0+=4;
- rxF1+=4;
- }
-
- }
-
-}
-
-void pbch_quantize(int8_t *pbch_llr8,
- int16_t *pbch_llr,
- uint16_t len)
-{
-
- uint16_t i;
-
- for (i=0; i<len; i++) {
- if (pbch_llr[i]>7)
- pbch_llr8[i]=7;
- else if (pbch_llr[i]<-8)
- pbch_llr8[i]=-8;
- else
- pbch_llr8[i] = (char)(pbch_llr[i]);
-
- }
-}
-
-static unsigned char dummy_w_rx[3*3*(16+PBCH_A)];
-static int8_t pbch_w_rx[3*3*(16+PBCH_A)],pbch_d_rx[96+(3*(16+PBCH_A))];
-
-
-uint16_t rx_pbch(LTE_UE_COMMON *lte_ue_common_vars,
- LTE_UE_PBCH *lte_ue_pbch_vars,
- LTE_DL_FRAME_PARMS *frame_parms,
- uint8_t eNB_id,
- MIMO_mode_t mimo_mode,
- uint32_t high_speed_flag,
- uint8_t frame_mod4)
-{
-
- uint8_t log2_maxh;//,aatx,aarx;
- int max_h=0;
-
- int symbol,i;
- uint32_t nsymb = (frame_parms->Ncp==0) ? 14:12;
- uint16_t pbch_E;
- uint8_t pbch_a[8];
- uint8_t RCC;
-
- int8_t *pbch_e_rx;
- uint8_t *decoded_output = lte_ue_pbch_vars->decoded_output;
- uint16_t crc;
-
-
- // pbch_D = 16+PBCH_A;
-
- pbch_E = (frame_parms->Ncp==0) ? 1920 : 1728; //RE/RB * #RB * bits/RB (QPSK)
- pbch_e_rx = <e_ue_pbch_vars->llr[frame_mod4*(pbch_E>>2)];
-#ifdef DEBUG_PBCH
- LOG_D(PHY,"[PBCH] starting symbol loop (Ncp %d, frame_mod4 %d,mimo_mode %d\n",frame_parms->Ncp,frame_mod4,mimo_mode);
-#endif
-
- // clear LLR buffer
- memset(lte_ue_pbch_vars->llr,0,pbch_E);
-
- for (symbol=(nsymb>>1); symbol<(nsymb>>1)+4; symbol++) {
-
-#ifdef DEBUG_PBCH
- LOG_D(PHY,"[PBCH] starting extract\n");
-#endif
- pbch_extract(lte_ue_common_vars->common_vars_rx_data_per_thread[0].rxdataF,
- lte_ue_common_vars->common_vars_rx_data_per_thread[0].dl_ch_estimates[eNB_id],
- lte_ue_pbch_vars->rxdataF_ext,
- lte_ue_pbch_vars->dl_ch_estimates_ext,
- symbol,
- high_speed_flag,
- frame_parms);
-#ifdef DEBUG_PBCH
- LOG_D(PHY,"[PHY] PBCH Symbol %d\n",symbol);
- LOG_D(PHY,"[PHY] PBCH starting channel_level\n");
-#endif
-
- max_h = pbch_channel_level(lte_ue_pbch_vars->dl_ch_estimates_ext,
- frame_parms,
- symbol);
- log2_maxh = 3+(log2_approx(max_h)/2);
-
-#ifdef DEBUG_PBCH
- LOG_D(PHY,"[PHY] PBCH log2_maxh = %d (%d)\n",log2_maxh,max_h);
-#endif
-
- pbch_channel_compensation(lte_ue_pbch_vars->rxdataF_ext,
- lte_ue_pbch_vars->dl_ch_estimates_ext,
- lte_ue_pbch_vars->rxdataF_comp,
- frame_parms,
- symbol,
- log2_maxh); // log2_maxh+I0_shift
-
- if (frame_parms->nb_antennas_rx > 1)
- pbch_detection_mrc(frame_parms,
- lte_ue_pbch_vars->rxdataF_comp,
- symbol);
-
-
- if (mimo_mode == ALAMOUTI) {
- pbch_alamouti(frame_parms,lte_ue_pbch_vars->rxdataF_comp,symbol);
- } else if (mimo_mode != SISO) {
- LOG_D(PHY,"[PBCH][RX] Unsupported MIMO mode\n");
- return(-1);
- }
-
- if (symbol>(nsymb>>1)+1) {
- pbch_quantize(pbch_e_rx,
- (short*)&(lte_ue_pbch_vars->rxdataF_comp[0][(symbol%(nsymb>>1))*72]),
- 144);
-
- pbch_e_rx+=144;
- } else {
- pbch_quantize(pbch_e_rx,
- (short*)&(lte_ue_pbch_vars->rxdataF_comp[0][(symbol%(nsymb>>1))*72]),
- 96);
-
- pbch_e_rx+=96;
- }
-
-
- }
-
- pbch_e_rx = lte_ue_pbch_vars->llr;
-
-
-
- //un-scrambling
-#ifdef DEBUG_PBCH
- LOG_D(PHY,"[PBCH] doing unscrambling\n");
-#endif
-
-
- pbch_unscrambling(frame_parms,
- pbch_e_rx,
- pbch_E,
- frame_mod4);
-
-
-
- //un-rate matching
-#ifdef DEBUG_PBCH
- LOG_D(PHY,"[PBCH] doing un-rate-matching\n");
-#endif
-
-
- memset(dummy_w_rx,0,3*3*(16+PBCH_A));
- RCC = generate_dummy_w_cc(16+PBCH_A,
- dummy_w_rx);
-
-
- lte_rate_matching_cc_rx(RCC,pbch_E,pbch_w_rx,dummy_w_rx,pbch_e_rx);
-
- sub_block_deinterleaving_cc((unsigned int)(PBCH_A+16),
- &pbch_d_rx[96],
- &pbch_w_rx[0]);
-
- memset(pbch_a,0,((16+PBCH_A)>>3));
-
-
-
-
- phy_viterbi_lte_sse2(pbch_d_rx+96,pbch_a,16+PBCH_A);
-
- // Fix byte endian of PBCH (bit 23 goes in first)
- for (i=0; i<(PBCH_A>>3); i++)
- decoded_output[(PBCH_A>>3)-i-1] = pbch_a[i];
-
-#ifdef DEBUG_PBCH
-
- for (i=0; i<(PBCH_A>>3); i++)
- LOG_I(PHY,"[PBCH] pbch_a[%d] = %x\n",i,decoded_output[i]);
-
-#endif //DEBUG_PBCH
-
-#ifdef DEBUG_PBCH
- LOG_I(PHY,"PBCH CRC %x : %x\n",
- crc16(pbch_a,PBCH_A),
- ((uint16_t)pbch_a[PBCH_A>>3]<<8)+pbch_a[(PBCH_A>>3)+1]);
-#endif
-
- crc = (crc16(pbch_a,PBCH_A)>>16) ^
- (((uint16_t)pbch_a[PBCH_A>>3]<<8)+pbch_a[(PBCH_A>>3)+1]);
-
- if (crc == 0x0000)
- return(1);
- else if (crc == 0xffff)
- return(2);
- else if (crc == 0x5555)
- return(4);
- else
- return(-1);
-
-
-}
diff --git a/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c b/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c
new file mode 100644
index 0000000000..4b73de6fcc
--- /dev/null
+++ b/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c
@@ -0,0 +1,9093 @@
+/*
+ * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.
+ * The OpenAirInterface Software Alliance licenses this file to You under
+ * the OAI Public License, Version 1.1 (the "License"); you may not use this file
+ * except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.openairinterface.org/?page_id=698
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *-------------------------------------------------------------------------------
+ * For more information about the OpenAirInterface (OAI) Software Alliance:
+ * contact@openairinterface.org
+ */
+
+/*! \file PHY/LTE_TRANSPORT/dci_tools.c
+ * \brief PHY Support routines (eNB/UE) for filling PDSCH/PUSCH/DLSCH/ULSCH data structures based on DCI PDUs generated by eNB MAC scheduler.
+ * \author R. Knopp
+ * \date 2011
+ * \version 0.1
+ * \company Eurecom
+ * \email: knopp@eurecom.fr
+ * \note
+ * \warning
+ */
+
+#include "PHY/defs.h"
+#include "PHY/extern.h"
+#include "SCHED/defs.h"
+#ifdef DEBUG_DCI_TOOLS
+#include "PHY/vars.h"
+#endif
+#include "assertions.h"
+#include "nfapi_interface.h"
+
+//#define DEBUG_HARQ
+
+#include "LAYER2/MAC/extern.h"
+#include "LAYER2/MAC/defs.h"
+
+//#define DEBUG_DCI
+
+uint32_t localRIV2alloc_LUT6[32];
+uint32_t distRIV2alloc_even_LUT6[32];
+uint32_t distRIV2alloc_odd_LUT6[32];
+uint16_t RIV2nb_rb_LUT6[32];
+uint16_t RIV2first_rb_LUT6[32];
+uint16_t RIV_max6=0;
+
+uint32_t localRIV2alloc_LUT25[512];
+uint32_t distRIV2alloc_even_LUT25[512];
+uint32_t distRIV2alloc_odd_LUT25[512];
+uint16_t RIV2nb_rb_LUT25[512];
+uint16_t RIV2first_rb_LUT25[512];
+uint16_t RIV_max25=0;
+
+
+uint32_t localRIV2alloc_LUT50_0[1600];
+uint32_t localRIV2alloc_LUT50_1[1600];
+uint32_t distRIV2alloc_gap0_even_LUT50_0[1600];
+uint32_t distRIV2alloc_gap0_odd_LUT50_0[1600];
+uint32_t distRIV2alloc_gap0_even_LUT50_1[1600];
+uint32_t distRIV2alloc_gap0_odd_LUT50_1[1600];
+uint32_t distRIV2alloc_gap1_even_LUT50_0[1600];
+uint32_t distRIV2alloc_gap1_odd_LUT50_0[1600];
+uint32_t distRIV2alloc_gap1_even_LUT50_1[1600];
+uint32_t distRIV2alloc_gap1_odd_LUT50_1[1600];
+uint16_t RIV2nb_rb_LUT50[1600];
+uint16_t RIV2first_rb_LUT50[1600];
+uint16_t RIV_max50=0;
+
+uint32_t localRIV2alloc_LUT100_0[6000];
+uint32_t localRIV2alloc_LUT100_1[6000];
+uint32_t localRIV2alloc_LUT100_2[6000];
+uint32_t localRIV2alloc_LUT100_3[6000];
+uint32_t distRIV2alloc_gap0_even_LUT100_0[6000];
+uint32_t distRIV2alloc_gap0_odd_LUT100_0[6000];
+uint32_t distRIV2alloc_gap0_even_LUT100_1[6000];
+uint32_t distRIV2alloc_gap0_odd_LUT100_1[6000];
+uint32_t distRIV2alloc_gap0_even_LUT100_2[6000];
+uint32_t distRIV2alloc_gap0_odd_LUT100_2[6000];
+uint32_t distRIV2alloc_gap0_even_LUT100_3[6000];
+uint32_t distRIV2alloc_gap0_odd_LUT100_3[6000];
+uint32_t distRIV2alloc_gap1_even_LUT100_0[6000];
+uint32_t distRIV2alloc_gap1_odd_LUT100_0[6000];
+uint32_t distRIV2alloc_gap1_even_LUT100_1[6000];
+uint32_t distRIV2alloc_gap1_odd_LUT100_1[6000];
+uint32_t distRIV2alloc_gap1_even_LUT100_2[6000];
+uint32_t distRIV2alloc_gap1_odd_LUT100_2[6000];
+uint32_t distRIV2alloc_gap1_even_LUT100_3[6000];
+uint32_t distRIV2alloc_gap1_odd_LUT100_3[6000];
+uint16_t RIV2nb_rb_LUT100[6000];
+uint16_t RIV2first_rb_LUT100[6000];
+uint16_t RIV_max100=0;
+
+
+extern uint32_t current_dlsch_cqi;
+
+// Table 8.6.3-3 36.213
+uint16_t beta_cqi[16] = {0, //reserved
+ 0, //reserved
+ 9, //1.125
+ 10, //1.250
+ 11, //1.375
+ 13, //1.625
+ 14, //1.750
+ 16, //2.000
+ 18, //2.250
+ 20, //2.500
+ 23, //2.875
+ 25, //3.125
+ 28, //3.500
+ 32, //4.000
+ 40, //5.000
+ 50
+ }; //6.250
+
+// Table 8.6.3-2 36.213
+uint16_t beta_ri[16] = {10, //1.250
+ 13, //1.625
+ 16, //2.000
+ 20, //2.500
+ 25, //3.125
+ 32, //4.000
+ 40, //5.000
+ 50, //6.250
+ 64, //8.000
+ 80, //10.000
+ 101, //12.625
+ 127, //15.875
+ 160, //20.000
+ 0, //reserved
+ 0, //reserved
+ 0
+ }; //reserved
+
+// Table 8.6.3-2 36.213
+uint16_t beta_ack[16] = {16, //2.000
+ 20, //2.500
+ 25, //3.125
+ 32, //4.000
+ 40, //5.000
+ 50, //6.250
+ 64, //8.000
+ 80, //10.000
+ 101, //12.625
+ 127, //15.875
+ 160, //20.000
+ 248, //31.000
+ 400, //50.000
+ 640, //80.000
+ 808
+ };//126.00
+
+int8_t delta_PUSCH_abs[4] = {-4,-1,1,4};
+int8_t delta_PUSCH_acc[4] = {-1,0,1,3};
+
+int8_t *delta_PUCCH_lut = delta_PUSCH_acc;
+
+void conv_eMTC_rballoc(uint16_t resource_block_coding,
+ uint32_t N_RB_DL,
+ uint32_t *rb_alloc) {
+
+
+ int narrowband = resource_block_coding>>5;
+ int RIV = resource_block_coding&31;
+ int N_NB_DL = N_RB_DL/6;
+ int i0 = (N_RB_DL>>1) - (3*N_NB_DL);
+ int first_rb = (6*narrowband)+i0;
+ int alloc = localRIV2alloc_LUT6[RIV];
+ int ind = first_rb>>5;
+ int ind_mod = first_rb&31;
+
+ if (((N_RB_DL&1) > 0) && (narrowband>=(N_NB_DL>>1))) first_rb++;
+ rb_alloc[0] = 0;
+ rb_alloc[1] = 0;
+ rb_alloc[2] = 0;
+ rb_alloc[3] = 0;
+ rb_alloc[ind] = alloc<<ind_mod;
+ if (ind_mod > 26) rb_alloc[ind+1] = alloc>>(6-(ind_mod-26));
+}
+
+void conv_rballoc(uint8_t ra_header,uint32_t rb_alloc,uint32_t N_RB_DL,uint32_t *rb_alloc2)
+{
+
+ uint32_t i,shift,subset;
+ rb_alloc2[0] = 0;
+ rb_alloc2[1] = 0;
+ rb_alloc2[2] = 0;
+ rb_alloc2[3] = 0;
+
+ // printf("N_RB_DL %d, ra_header %d, rb_alloc %x\n",N_RB_DL,ra_header,rb_alloc);
+
+ switch (N_RB_DL) {
+
+ case 6:
+ rb_alloc2[0] = rb_alloc&0x3f;
+ break;
+
+ case 25:
+ if (ra_header == 0) {// Type 0 Allocation
+
+ for (i=12; i>0; i--) {
+ if ((rb_alloc&(1<<i)) != 0)
+ rb_alloc2[0] |= (3<<((2*(12-i))));
+
+ // printf("rb_alloc2 (type 0) %x\n",rb_alloc2);
+ }
+
+ if ((rb_alloc&1) != 0)
+ rb_alloc2[0] |= (1<<24);
+ } else {
+ subset = rb_alloc&1;
+ shift = (rb_alloc>>1)&1;
+
+ for (i=0; i<11; i++) {
+ if ((rb_alloc&(1<<(i+2))) != 0)
+ rb_alloc2[0] |= (1<<(2*i));
+
+ //printf("rb_alloc2 (type 1) %x\n",rb_alloc2);
+ }
+
+ if ((shift == 0) && (subset == 1))
+ rb_alloc2[0]<<=1;
+ else if ((shift == 1) && (subset == 0))
+ rb_alloc2[0]<<=4;
+ else if ((shift == 1) && (subset == 1))
+ rb_alloc2[0]<<=3;
+ }
+
+ break;
+
+ case 50:
+ AssertFatal(ra_header==0,"resource type 1 not supported for N_RB_DL=50\n");
+
+ for (i=16; i>0; i--) {
+ if ((rb_alloc&(1<<i)) != 0)
+ rb_alloc2[(3*(16-i))>>5] |= (7<<((3*(16-i))%32));
+ }
+
+ // bit mask across
+ if ((rb_alloc2[0]>>31)==1)
+ rb_alloc2[1] |= 1;
+
+ if ((rb_alloc&1) != 0)
+ rb_alloc2[1] |= (3<<16);
+ break;
+
+ case 100:
+ AssertFatal(ra_header==0,"resource type 1 not supported for N_RB_DL=100\n");
+ for (i=0; i<25; i++) {
+ if ((rb_alloc&(1<<(24-i))) != 0)
+ rb_alloc2[(4*i)>>5] |= (0xf<<((4*i)%32));
+
+ // printf("rb_alloc2[%d] (type 0) %x (%d)\n",(4*i)>>5,rb_alloc2[(4*i)>>5],rb_alloc&(1<<i));
+ }
+
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", N_RB_DL);
+ DevParam (N_RB_DL, 0, 0);
+ break;
+ }
+
+}
+
+
+
+uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL)
+{
+
+ uint32_t nprb=0,i;
+
+ switch (N_RB_DL) {
+ case 6:
+ for (i=0; i<6; i++) {
+ if ((rb_alloc&(1<<i)) != 0)
+ nprb += 1;
+ }
+
+ break;
+
+ case 25:
+ if (ra_header == 0) {// Type 0 Allocation
+
+ for (i=12; i>0; i--) {
+ if ((rb_alloc&(1<<i)) != 0)
+ nprb += 2;
+ }
+
+ if ((rb_alloc&1) != 0)
+ nprb += 1;
+ } else {
+ for (i=0; i<11; i++) {
+ if ((rb_alloc&(1<<(i+2))) != 0)
+ nprb += 1;
+ }
+ }
+
+ break;
+
+ case 50:
+ if (ra_header == 0) {// Type 0 Allocation
+
+ for (i=0; i<16; i++) {
+ if ((rb_alloc&(1<<(16-i))) != 0)
+ nprb += 3;
+ }
+
+ if ((rb_alloc&1) != 0)
+ nprb += 2;
+
+ } else {
+ for (i=0; i<17; i++) {
+ if ((rb_alloc&(1<<(i+2))) != 0)
+ nprb += 1;
+ }
+ }
+
+ break;
+
+ case 100:
+ if (ra_header == 0) {// Type 0 Allocation
+
+ for (i=0; i<25; i++) {
+ if ((rb_alloc&(1<<(24-i))) != 0)
+ nprb += 4;
+ }
+ } else {
+ for (i=0; i<25; i++) {
+ if ((rb_alloc&(1<<(i+2))) != 0)
+ nprb += 1;
+ }
+ }
+
+ break;
+
+ default:
+ LOG_E(PHY,"Invalide N_RB_DL %d\n", N_RB_DL);
+ DevParam (N_RB_DL, 0, 0);
+ break;
+ }
+
+ return(nprb);
+}
+
+uint16_t computeRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs)
+{
+
+ uint16_t RIV;
+
+ if (Lcrbs<=(1+(N_RB_DL>>1)))
+ RIV = (N_RB_DL*(Lcrbs-1)) + RBstart;
+ else
+ RIV = (N_RB_DL*(N_RB_DL+1-Lcrbs)) + (N_RB_DL-1-RBstart);
+
+ return(RIV);
+}
+
+// Convert a DCI Format 1C RIV to a Format 1A RIV
+// This extracts the start and length in PRBs from the 1C rballoc and
+// recomputes the RIV as if it were the 1A rballoc
+
+uint32_t conv_1C_RIV(int32_t rballoc,uint32_t N_RB_DL) {
+
+ int NpDLVRB,N_RB_step,LpCRBsm1,RBpstart;
+
+ switch (N_RB_DL) {
+
+ case 6: // N_RB_step = 2, NDLVRB = 6, NpDLVRB = 3
+ NpDLVRB = 3;
+ N_RB_step = 2;
+ break;
+ case 25: // N_RB_step = 2, NDLVRB = 24, NpDLVRB = 12
+ NpDLVRB = 12;
+ N_RB_step = 2;
+ break;
+ case 50: // N_RB_step = 4, NDLVRB = 46, NpDLVRB = 11
+ NpDLVRB = 11;
+ N_RB_step = 4;
+ break;
+ case 100: // N_RB_step = 4, NDLVRB = 96, NpDLVRB = 24
+ NpDLVRB = 24;
+ N_RB_step = 4;
+ break;
+ default:
+ NpDLVRB = 24;
+ N_RB_step = 4;
+ break;
+ }
+
+ // This is the 1C part from 7.1.6.3 in 36.213
+ LpCRBsm1 = rballoc/NpDLVRB;
+ // printf("LpCRBs = %d\n",LpCRBsm1+1);
+
+ if (LpCRBsm1 <= (NpDLVRB/2)) {
+ RBpstart = rballoc % NpDLVRB;
+ }
+ else {
+ LpCRBsm1 = NpDLVRB-LpCRBsm1;
+ RBpstart = NpDLVRB-(rballoc%NpDLVRB);
+ }
+ // printf("RBpstart %d\n",RBpstart);
+ return(computeRIV(N_RB_DL,N_RB_step*RBpstart,N_RB_step*(LpCRBsm1+1)));
+
+}
+
+uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) {
+
+ int offset;
+
+ switch (N_RB_DL) {
+
+ case 6:
+ // N_RB_DL = tildeN_RB_DL = 6
+ // Ngap = 4 , P=1, Nrow = 2, Nnull = 2
+
+ switch (vrb) {
+ case 0: // even: 0->0, 1->2, odd: 0->3, 1->5
+ case 1:
+ return ((3*odd_slot) + 2*(vrb&3))%6;
+ break;
+ case 2: // even: 2->3, 3->5, odd: 2->0, 3->2
+ case 3:
+ return ((3*odd_slot) + 2*(vrb&3) + 5)%6;
+ break;
+ case 4: // even: 4->1, odd: 4->4
+ return ((3*odd_slot) + 1)%6;
+ case 5: // even: 5->4, odd: 5->1
+ return ((3*odd_slot) + 4)%6;
+ break;
+ }
+ break;
+
+ case 15:
+ if (vrb<12) {
+ if ((vrb&3) < 2) // even: 0->0, 1->4, 4->1, 5->5, 8->2, 9->6 odd: 0->7, 1->11
+ return(((7*odd_slot) + 4*(vrb&3) + (vrb>>2))%14) + 14*(vrb/14);
+ else if (vrb < 12) // even: 2->7, 3->11, 6->8, 7->12, 10->9, 11->13
+ return (((7*odd_slot) + 4*(vrb&3) + (vrb>>2) +13 )%14) + 14*(vrb/14);
+ }
+ if (vrb==12)
+ return (3+(7*odd_slot)) % 14;
+ if (vrb==13)
+ return (10+(7*odd_slot)) % 14;
+ return 14;
+ break;
+
+ case 25:
+ return (((12*odd_slot) + 6*(vrb&3) + (vrb>>2))%24) + 24*(vrb/24);
+ break;
+
+ case 50: // P=3
+ if (Ngap==0) {
+ // Nrow=12,Nnull=2,NVRBDL=46,Ngap1= 27
+ if (vrb>=23)
+ offset=4;
+ else
+ offset=0;
+ if (vrb<44) {
+ if ((vrb&3)>=2)
+ return offset+((23*odd_slot) + 12*(vrb&3) + (vrb>>2) + 45)%46;
+ else
+ return offset+((23*odd_slot) + 12*(vrb&3) + (vrb>>2))%46;
+ }
+ if (vrb==44) // even: 44->11, odd: 45->34
+ return offset+((23*odd_slot) + 22-12+1);
+ if (vrb==45) // even: 45->10, odd: 45->33
+ return offset+((23*odd_slot) + 22+12);
+ if (vrb==46)
+ return offset+46+((23*odd_slot) + 23-12+1) % 46;
+ if (vrb==47)
+ return offset+46+((23*odd_slot) + 23+12) % 46;
+ if (vrb==48)
+ return offset+46+((23*odd_slot) + 23-12+1) % 46;
+ if (vrb==49)
+ return offset+46+((23*odd_slot) + 23+12) % 46;
+ }
+ else {
+ // Nrow=6,Nnull=6,NVRBDL=18,Ngap1= 27
+ if (vrb>=9)
+ offset=18;
+ else
+ offset=0;
+
+ if (vrb<12) {
+ if ((vrb&3)>=2)
+ return offset+((9*odd_slot) + 6*(vrb&3) + (vrb>>2) + 17)%18;
+ else
+ return offset+((9*odd_slot) + 6*(vrb&3) + (vrb>>2))%18;
+ }
+ else {
+ return offset+((9*odd_slot) + 12*(vrb&1)+(vrb>>1) )%18 + 18*(vrb/18);
+ }
+ }
+ break;
+ case 75:
+ // Ngap1 = 32, NVRBRL=64, P=4, Nrow= 16, Nnull=0
+ if (Ngap ==0) {
+ return ((32*odd_slot) + 16*(vrb&3) + (vrb>>2))%64 + (vrb/64);
+ } else {
+ // Ngap2 = 16, NVRBDL=32, Nrow=8, Nnull=0
+ return ((16*odd_slot) + 8*(vrb&3) + (vrb>>2))%32 + (vrb/32);
+ }
+ break;
+ case 100:
+ // Ngap1 = 48, NVRBDL=96, Nrow=24, Nnull=0
+ if (Ngap ==0) {
+ return ((48*odd_slot) + 24*(vrb&3) + (vrb>>2))%96 + (vrb/96);
+ } else {
+ // Ngap2 = 16, NVRBDL=32, Nrow=8, Nnull=0
+ return ((16*odd_slot) + 8*(vrb&3) + (vrb>>2))%32 + (vrb/32);
+ }
+ break;
+ default:
+ LOG_E(PHY,"Unknown N_RB_DL %d\n",N_RB_DL);
+ return 0;
+ }
+ return 0;
+
+}
+
+
+void generate_RIV_tables()
+{
+
+ // 6RBs localized RIV
+ uint8_t Lcrbs,RBstart;
+ uint16_t RIV;
+ uint32_t alloc0,allocdist0_0_even,allocdist0_0_odd,allocdist0_1_even,allocdist0_1_odd;
+ uint32_t alloc1,allocdist1_0_even,allocdist1_0_odd,allocdist1_1_even,allocdist1_1_odd;
+ uint32_t alloc2,allocdist2_0_even,allocdist2_0_odd,allocdist2_1_even,allocdist2_1_odd;
+ uint32_t alloc3,allocdist3_0_even,allocdist3_0_odd,allocdist3_1_even,allocdist3_1_odd;
+ uint32_t nVRB,nVRB_even_dist,nVRB_odd_dist;
+
+ for (RBstart=0; RBstart<6; RBstart++) {
+ alloc0 = 0;
+ allocdist0_0_even = 0;
+ allocdist0_0_odd = 0;
+ for (Lcrbs=1; Lcrbs<=(6-RBstart); Lcrbs++) {
+ //printf("RBstart %d, len %d --> ",RBstart,Lcrbs);
+ nVRB = Lcrbs-1+RBstart;
+ alloc0 |= (1<<nVRB);
+ allocdist0_0_even |= (1<<get_prb(6,0,nVRB,0));
+ allocdist0_0_odd |= (1<<get_prb(6,1,nVRB,0));
+ RIV=computeRIV(6,RBstart,Lcrbs);
+
+ if (RIV>RIV_max6)
+ RIV_max6 = RIV;
+
+ // printf("RIV %d (%d) : first_rb %d NBRB %d\n",RIV,localRIV2alloc_LUT25[RIV],RBstart,Lcrbs);
+ localRIV2alloc_LUT6[RIV] = alloc0;
+ distRIV2alloc_even_LUT6[RIV] = allocdist0_0_even;
+ distRIV2alloc_odd_LUT6[RIV] = allocdist0_0_odd;
+ RIV2nb_rb_LUT6[RIV] = Lcrbs;
+ RIV2first_rb_LUT6[RIV] = RBstart;
+ }
+ }
+
+
+ for (RBstart=0; RBstart<25; RBstart++) {
+ alloc0 = 0;
+ allocdist0_0_even = 0;
+ allocdist0_0_odd = 0;
+ for (Lcrbs=1; Lcrbs<=(25-RBstart); Lcrbs++) {
+ nVRB = Lcrbs-1+RBstart;
+ //printf("RBstart %d, len %d --> ",RBstart,Lcrbs);
+ alloc0 |= (1<<nVRB);
+ allocdist0_0_even |= (1<<get_prb(25,0,nVRB,0));
+ allocdist0_0_odd |= (1<<get_prb(25,1,nVRB,0));
+
+ //printf("alloc 0 %x, allocdist0_even %x, allocdist0_odd %x\n",alloc0,allocdist0_0_even,allocdist0_0_odd);
+ RIV=computeRIV(25,RBstart,Lcrbs);
+
+ if (RIV>RIV_max25)
+ RIV_max25 = RIV;;
+
+
+ localRIV2alloc_LUT25[RIV] = alloc0;
+ distRIV2alloc_even_LUT25[RIV] = allocdist0_0_even;
+ distRIV2alloc_odd_LUT25[RIV] = allocdist0_0_odd;
+ RIV2nb_rb_LUT25[RIV] = Lcrbs;
+ RIV2first_rb_LUT25[RIV] = RBstart;
+ }
+ }
+
+
+ for (RBstart=0; RBstart<50; RBstart++) {
+ alloc0 = 0;
+ alloc1 = 0;
+ allocdist0_0_even=0;
+ allocdist1_0_even=0;
+ allocdist0_0_odd=0;
+ allocdist1_0_odd=0;
+ allocdist0_1_even=0;
+ allocdist1_1_even=0;
+ allocdist0_1_odd=0;
+ allocdist1_1_odd=0;
+
+ for (Lcrbs=1; Lcrbs<=(50-RBstart); Lcrbs++) {
+
+ nVRB = Lcrbs-1+RBstart;
+
+
+ if (nVRB<32)
+ alloc0 |= (1<<nVRB);
+ else
+ alloc1 |= (1<<(nVRB-32));
+
+ // Distributed Gap1, even slot
+ nVRB_even_dist = get_prb(50,0,nVRB,0);
+ if (nVRB_even_dist<32)
+ allocdist0_0_even |= (1<<nVRB_even_dist);
+ else
+ allocdist1_0_even |= (1<<(nVRB_even_dist-32));
+
+ // Distributed Gap1, odd slot
+ nVRB_odd_dist = get_prb(50,1,nVRB,0);
+ if (nVRB_odd_dist<32)
+ allocdist0_0_odd |= (1<<nVRB_odd_dist);
+ else
+ allocdist1_0_odd |= (1<<(nVRB_odd_dist-32));
+
+ // Distributed Gap2, even slot
+ nVRB_even_dist = get_prb(50,0,nVRB,1);
+ if (nVRB_even_dist<32)
+ allocdist0_1_even |= (1<<nVRB_even_dist);
+ else
+ allocdist1_1_even |= (1<<(nVRB_even_dist-32));
+
+ // Distributed Gap2, odd slot
+ nVRB_odd_dist = get_prb(50,1,nVRB,1);
+ if (nVRB_odd_dist<32)
+ allocdist0_1_odd |= (1<<nVRB_odd_dist);
+ else
+ allocdist1_1_odd |= (1<<(nVRB_odd_dist-32));
+
+ RIV=computeRIV(50,RBstart,Lcrbs);
+
+ if (RIV>RIV_max50)
+ RIV_max50 = RIV;
+
+ // printf("RIV %d : first_rb %d NBRB %d\n",RIV,RBstart,Lcrbs);
+ localRIV2alloc_LUT50_0[RIV] = alloc0;
+ localRIV2alloc_LUT50_1[RIV] = alloc1;
+ distRIV2alloc_gap0_even_LUT50_0[RIV] = allocdist0_0_even;
+ distRIV2alloc_gap0_even_LUT50_1[RIV] = allocdist1_0_even;
+ distRIV2alloc_gap0_odd_LUT50_0[RIV] = allocdist0_0_odd;
+ distRIV2alloc_gap0_odd_LUT50_1[RIV] = allocdist1_0_odd;
+ distRIV2alloc_gap1_even_LUT50_0[RIV] = allocdist0_1_even;
+ distRIV2alloc_gap1_even_LUT50_1[RIV] = allocdist1_1_even;
+ distRIV2alloc_gap1_odd_LUT50_0[RIV] = allocdist0_1_odd;
+ distRIV2alloc_gap1_odd_LUT50_1[RIV] = allocdist1_1_odd;
+ RIV2nb_rb_LUT50[RIV] = Lcrbs;
+ RIV2first_rb_LUT50[RIV] = RBstart;
+ }
+ }
+
+
+ for (RBstart=0; RBstart<100; RBstart++) {
+ alloc0 = 0;
+ alloc1 = 0;
+ alloc2 = 0;
+ alloc3 = 0;
+ allocdist0_0_even=0;
+ allocdist1_0_even=0;
+ allocdist2_0_even=0;
+ allocdist3_0_even=0;
+ allocdist0_0_odd=0;
+ allocdist1_0_odd=0;
+ allocdist2_0_odd=0;
+ allocdist3_0_odd=0;
+ allocdist0_1_even=0;
+ allocdist1_1_even=0;
+ allocdist2_1_even=0;
+ allocdist3_1_even=0;
+ allocdist0_1_odd=0;
+ allocdist1_1_odd=0;
+ allocdist2_1_odd=0;
+ allocdist3_1_odd=0;
+
+ for (Lcrbs=1; Lcrbs<=(100-RBstart); Lcrbs++) {
+
+ nVRB = Lcrbs-1+RBstart;
+
+ if (nVRB<32)
+ alloc0 |= (1<<nVRB);
+ else if (nVRB<64)
+ alloc1 |= (1<<(nVRB-32));
+ else if (nVRB<96)
+ alloc2 |= (1<<(nVRB-64));
+ else
+ alloc3 |= (1<<(nVRB-96));
+
+ // Distributed Gap1, even slot
+ nVRB_even_dist = get_prb(100,0,nVRB,0);
+
+// if ((RBstart==0) && (Lcrbs<=8))
+// printf("nVRB %d => nVRB_even_dist %d\n",nVRB,nVRB_even_dist);
+
+
+ if (nVRB_even_dist<32)
+ allocdist0_0_even |= (1<<nVRB_even_dist);
+ else if (nVRB_even_dist<64)
+ allocdist1_0_even |= (1<<(nVRB_even_dist-32));
+ else if (nVRB_even_dist<96)
+ allocdist2_0_even |= (1<<(nVRB_even_dist-64));
+ else
+ allocdist3_0_even |= (1<<(nVRB_even_dist-96));
+/* if ((RBstart==0) && (Lcrbs<=8))
+ printf("rballoc =>(%08x.%08x.%08x.%08x)\n",
+ allocdist0_0_even,
+ allocdist1_0_even,
+ allocdist2_0_even,
+ allocdist3_0_even
+ );
+*/
+ // Distributed Gap1, odd slot
+ nVRB_odd_dist = get_prb(100,1,nVRB,0);
+ if (nVRB_odd_dist<32)
+ allocdist0_0_odd |= (1<<nVRB_odd_dist);
+ else if (nVRB_odd_dist<64)
+ allocdist1_0_odd |= (1<<(nVRB_odd_dist-32));
+ else if (nVRB_odd_dist<96)
+ allocdist2_0_odd |= (1<<(nVRB_odd_dist-64));
+ else
+ allocdist3_0_odd |= (1<<(nVRB_odd_dist-96));
+
+
+ // Distributed Gap2, even slot
+ nVRB_even_dist = get_prb(100,0,nVRB,1);
+ if (nVRB_even_dist<32)
+ allocdist0_1_even |= (1<<nVRB_even_dist);
+ else if (nVRB_even_dist<64)
+ allocdist1_1_even |= (1<<(nVRB_even_dist-32));
+ else if (nVRB_even_dist<96)
+ allocdist2_1_even |= (1<<(nVRB_even_dist-64));
+ else
+ allocdist3_1_even |= (1<<(nVRB_even_dist-96));
+
+
+ // Distributed Gap2, odd slot
+ nVRB_odd_dist = get_prb(100,1,nVRB,1);
+ if (nVRB_odd_dist<32)
+ allocdist0_1_odd |= (1<<nVRB_odd_dist);
+ else if (nVRB_odd_dist<64)
+ allocdist1_1_odd |= (1<<(nVRB_odd_dist-32));
+ else if (nVRB_odd_dist<96)
+ allocdist2_1_odd |= (1<<(nVRB_odd_dist-64));
+ else
+ allocdist3_1_odd |= (1<<(nVRB_odd_dist-96));
+
+
+ RIV=computeRIV(100,RBstart,Lcrbs);
+
+ if (RIV>RIV_max100)
+ RIV_max100 = RIV;
+
+ // printf("RIV %d : first_rb %d NBRB %d\n",RIV,RBstart,Lcrbs);
+ localRIV2alloc_LUT100_0[RIV] = alloc0;
+ localRIV2alloc_LUT100_1[RIV] = alloc1;
+ localRIV2alloc_LUT100_2[RIV] = alloc2;
+ localRIV2alloc_LUT100_3[RIV] = alloc3;
+ distRIV2alloc_gap0_even_LUT100_0[RIV] = allocdist0_0_even;
+ distRIV2alloc_gap0_even_LUT100_1[RIV] = allocdist1_0_even;
+ distRIV2alloc_gap0_even_LUT100_2[RIV] = allocdist2_0_even;
+ distRIV2alloc_gap0_even_LUT100_3[RIV] = allocdist3_0_even;
+ distRIV2alloc_gap0_odd_LUT100_0[RIV] = allocdist0_0_odd;
+ distRIV2alloc_gap0_odd_LUT100_1[RIV] = allocdist1_0_odd;
+ distRIV2alloc_gap0_odd_LUT100_2[RIV] = allocdist2_0_odd;
+ distRIV2alloc_gap0_odd_LUT100_3[RIV] = allocdist3_0_odd;
+ distRIV2alloc_gap1_even_LUT100_0[RIV] = allocdist0_1_even;
+ distRIV2alloc_gap1_even_LUT100_1[RIV] = allocdist1_1_even;
+ distRIV2alloc_gap1_even_LUT100_2[RIV] = allocdist2_1_even;
+ distRIV2alloc_gap1_even_LUT100_3[RIV] = allocdist3_1_even;
+ distRIV2alloc_gap1_odd_LUT100_0[RIV] = allocdist0_1_odd;
+ distRIV2alloc_gap1_odd_LUT100_1[RIV] = allocdist1_1_odd;
+ distRIV2alloc_gap1_odd_LUT100_2[RIV] = allocdist2_1_odd;
+ distRIV2alloc_gap1_odd_LUT100_3[RIV] = allocdist3_1_odd;
+
+ RIV2nb_rb_LUT100[RIV] = Lcrbs;
+ RIV2first_rb_LUT100[RIV] = RBstart;
+ }
+ }
+}
+
+// Ngap = 3, N_VRB_DL=6, P=1, N_row=2, N_null=4*2-6=2
+// permutation for even slots :
+// n_PRB'(0,2,4) = (0,1,2), n_PRB'(1,3,5) = (4,5,6)
+// n_PRB''(0,1,2,3) = (0,2,4,6)
+// => n_tilde_PRB(5) = (4)
+// n_tilde_PRB(4) = (1)
+// n_tilde_PRB(2,3) = (3,5)
+// n_tilde_PRB(0,1) = (0,2)
+
+
+int8_t find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type)
+{
+ uint8_t i;
+ int8_t first_free_index=-1;
+
+ AssertFatal(eNB!=NULL,"eNB is null\n");
+ for (i=0; i<NUMBER_OF_UE_MAX; i++) {
+ AssertFatal(eNB->dlsch[i]!=NULL,"eNB->dlsch[%d] is null\n",i);
+ AssertFatal(eNB->dlsch[i]!=NULL,"eNB->dlsch[%d][0] is null\n",i);
+ LOG_D(PHY,"searching for rnti %x : UE index %d=> harq_mask %x, rnti %x, first_free_index %d\n", rnti,i,eNB->dlsch[i][0]->harq_mask,eNB->dlsch[i][0]->rnti,first_free_index);
+ if ((eNB->dlsch[i][0]->harq_mask >0) &&
+ (eNB->dlsch[i][0]->rnti==rnti)) return i;
+ else if ((eNB->dlsch[i][0]->harq_mask == 0) && (first_free_index==-1)) first_free_index=i;
+ }
+ if (type == SEARCH_EXIST) return -1;
+ if (first_free_index != -1)
+ eNB->dlsch[first_free_index][0]->rnti = 0;
+ return first_free_index;
+}
+
+int8_t find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type)
+{
+ uint8_t i;
+ int8_t first_free_index=-1;
+
+ AssertFatal(eNB!=NULL,"eNB is null\n");
+ for (i=0; i<NUMBER_OF_UE_MAX; i++) {
+ AssertFatal(eNB->ulsch[i]!=NULL,"eNB->ulsch[%d] is null\n",i);
+ if ((eNB->ulsch[i]->harq_mask >0) &&
+ (eNB->ulsch[i]->rnti==rnti)) return i;
+ else if ((eNB->ulsch[i]->harq_mask == 0) && (first_free_index==-1)) first_free_index=i;
+ }
+ if (type == SEARCH_EXIST) return -1;
+ if (first_free_index != -1)
+ eNB->ulsch[first_free_index]->rnti = 0;
+ return first_free_index;
+}
+
+
+uint32_t get_rballoc(vrb_t vrb_type,uint16_t rb_alloc_dci)
+{
+
+ return(localRIV2alloc_LUT25[rb_alloc_dci]);
+
+}
+
+/*
+uint8_t get_transmission_mode(module_id_t Mod_id, uint8_t CC_id, rnti_t rnti)
+{
+ unsigned char UE_id;
+
+ // find the UE_index corresponding to rnti
+ UE_id = find_ue(rnti,RC.eNB[Mod_id][CC_id]);
+ DevAssert( UE_id != (unsigned char)-1 );
+
+ return(RC.eNB[Mod_id][CC_id]->transmission_mode[UE_id]);
+}
+*/
+
+void fill_pdcch_order(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,nfapi_dl_config_dci_dl_pdu *pdu)
+{
+ LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms;
+ uint8_t *dci_pdu = &dci_alloc->dci_pdu[0];
+ nfapi_dl_config_dci_dl_pdu_rel8_t *rel8 = &pdu->dci_dl_pdu_rel8;
+
+ dci_alloc->firstCCE = rel8->cce_idx;
+ dci_alloc->L = rel8->aggregation_level;
+ dci_alloc->rnti = rel8->rnti;
+ dci_alloc->harq_pid = rel8->harq_process;
+ dci_alloc->ra_flag = 0;
+ dci_alloc->format = format1A;
+
+ LOG_D(PHY,"NFAPI: DCI format %d, nCCE %d, L %d, rnti %x,harq_pid %d\n",
+ rel8->dci_format,rel8->cce_idx,rel8->aggregation_level,rel8->rnti,rel8->harq_process);
+
+ switch (fp->N_RB_DL) {
+ case 6:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->type = 1;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->padding = 0;
+ } else {
+ dci_alloc->dci_length = sizeof_DCI1A_1_5MHz_FDD_t;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->type = 1;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ break;
+ case 25:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->type = 1;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI1A_5MHz_FDD_t;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->type = 1;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ break;
+ case 50:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI1A_10MHz_TDD_1_6_t;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->type = 1;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI1A_10MHz_FDD_t;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->type = 1;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ break;
+ case 100:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI1A_20MHz_TDD_1_6_t;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->type = 1;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI1A_20MHz_FDD_t;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->type = 1;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ break;
+ }
+
+ LOG_I(PHY,"%d.%d: DCI 1A: rnti %x, PDCCH order to do PRACH\n",
+ proc->frame_tx, proc->subframe_tx, rel8->rnti);
+}
+
+void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,nfapi_dl_config_dci_dl_pdu *pdu)
+{
+ LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms;
+ uint8_t *dci_pdu = &dci_alloc->dci_pdu[0];
+ nfapi_dl_config_dci_dl_pdu_rel8_t *rel8 = &pdu->dci_dl_pdu_rel8;
+
+ /* check if this is a DCI 1A PDCCH order for RAPROC */
+ if (rel8->dci_format == NFAPI_DL_DCI_FORMAT_1A && rel8->rnti_type == 1) {
+ int full_rb;
+ switch (fp->N_RB_DL) {
+ case 6: full_rb = 63; break;
+ case 25: full_rb = 511; break;
+ case 50: full_rb = 2047; break;
+ case 100: full_rb = 8191; break;
+ default: abort();
+ }
+ if (rel8->resource_block_coding == full_rb)
+ return fill_pdcch_order(eNB, proc, dci_alloc, pdu);
+ }
+
+ LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
+ LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
+ int beamforming_mode = 0;
+ int UE_id=-1;
+ int NPRB;
+ int TB0_active;
+ int TB1_active;
+ uint16_t DL_pmi_single=0; // This should be taken from DLSCH parameters for PUSCH precoding
+ uint8_t I_mcs = 0;
+
+ dci_alloc->firstCCE = rel8->cce_idx;
+ dci_alloc->L = rel8->aggregation_level;
+ dci_alloc->rnti = rel8->rnti;
+ dci_alloc->harq_pid = rel8->harq_process;
+ dci_alloc->ra_flag = 0;
+
+ LOG_D(PHY,"NFAPI: SFN/SF:%04d%d proc:TX:[SFN/SF:%04d%d] DCI format %d, nCCE %d, L %d, rnti %x, harq_pid %d\n",
+ frame,subframe,proc->frame_tx,proc->subframe_tx,rel8->dci_format,rel8->cce_idx,rel8->aggregation_level,rel8->rnti,rel8->harq_process);
+ if ((rel8->rnti_type == 2 ) && (rel8->rnti != SI_RNTI) && (rel8->rnti != P_RNTI)) dci_alloc->ra_flag = 1;
+
+ UE_id = find_dlsch(rel8->rnti,eNB,SEARCH_EXIST_OR_FREE);
+ AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n");
+ AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
+ dlsch0 = eNB->dlsch[UE_id][0];
+ dlsch1 = eNB->dlsch[UE_id][1];
+
+
+ beamforming_mode = eNB->transmission_mode[(uint8_t)UE_id]<7?0:eNB->transmission_mode[(uint8_t)UE_id];
+ dlsch0_harq = dlsch0->harq_processes[rel8->harq_process];
+ dlsch0_harq->codeword = 0;
+ dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
+ dlsch1_harq->codeword = 1;
+ dlsch0->subframe_tx[subframe] = 1;
+
+ LOG_D(PHY,"NFAPI: SFN/SF:%04d%d proc:TX:SFN/SF:%04d%d dlsch0[rnti:%x harq_mask:%04x] dci_pdu[rnti:%x rnti_type:%d harq_process:%d ndi1:%d] dlsch0_harq[round:%d harq_mask:%x ndi:%d]\n",
+ frame,subframe,
+ proc->frame_tx,proc->subframe_tx,
+ dlsch0->rnti,dlsch0->harq_mask,
+ rel8->rnti, rel8->rnti_type, rel8->harq_process, rel8->new_data_indicator_1,
+ dlsch0_harq->round, dlsch0->harq_mask, dlsch0_harq->ndi);
+
+ if (dlsch0->rnti != rel8->rnti) { // if rnti of dlsch is not the same as in the config, this is a new entry
+ dlsch0_harq->round=0;
+ dlsch0->harq_mask=0;
+ }
+ if ((dlsch0->harq_mask & (1<<rel8->harq_process)) > 0 ) {
+ if (rel8->new_data_indicator_1 != dlsch0_harq->ndi)
+ dlsch0_harq->round=0;
+ }
+ else { // process is inactive, so activate and set round to 0
+ dlsch0_harq->round=0;
+ }
+ dlsch0_harq->ndi = rel8->new_data_indicator_1;
+
+ dlsch0->active = 1;
+ if (rel8->rnti_type == 2)
+ dlsch0_harq->round = 0;
+
+ LOG_D(PHY,"NFAPI: rel8[rnti %x dci_format %d harq_process %d ndi1 %d rnti type %d] dlsch0[rnti %x harq_mask %x] dlsch0_harq[round %d ndi %d]\n",
+ rel8->rnti,rel8->dci_format,rel8->harq_process, rel8->new_data_indicator_1, rel8->rnti_type,
+ dlsch0->rnti,dlsch0->harq_mask,
+ dlsch0_harq->round,dlsch0_harq->ndi
+ );
+
+ switch (rel8->dci_format) {
+
+ case NFAPI_DL_DCI_FORMAT_1A:
+
+ AssertFatal(rel8->resource_block_coding < 8192, "SFN/SF:%04d%d proc:TX:SFN/SF:%04d%d: rel8->resource_block_coding (%p) %u >= 8192 (rnti %x, rnti_type %d, format %d, harq_id %d\n",
+ frame,subframe,proc->frame_tx,subframe,
+ &rel8->resource_block_coding,rel8->resource_block_coding,rel8->rnti,rel8->rnti_type,rel8->dci_format,rel8->harq_process);
+
+
+ dci_alloc->format = format1A;
+
+ switch (fp->N_RB_DL) {
+ case 6:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->type = 1;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->padding = 0;
+
+ } else {
+ dci_alloc->dci_length = sizeof_DCI1A_1_5MHz_FDD_t;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->type = 1;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n");
+ dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rel8->resource_block_coding];
+ dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rel8->resource_block_coding];//NPRB;
+ break;
+ case 25:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->type = 1;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI1A_5MHz_FDD_t;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->type = 1;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_5MHz_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n");
+ dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rel8->resource_block_coding];
+ dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ dlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rel8->resource_block_coding];//NPRB;
+ break;
+ case 50:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI1A_10MHz_TDD_1_6_t;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->type = 1;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI1A_10MHz_FDD_t;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->type = 1;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_10MHz_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n");
+ dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT50_0[rel8->resource_block_coding];
+ dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rel8->resource_block_coding];
+ dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ dlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rel8->resource_block_coding];//NPRB;
+ break;
+ case 100:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI1A_20MHz_TDD_1_6_t;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->type = 1;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI1A_20MHz_FDD_t;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->type = 1;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1A_20MHz_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n");
+ dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT100_0[rel8->resource_block_coding];
+ dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT100_1[rel8->resource_block_coding];
+ dlsch0_harq->rb_alloc[2] = localRIV2alloc_LUT100_2[rel8->resource_block_coding];
+ dlsch0_harq->rb_alloc[3] = localRIV2alloc_LUT100_3[rel8->resource_block_coding];
+ dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag;
+ dlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rel8->resource_block_coding];//NPRB;
+ break;
+ }
+
+ if (rel8->rnti_type == 2 ) {
+ // see 36-212 V8.6.0 p. 45
+ NPRB = (rel8->tpc&1)+2;
+ // 36-213 sec.7.1.7.2 p.26
+ I_mcs = rel8->mcs_1;
+ }
+ else {
+ NPRB = dlsch0_harq->nb_rb;
+ I_mcs = get_I_TBS(rel8->mcs_1);
+ }
+ AssertFatal(NPRB>0,"DCI 1A: NPRB = 0 (rnti %x, rnti type %d, tpc %d, round %d, resource_block_coding %d, harq process %d)\n",rel8->rnti,rel8->rnti_type,rel8->tpc,dlsch0_harq->round,rel8->resource_block_coding,rel8->harq_process);
+ dlsch0_harq->rvidx = rel8->redundancy_version_1;
+ dlsch0_harq->Nl = 1;
+ dlsch0_harq->mimo_mode = (fp->nb_antenna_ports_eNB == 1) ? SISO : ALAMOUTI;
+ dlsch0_harq->dl_power_off = 1;
+
+
+
+ dlsch0_harq->mcs = rel8->mcs_1;
+ dlsch0_harq->Qm = 2;
+ dlsch0_harq->TBS = TBStable[I_mcs][NPRB-1];
+ dlsch0->harq_ids[subframe] = rel8->harq_process;
+ dlsch0->active = 1;
+ dlsch0->rnti = rel8->rnti;
+ dlsch0->harq_ids[subframe] = rel8->harq_process;
+ if (dlsch0_harq->round == 0)
+ dlsch0_harq->status = ACTIVE;
+
+ dlsch0->harq_mask |= (1<<rel8->harq_process);
+
+ if (rel8->rnti_type == 1) LOG_I(PHY,"DCI 1A: round %d, mcs %d, rballoc %x, rv %d, rnti %x, harq process %d\n",dlsch0_harq->round,rel8->mcs_1,rel8->resource_block_coding,rel8->redundancy_version_1,rel8->rnti,rel8->harq_process);
+
+ break;
+ case NFAPI_DL_DCI_FORMAT_1:
+
+ dci_alloc->format = format1;
+ dlsch0->active = 1;
+
+ LOG_D(PHY,"SFN/SF:%04d%d proc:TX:SFN/SF:%04d%d: Programming DLSCH for Format 1 DCI, harq_pid %d\n",frame,subframe,proc->frame_tx,subframe,rel8->harq_process);
+
+ switch (fp->N_RB_DL) {
+ case 6:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI1_1_5MHz_TDD_t;
+ ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI1_1_5MHz_TDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1_1_5MHz_TDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1_1_5MHz_TDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1_1_5MHz_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1_1_5MHz_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI1_1_5MHz_TDD_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI1_1_5MHz_FDD_t;
+ ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI1_1_5MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1_1_5MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1_1_5MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1_1_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1_1_5MHz_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ break;
+ case 25:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI1_5MHz_TDD_t;
+ ((DCI1_5MHz_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI1_5MHz_TDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1_5MHz_TDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1_5MHz_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1_5MHz_TDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1_5MHz_TDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1_5MHz_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1_5MHz_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI1_5MHz_TDD_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI1_5MHz_FDD_t;
+ ((DCI1_5MHz_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI1_5MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1_5MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1_5MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1_5MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1_5MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1_5MHz_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ break;
+ case 50:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI1_10MHz_TDD_t;
+ ((DCI1_10MHz_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI1_10MHz_TDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1_10MHz_TDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1_10MHz_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1_10MHz_TDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1_10MHz_TDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1_10MHz_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1_10MHz_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI1_10MHz_TDD_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI1_10MHz_FDD_t;
+ ((DCI1_10MHz_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI1_10MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1_10MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1_10MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1_10MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1_10MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1_10MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1_10MHz_FDD_t *)dci_pdu)->padding = 0;
+ }
+ break;
+ case 100:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI1_20MHz_TDD_t;
+ ((DCI1_20MHz_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI1_20MHz_TDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1_20MHz_TDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1_20MHz_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1_20MHz_TDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1_20MHz_TDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1_20MHz_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1_20MHz_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI1_20MHz_TDD_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI1_20MHz_FDD_t;
+ ((DCI1_20MHz_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI1_20MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1;
+ ((DCI1_20MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1;
+ ((DCI1_20MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI1_20MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1;
+ ((DCI1_20MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI1_20MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI1_20MHz_FDD_t *)dci_pdu)->padding = 0;
+ }
+ break;
+ }
+
+ AssertFatal(rel8->harq_process<8,"Format 1: harq_pid=%d >= 8\n", rel8->harq_process);
+
+
+ dlsch0_harq = dlsch0->harq_processes[rel8->harq_process];
+ dlsch0_harq->codeword=0;
+
+ // printf("DCI: Setting subframe_tx for subframe %d\n",subframe);
+ dlsch0->subframe_tx[subframe] = 1;
+
+ conv_rballoc(rel8->resource_allocation_type,
+ rel8->resource_block_coding,
+ fp->N_RB_DL,
+ dlsch0_harq->rb_alloc);
+
+ dlsch0_harq->nb_rb = conv_nprb(rel8->resource_allocation_type,
+ rel8->resource_block_coding,
+ fp->N_RB_DL);
+
+ NPRB = dlsch0_harq->nb_rb;
+
+
+ AssertFatal(NPRB>0,"NPRB == 0\n");
+
+ dlsch0_harq->rvidx = rel8->redundancy_version_1;
+
+ dlsch0_harq->Nl = 1;
+ // dlsch[0]->layer_index = 0;
+ if (beamforming_mode == 0)
+ dlsch0_harq->mimo_mode = (fp->nb_antenna_ports_eNB == 1) ? SISO : ALAMOUTI;
+ else if (beamforming_mode == 7)
+ dlsch0_harq->mimo_mode = TM7;
+ else
+ LOG_E(PHY,"Invalid beamforming mode %dL\n", beamforming_mode);
+
+ dlsch0_harq->dl_power_off = 1;
+
+ dlsch0->active = 1;
+
+
+
+ if (dlsch0_harq->round == 0) {
+ dlsch0_harq->status = ACTIVE;
+
+ // printf("Setting DLSCH process %d to ACTIVE\n",rel8->harq_process);
+ // MCS and TBS don't change across HARQ rounds
+ dlsch0_harq->mcs = rel8->mcs_1;
+ dlsch0_harq->Qm = get_Qm(rel8->mcs_1);
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][NPRB-1];
+
+ }
+
+ LOG_D(PHY,"DCI: Set harq_ids[%d] to %d (%p)\n",subframe,rel8->harq_process,dlsch0);
+ dlsch0->harq_ids[subframe] = rel8->harq_process;
+
+ dlsch0->harq_mask |= (1<<rel8->harq_process);
+
+
+ dlsch0->rnti = rel8->rnti;
+
+
+ break;
+ case NFAPI_DL_DCI_FORMAT_2A:
+
+ dci_alloc->format = format2A;
+ switch (fp->N_RB_DL) {
+ case 6:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI2A_1_5MHz_2A_TDD_t;
+ ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ /* there is no padding in this structure, it is exactly 32 bits */
+ // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI2A_1_5MHz_2A_FDD_t;
+ ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ break;
+ case 25:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI2A_5MHz_2A_TDD_t;
+ ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI2A_5MHz_2A_FDD_t;
+ ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ break;
+ case 50:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI2A_10MHz_2A_TDD_t;
+ ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI2A_10MHz_2A_FDD_t;
+ ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->padding = 0;
+ }
+ break;
+ case 100:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI2A_20MHz_2A_TDD_t;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI2A_20MHz_2A_FDD_t;
+ ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->padding = 0;
+ }
+ break;
+
+ }
+
+ AssertFatal(rel8->harq_process<8,"Format 2_2A: harq_pid=%d >= 8\n", rel8->harq_process);
+
+
+ // Flip the TB to codeword mapping as described in 5.3.3.1.5 of 36-212 V11.3.0
+ // note that we must set tbswap=0 in eNB scheduler if one TB is deactivated
+
+ // This must be set as in TM4, does not work properly now.
+ if (rel8->transport_block_to_codeword_swap_flag == 1) {
+ dlsch0 = eNB->dlsch[UE_id][1];
+ dlsch1 = eNB->dlsch[UE_id][0];
+ }
+
+ dlsch0_harq = dlsch0->harq_processes[rel8->harq_process];
+ dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
+
+ dlsch0->subframe_tx[subframe] = 1;
+
+ dlsch0->harq_ids[subframe] = rel8->harq_process;
+ dlsch1->harq_ids[subframe] = rel8->harq_process;
+ // printf("Setting DLSCH harq id %d to subframe %d\n",harq_pid,subframe);
+
+
+ conv_rballoc(rel8->resource_allocation_type,
+ rel8->resource_block_coding,
+ fp->N_RB_DL,
+ dlsch0_harq->rb_alloc);
+
+ dlsch1_harq->rb_alloc[0] = dlsch0_harq->rb_alloc[0];
+ dlsch0_harq->nb_rb = conv_nprb(rel8->resource_allocation_type,
+ rel8->resource_block_coding,
+ fp->N_RB_DL);
+ dlsch1_harq->nb_rb = dlsch0_harq->nb_rb;
+
+ AssertFatal(dlsch0_harq->nb_rb > 0,"nb_rb=0\n");
+
+ dlsch0_harq->mcs = rel8->mcs_1;
+ dlsch1_harq->mcs = rel8->mcs_2;
+ dlsch0_harq->Qm = get_Qm(rel8->mcs_1);
+ dlsch1_harq->Qm = get_Qm(rel8->mcs_2);
+ dlsch0_harq->rvidx = rel8->redundancy_version_1;
+ dlsch1_harq->rvidx = rel8->redundancy_version_2;
+
+ // assume both TBs are active
+ dlsch0_harq->Nl = 1;
+ dlsch1_harq->Nl = 1;
+ dlsch0->active = 1;
+ dlsch1->active = 1;
+ dlsch0->harq_mask |= (1<<rel8->harq_process);
+ dlsch1->harq_mask |= (1<<rel8->harq_process);
+
+ // check if either TB is disabled (see 36-213 V11.3 Section )
+ if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) {
+ dlsch0->active = 0;
+ dlsch0->harq_mask &= ~(1<<rel8->harq_process);
+ }
+
+ if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) {
+ dlsch1->active = 0;
+ dlsch1->harq_mask &= ~(1<<rel8->harq_process);
+ }
+
+ // dlsch0_harq->dl_power_off = 0;
+ // dlsch1_harq->dl_power_off = 0;
+
+
+ if (fp->nb_antenna_ports_eNB == 2) {
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
+ dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch0_harq->nb_rb-1];
+
+ if ((dlsch0->active==1) && (dlsch1->active==1)) {
+
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+ } else {
+ dlsch0_harq->mimo_mode = ALAMOUTI;
+ dlsch1_harq->mimo_mode = ALAMOUTI;
+ }
+ } else if (fp->nb_antenna_ports_eNB == 4) { // 4 antenna case
+ if ((dlsch0->active==1) && (dlsch1->active==1)) {
+ switch (rel8->precoding_information) {
+ case 0: // one layer per transport block
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+ break;
+
+ case 1: // one-layers on TB 0, two on TB 1
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->Nl = 2;
+ dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][(dlsch1_harq->nb_rb<<1)-1];
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+ break;
+
+ case 2: // two-layers on TB 0, two on TB 1
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch0_harq->Nl = 2;
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+
+ if (fp->N_RB_DL <= 56) {
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][(dlsch0_harq->nb_rb<<1)-1];
+ dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][(dlsch1_harq->nb_rb<<1)-1];
+ } else {
+ LOG_E(PHY,"Add implementation of Table 7.1.7.2.2-1 for two-layer TBS conversion with N_RB_DL > 56\n");
+ }
+
+ break;
+
+ case 3: //
+ LOG_E(PHY,"Illegal value (3) for TPMI in Format 2A DCI\n");
+ break;
+ }
+ } else if (dlsch0->active == 1) {
+ switch (rel8->precoding_information) {
+ case 0: // one layer per transport block
+ dlsch0_harq->mimo_mode = ALAMOUTI;
+ dlsch1_harq->mimo_mode = ALAMOUTI;
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
+ break;
+
+ case 1: // two-layers on TB 0
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch0_harq->Nl = 2;
+ dlsch0_harq->dl_power_off = 1;
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][(dlsch0_harq->nb_rb<<1)-1];
+ break;
+
+ case 2: // two-layers on TB 0, two on TB 1
+ case 3: //
+ LOG_E(PHY,"Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n",rel8->precoding_information);
+ break;
+ }
+ } else if (dlsch1->active == 1) {
+ switch (rel8->precoding_information) {
+ case 0: // one layer per transport block
+ dlsch0_harq->mimo_mode = ALAMOUTI;
+ dlsch1_harq->mimo_mode = ALAMOUTI;
+ dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
+ break;
+
+ case 1: // two-layers on TB 0
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->Nl = 2;
+ dlsch1_harq->dl_power_off = 1;
+ dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][(dlsch1_harq->nb_rb<<1)-1];
+ break;
+
+ case 2: // two-layers on TB 0, two on TB 1
+ case 3: //
+ LOG_E(PHY,"Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n",rel8->precoding_information);
+ break;
+ }
+ }
+ } else {
+ LOG_E(PHY,"Illegal number of antennas for eNB %d\n",fp->nb_antenna_ports_eNB);
+ }
+
+ // reset HARQ process if this is the first transmission
+ if ((dlsch0->active==1) && (dlsch0_harq->round == 0))
+ dlsch0_harq->status = ACTIVE;
+
+ if ((dlsch1->active==1) && (dlsch1_harq->round == 0))
+ dlsch1_harq->status = ACTIVE;
+
+ dlsch0->rnti = rel8->rnti;
+ dlsch1->rnti = rel8->rnti;
+
+
+ break;
+
+ case NFAPI_DL_DCI_FORMAT_2:
+
+ dci_alloc->format = format2;
+ switch (fp->N_RB_DL) {
+ case 6:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI2_1_5MHz_2A_TDD_t;
+ ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->tpmi = rel8->precoding_information;
+ ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI2_1_5MHz_2A_FDD_t;
+ ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->tpmi = rel8->precoding_information;
+ ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ break;
+ case 25:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI2_5MHz_2A_TDD_t;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tpmi = rel8->precoding_information;
+ ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI2_5MHz_2A_FDD_t;
+ ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tpmi = rel8->precoding_information;
+ ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->padding = 0;
+ // printf("FDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ }
+ break;
+ case 50:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI2_10MHz_2A_TDD_t;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tpmi = rel8->precoding_information;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI2_10MHz_2A_FDD_t;
+ ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tpmi = rel8->precoding_information;
+ ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->padding = 0;
+ }
+ break;
+ case 100:
+ if (fp->frame_type == TDD) {
+ dci_alloc->dci_length = sizeof_DCI2_20MHz_2A_TDD_t;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tpmi = rel8->precoding_information;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->padding = 0;
+ // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
+ } else {
+ dci_alloc->dci_length = sizeof_DCI2_20MHz_2A_FDD_t;
+ ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type;
+ ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1;
+ ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2;
+ ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1;
+ ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2;
+ ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding;
+ ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1;
+ ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2;
+ ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc;
+ ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
+ ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tpmi = rel8->precoding_information;
+ ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->padding = 0;
+ }
+ break;
+
+ }
+
+ AssertFatal(rel8->harq_process>=8, "Format 2_2A: harq_pid=%d >= 8\n", rel8->harq_process);
+
+
+ // Flip the TB to codeword mapping as described in 5.3.3.1.5 of 36-212 V11.3.0
+ // note that we must set tbswap=0 in eNB scheduler if one TB is deactivated
+ TB0_active = 1;
+ TB1_active = 1;
+
+ if ((rel8->redundancy_version_1 == 1) && (rel8->mcs_1 == 0)) {
+ TB0_active=0;
+ }
+ if ((rel8->redundancy_version_2 == 1) && (rel8->mcs_2 == 0)) {
+ TB1_active=0;
+ }
+#ifdef DEBUG_HARQ
+ printf("RV0 = %d, RV1 = %d. MCS0 = %d, MCS1=%d\n", rel8->redundancy_version_1, rel8->redundancy_version_2, rel8->mcs_1, rel8->mcs_2);
+#endif
+ if (TB0_active && TB1_active && rel8->transport_block_to_codeword_swap_flag==0) {
+ dlsch0->active = 1;
+ dlsch1->active = 1;
+ dlsch0->harq_mask |= (1<<rel8->harq_process);
+ dlsch1->harq_mask |= (1<<rel8->harq_process);
+ dlsch0_harq = dlsch0->harq_processes[rel8->harq_process];
+ dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
+ dlsch0_harq->mcs = rel8->mcs_1;
+ dlsch1_harq->mcs = rel8->mcs_2;
+ dlsch0_harq->Qm = get_Qm(rel8->mcs_1);
+ dlsch1_harq->Qm = get_Qm(rel8->mcs_2);
+ dlsch0_harq->rvidx = rel8->redundancy_version_1;
+ dlsch1_harq->rvidx = rel8->redundancy_version_2;
+ dlsch0_harq->status = ACTIVE;
+ dlsch1_harq->status = ACTIVE;
+ dlsch0_harq->codeword=0;
+ dlsch1_harq->codeword=1;
+#ifdef DEBUG_HARQ
+ printf("\n ENB: BOTH ACTIVE\n");
+#endif
+ }
+ else if (TB0_active && TB1_active && rel8->transport_block_to_codeword_swap_flag==1) {
+ dlsch0 = eNB->dlsch[UE_id][1];
+ dlsch1 = eNB->dlsch[UE_id][0];
+ dlsch0->active = 1;
+ dlsch1->active = 1;
+
+ dlsch0->harq_mask |= (1<<rel8->harq_process);
+ dlsch1->harq_mask |= (1<<rel8->harq_process);
+
+ dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
+ dlsch0_harq->mcs = rel8->mcs_1;
+ dlsch1_harq->mcs = rel8->mcs_2;
+ dlsch0_harq->Qm = get_Qm(rel8->mcs_1);
+ dlsch1_harq->Qm = get_Qm(rel8->mcs_2);
+ dlsch0_harq->rvidx = rel8->redundancy_version_1;
+ dlsch1_harq->rvidx = rel8->redundancy_version_2;
+ dlsch0_harq->status = ACTIVE;
+ dlsch1_harq->status = ACTIVE;
+ dlsch0_harq->codeword=1;
+ dlsch1_harq->codeword=0;
+ }
+ else if (TB0_active && (TB1_active==0)) {
+ dlsch0->active = 1;
+ dlsch0->harq_mask |= (1<<rel8->harq_process);
+ dlsch0_harq = dlsch0->harq_processes[rel8->harq_process];
+ dlsch0_harq->mcs = rel8->mcs_1;
+ dlsch0_harq->Qm = get_Qm(rel8->mcs_1);
+ dlsch0_harq->rvidx = rel8->redundancy_version_1;
+ dlsch0_harq->status = ACTIVE;
+ dlsch0_harq->codeword = 0;
+ dlsch1=NULL;
+ dlsch1_harq = NULL;
+#ifdef DEBUG_HARQ
+ printf("\n ENB: TB1 is deactivated, retransmit TB0 transmit in TM6\n");
+#endif
+ }
+ else if ((TB0_active==0) && TB1_active) {
+ dlsch1->active = 1;
+ dlsch1->harq_mask |= (1<<rel8->harq_process);
+ dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
+ dlsch1_harq->mcs = rel8->mcs_2;
+ dlsch1_harq->Qm = get_Qm(rel8->mcs_2);
+ dlsch1_harq->rvidx = rel8->redundancy_version_2;
+ dlsch1_harq->status = ACTIVE;
+ dlsch1_harq->codeword = 0;
+ dlsch0=NULL;
+ dlsch0_harq = NULL;
+#ifdef DEBUG_HARQ
+ printf("\n ENB: TB0 is deactivated, retransmit TB1 transmit in TM6\n");
+#endif
+ }
+
+ if (dlsch0 != NULL){
+ dlsch0->subframe_tx[subframe] = 1;
+
+ dlsch0->harq_ids[subframe] = rel8->harq_process;
+ }
+
+ if (dlsch1_harq != NULL){
+ dlsch1->harq_ids[subframe] = rel8->harq_process;
+ }
+
+
+ if (dlsch0 != NULL ){
+ conv_rballoc(rel8->resource_allocation_type,
+ rel8->resource_block_coding,
+ fp->N_RB_DL,
+ dlsch0_harq->rb_alloc);
+
+ dlsch0_harq->nb_rb = conv_nprb(rel8->resource_allocation_type, rel8->resource_block_coding, fp->N_RB_DL);
+
+ if (dlsch1 != NULL){
+ dlsch1_harq->rb_alloc[0] = dlsch0_harq->rb_alloc[0];
+ dlsch1_harq->nb_rb = dlsch0_harq->nb_rb;
+ }
+ } else if ((dlsch0 == NULL ) && (dlsch1 != NULL )){
+ conv_rballoc(rel8->resource_allocation_type,
+ rel8->resource_block_coding,
+ fp->N_RB_DL,
+ dlsch1_harq->rb_alloc);
+
+ dlsch1_harq->nb_rb = conv_nprb(rel8->resource_allocation_type, rel8->resource_block_coding, fp->N_RB_DL);
+ }
+
+
+ // assume both TBs are active
+ if (dlsch0_harq != NULL)
+ dlsch0_harq->Nl = 1;
+ if (dlsch1_harq != NULL)
+ dlsch1_harq->Nl = 1;
+
+
+ // check if either TB is disabled (see 36-213 V11.3 Section )
+
+ if (fp->nb_antenna_ports_eNB == 2) {
+ if ((dlsch0 != NULL) && (dlsch1 != NULL)) { //two CW active
+
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
+ dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
+ switch (rel8->precoding_information) {
+ case 0:
+ dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1;
+ dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1;
+ dlsch0_harq->pmi_alloc = pmi_extend(fp,0,1);
+ dlsch1_harq->pmi_alloc = pmi_extend(fp,0,1);
+ break;
+ case 1:
+ dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj;
+ dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj;
+ dlsch0_harq->pmi_alloc = pmi_extend(fp,1,1);
+ dlsch0_harq->pmi_alloc = pmi_extend(fp,1,1);
+
+ break;
+ case 2: // PUSCH precoding
+ dlsch0_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING;
+ dlsch0_harq->pmi_alloc = DL_pmi_single;
+ dlsch1_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING;
+ dlsch1_harq->pmi_alloc = DL_pmi_single;
+ break;
+ default:
+ break;
+ }
+ } else if ((dlsch0 != NULL) && (dlsch1 == NULL)) { // only CW 0 active
+ dlsch0_harq->dl_power_off = 1;
+ dlsch0_harq->TBS= TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
+ switch (rel8->precoding_information) {
+ case 0 :
+ dlsch0_harq->mimo_mode = ALAMOUTI;
+ break;
+ case 1:
+ dlsch0_harq->mimo_mode = UNIFORM_PRECODING11;
+ dlsch0_harq->pmi_alloc = pmi_extend(fp,0,0);
+ break;
+ case 2:
+ dlsch0_harq->mimo_mode = UNIFORM_PRECODING1m1;
+ dlsch0_harq->pmi_alloc = pmi_extend(fp,1,0);
+ break;
+ case 3:
+ dlsch0_harq->mimo_mode = UNIFORM_PRECODING1j;
+ dlsch0_harq->pmi_alloc = pmi_extend(fp,2,0);
+ break;
+ case 4:
+ dlsch0_harq->mimo_mode = UNIFORM_PRECODING1mj;
+ dlsch0_harq->pmi_alloc = pmi_extend(fp,3,0);
+ break;
+ case 5:
+ dlsch0_harq->mimo_mode = PUSCH_PRECODING0;
+ dlsch0_harq->pmi_alloc = DL_pmi_single;
+ break;
+ case 6:
+ dlsch0_harq->mimo_mode = PUSCH_PRECODING1;
+ dlsch0_harq->pmi_alloc = DL_pmi_single;
+ break;
+ }
+ } else if ((dlsch0 == NULL) && (dlsch1 != NULL)) {
+ dlsch1_harq->dl_power_off = 1;
+ dlsch1_harq->TBS= TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
+ switch (rel8->precoding_information) {
+ case 0 :
+ dlsch1_harq->mimo_mode = ALAMOUTI;
+ break;
+ case 1:
+ dlsch1_harq->mimo_mode = UNIFORM_PRECODING11;
+ dlsch1_harq->pmi_alloc = pmi_extend(fp,0,0);
+ break;
+ case 2:
+ dlsch1_harq->mimo_mode = UNIFORM_PRECODING1m1;
+ dlsch1_harq->pmi_alloc = pmi_extend(fp,1,0);
+ break;
+ case 3:
+ dlsch1_harq->mimo_mode = UNIFORM_PRECODING1j;
+ dlsch1_harq->pmi_alloc = pmi_extend(fp,2,0);
+ break;
+ case 4:
+ dlsch1_harq->mimo_mode = UNIFORM_PRECODING1mj;
+ dlsch1_harq->pmi_alloc = pmi_extend(fp,3,0);
+ break;
+ case 5:
+ dlsch1_harq->mimo_mode = PUSCH_PRECODING0;
+ dlsch1_harq->pmi_alloc = DL_pmi_single;
+ break;
+ case 6:
+ dlsch1_harq->mimo_mode = PUSCH_PRECODING1;
+ dlsch1_harq->pmi_alloc = DL_pmi_single;
+ break;
+ }
+ }
+
+ } else if (fp->nb_antenna_ports_eNB == 4) {
+ // fill in later
+ }
+
+ // reset HARQ process if this is the first transmission
+ /* if (dlsch0_harq->round == 0)
+ dlsch0_harq->status = ACTIVE;
+
+ if (dlsch1_harq->round == 0)
+ dlsch1_harq->status = ACTIVE;*/
+ if (dlsch0_harq != NULL)
+ dlsch0->rnti = rel8->rnti;
+ if (dlsch1 != NULL)
+ dlsch1->rnti = rel8->rnti;
+
+ break;
+ }
+
+ if (dlsch0_harq) {
+ dlsch0_harq->frame = frame;
+ dlsch0_harq->subframe = subframe;
+ }
+ if (dlsch1_harq) {
+ dlsch1_harq->frame = frame;
+ dlsch1_harq->subframe = subframe;
+ }
+
+#ifdef DEBUG_DCI
+
+ if (dlsch0) {
+ printf("dlsch0 eNB: dlsch0 %p\n",dlsch0);
+ printf("dlsch0 eNB: rnti %x\n",dlsch0->rnti);
+ printf("dlsch0 eNB: NBRB %d\n",dlsch0_harq->nb_rb);
+ printf("dlsch0 eNB: rballoc %x\n",dlsch0_harq->rb_alloc[0]);
+ printf("dlsch0 eNB: harq_pid %d\n",harq_pid);
+ printf("dlsch0 eNB: round %d\n",dlsch0_harq->round);
+ printf("dlsch0 eNB: rvidx %d\n",dlsch0_harq->rvidx);
+ printf("dlsch0 eNB: TBS %d (NPRB %d)\n",dlsch0_harq->TBS,NPRB);
+ printf("dlsch0 eNB: mcs %d\n",dlsch0_harq->mcs);
+ printf("dlsch0 eNB: tpmi %d\n",rel8->precoding_information);
+ printf("dlsch0 eNB: mimo_mode %d\n",dlsch0_harq->mimo_mode);
+ }
+
+ if (dlsch1) {
+ printf("dlsch1 eNB: dlsch1 %p\n",dlsch1);
+ printf("dlsch1 eNB: rnti %x\n",dlsch1->rnti);
+ printf("dlsch1 eNB: NBRB %d\n",dlsch1_harq->nb_rb);
+ printf("dlsch1 eNB: rballoc %x\n",dlsch1_harq->rb_alloc[0]);
+ printf("dlsch1 eNB: harq_pid %d\n",harq_pid);
+ printf("dlsch1 eNB: round %d\n",dlsch1_harq->round);
+ printf("dlsch1 eNB: rvidx %d\n",dlsch1_harq->rvidx);
+ printf("dlsch1 eNB: TBS %d (NPRB %d)\n",dlsch1_harq->TBS,NPRB);
+ printf("dlsch1 eNB: mcs %d\n",dlsch1_harq->mcs);
+ printf("dlsch1 eNB: tpmi %d\n",rel8->precoding_information);
+ printf("dlsch1 eNB: mimo_mode %d\n",dlsch1_harq->mimo_mode);
+ }
+
+#endif
+
+#if T_TRACER
+ if (dlsch0->active)
+ T(T_ENB_PHY_DLSCH_UE_DCI, T_INT(0), T_INT(frame), T_INT(subframe),
+ T_INT(rel8->rnti), T_INT(rel8->dci_format), T_INT(rel8->harq_process),
+ T_INT(rel8->mcs_1), T_INT(dlsch0_harq->TBS));
+#endif
+
+}
+
+void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *dci_alloc,nfapi_dl_config_mpdcch_pdu *pdu) {
+
+ LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms;
+
+ uint8_t *dci_pdu = &dci_alloc->dci_pdu[0];
+ nfapi_dl_config_mpdcch_pdu_rel13_t *rel13 = &pdu->mpdcch_pdu_rel13;
+
+ LTE_eNB_DLSCH_t *dlsch0=NULL;
+ LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL;
+ int UE_id;
+ int subframe = proc->subframe_tx;
+
+ dci_alloc->firstCCE = rel13->ecce_index;
+ dci_alloc->L = rel13->aggregation_level;
+ dci_alloc->rnti = rel13->rnti;
+ dci_alloc->harq_pid = rel13->harq_process;
+ dci_alloc->narrowband = rel13->mpdcch_narrow_band;
+ dci_alloc->number_of_prb_pairs = rel13->number_of_prb_pairs;
+ dci_alloc->resource_block_assignment = rel13->resource_block_assignment;
+ dci_alloc->transmission_type = rel13->mpdcch_tansmission_type;
+ dci_alloc->start_symbol = rel13->start_symbol;
+ dci_alloc->ce_mode = rel13->ce_mode;
+ dci_alloc->dmrs_scrambling_init = rel13->drms_scrambling_init;
+ dci_alloc->i0 = rel13->initial_transmission_sf_io;
+
+ dci_alloc->ra_flag = 0;
+ if (rel13->rnti_type == 2 ) dci_alloc->ra_flag = 1;
+
+ UE_id = find_dlsch(rel13->rnti,eNB,SEARCH_EXIST_OR_FREE);
+ AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n");
+ AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
+ dlsch0 = eNB->dlsch[UE_id][0];
+ dlsch0_harq = dlsch0->harq_processes[rel13->harq_process];
+
+ AssertFatal(fp->frame_type==FDD,"TDD is not supported yet for eMTC\n");
+ AssertFatal(fp->N_RB_DL==25 || fp->N_RB_DL==50 ||fp->N_RB_DL==100,
+ "eMTC only with N_RB_DL = 25,50,100\n");
+
+ switch (rel13->dci_format) {
+
+ case 10: // Format 6-1A
+ dci_alloc->format = format6_1A;
+ dlsch0->active = 1;
+ switch (fp->N_RB_DL) {
+
+ case 25:
+ dci_alloc->dci_length = sizeof_DCI6_1A_5MHz_t;
+ ((DCI6_1A_5MHz_t *)dci_pdu)->type = 1;
+ ((DCI6_1A_5MHz_t *)dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag;
+ ((DCI6_1A_5MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
+ ((DCI6_1A_5MHz_t *)dci_pdu)->mcs = rel13->mcs;
+ ((DCI6_1A_5MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
+ ((DCI6_1A_5MHz_t *)dci_pdu)->harq_pid = rel13->harq_process;
+ ((DCI6_1A_5MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator;
+ ((DCI6_1A_5MHz_t *)dci_pdu)->rv = rel13->redundancy_version;
+ ((DCI6_1A_5MHz_t *)dci_pdu)->TPC = rel13->tpc;
+ ((DCI6_1A_5MHz_t *)dci_pdu)->srs_req = rel13->srs_request;
+ ((DCI6_1A_5MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
+ ((DCI6_1A_5MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
+ ((DCI6_1A_5MHz_t *)dci_pdu)->padding = 0;
+
+ break;
+ case 50:
+ dci_alloc->dci_length = sizeof_DCI6_1A_10MHz_t;
+ ((DCI6_1A_10MHz_t *)dci_pdu)->type = 1;
+ ((DCI6_1A_10MHz_t *)dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag;
+ ((DCI6_1A_10MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
+ ((DCI6_1A_10MHz_t *)dci_pdu)->mcs = rel13->mcs;
+ ((DCI6_1A_10MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
+ ((DCI6_1A_10MHz_t *)dci_pdu)->harq_pid = rel13->harq_process;
+ ((DCI6_1A_10MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator;
+ ((DCI6_1A_10MHz_t *)dci_pdu)->rv = rel13->redundancy_version;
+ ((DCI6_1A_10MHz_t *)dci_pdu)->TPC = rel13->tpc;
+ ((DCI6_1A_10MHz_t *)dci_pdu)->srs_req = rel13->srs_request;
+ ((DCI6_1A_10MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
+ ((DCI6_1A_10MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
+ ((DCI6_1A_10MHz_t *)dci_pdu)->padding = 0;
+ break;
+ case 100:
+ dci_alloc->dci_length = sizeof_DCI6_1A_20MHz_t;
+ ((DCI6_1A_20MHz_t *)dci_pdu)->type = 1;
+ ((DCI6_1A_20MHz_t *)dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag;
+ ((DCI6_1A_20MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
+ ((DCI6_1A_20MHz_t *)dci_pdu)->mcs = rel13->mcs;
+ ((DCI6_1A_20MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
+ ((DCI6_1A_20MHz_t *)dci_pdu)->harq_pid = rel13->harq_process;
+ ((DCI6_1A_20MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator;
+ ((DCI6_1A_20MHz_t *)dci_pdu)->rv = rel13->redundancy_version;
+ ((DCI6_1A_20MHz_t *)dci_pdu)->TPC = rel13->tpc;
+ ((DCI6_1A_20MHz_t *)dci_pdu)->srs_req = rel13->srs_request;
+ ((DCI6_1A_20MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
+ ((DCI6_1A_20MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
+ ((DCI6_1A_20MHz_t *)dci_pdu)->padding = 0;
+ break;
+ }
+ break;
+ case 11: // Format 6-1B
+ dci_alloc->format = format6_1B;
+ dlsch0->active = 1;
+ switch (fp->N_RB_DL) {
+
+ case 25:
+ dci_alloc->dci_length = sizeof_DCI6_1B_5MHz_t;
+ ((DCI6_1B_5MHz_t *)dci_pdu)->type = 1;
+ ((DCI6_1B_5MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
+ ((DCI6_1B_5MHz_t *)dci_pdu)->mcs = rel13->mcs;
+ ((DCI6_1B_5MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
+ ((DCI6_1B_5MHz_t *)dci_pdu)->harq_pid = rel13->harq_process;
+ ((DCI6_1B_5MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator;
+ ((DCI6_1B_5MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
+ ((DCI6_1B_5MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
+ ((DCI6_1B_5MHz_t *)dci_pdu)->padding = 0;
+
+ break;
+ case 50:
+ dci_alloc->dci_length = sizeof_DCI6_1B_10MHz_t;
+ ((DCI6_1B_10MHz_t *)dci_pdu)->type = 1;
+ ((DCI6_1B_10MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
+ ((DCI6_1B_10MHz_t *)dci_pdu)->mcs = rel13->mcs;
+ ((DCI6_1B_10MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
+ ((DCI6_1B_10MHz_t *)dci_pdu)->harq_pid = rel13->harq_process;
+ ((DCI6_1B_10MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator;
+ ((DCI6_1B_10MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
+ ((DCI6_1B_10MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
+ ((DCI6_1B_10MHz_t *)dci_pdu)->padding = 0;
+ break;
+ case 100:
+ dci_alloc->dci_length = sizeof_DCI6_1B_20MHz_t;
+ ((DCI6_1B_20MHz_t *)dci_pdu)->type = 1;
+ ((DCI6_1B_20MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
+ ((DCI6_1B_20MHz_t *)dci_pdu)->mcs = rel13->mcs;
+ ((DCI6_1B_20MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
+ ((DCI6_1B_20MHz_t *)dci_pdu)->harq_pid = rel13->harq_process;
+ ((DCI6_1B_20MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator;
+ ((DCI6_1B_20MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
+ ((DCI6_1B_20MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
+ ((DCI6_1B_20MHz_t *)dci_pdu)->padding = 0;
+ break;
+ }
+ case 12: // Format 6-2
+ dci_alloc->format = format6_2;
+ dlsch0->active = 1;
+ switch (fp->N_RB_DL) {
+ case 25:
+ dci_alloc->dci_length = sizeof_DCI6_2_5MHz_t;
+ if (rel13->paging_direct_indication_differentiation_flag==0) {
+ ((DCI6_2_di_5MHz_t *)dci_pdu)->type = 0;
+ ((DCI6_2_di_5MHz_t *)dci_pdu)->di_info = rel13->direct_indication;
+ ((DCI6_2_di_5MHz_t *)dci_pdu)->padding = 0;
+ }
+ else {
+ ((DCI6_2_paging_5MHz_t *)dci_pdu)->type = 1;
+ ((DCI6_2_paging_5MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
+ ((DCI6_2_paging_5MHz_t *)dci_pdu)->mcs = rel13->mcs;
+ ((DCI6_2_paging_5MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
+ ((DCI6_2_paging_5MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
+ ((DCI6_2_paging_5MHz_t *)dci_pdu)->padding = 0;
+ }
+
+ break;
+ case 50:
+ dci_alloc->dci_length = sizeof_DCI6_2_10MHz_t;
+ if (rel13->paging_direct_indication_differentiation_flag==0) {
+ ((DCI6_2_di_10MHz_t *)dci_pdu)->type = 0;
+ ((DCI6_2_di_10MHz_t *)dci_pdu)->di_info = rel13->direct_indication;
+ ((DCI6_2_di_10MHz_t *)dci_pdu)->padding = 0;
+ }
+ else {
+ ((DCI6_2_paging_10MHz_t *)dci_pdu)->type = 1;
+ ((DCI6_2_paging_10MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
+ ((DCI6_2_paging_10MHz_t *)dci_pdu)->mcs = rel13->mcs;
+ ((DCI6_2_paging_10MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
+ ((DCI6_2_paging_10MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
+ ((DCI6_2_paging_10MHz_t *)dci_pdu)->padding = 0;
+ }
+
+ break;
+ case 100:
+ dci_alloc->dci_length = sizeof_DCI6_2_20MHz_t;
+ if (rel13->paging_direct_indication_differentiation_flag==0) {
+ ((DCI6_2_di_20MHz_t *)dci_pdu)->type = 0;
+ ((DCI6_2_di_20MHz_t *)dci_pdu)->di_info = rel13->direct_indication;
+ ((DCI6_2_di_20MHz_t *)dci_pdu)->padding = 0;
+ }
+ else {
+ ((DCI6_2_paging_20MHz_t *)dci_pdu)->type = 1;
+ ((DCI6_2_paging_20MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
+ ((DCI6_2_paging_20MHz_t *)dci_pdu)->mcs = rel13->mcs;
+ ((DCI6_2_paging_20MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
+ ((DCI6_2_paging_20MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
+ ((DCI6_2_paging_20MHz_t *)dci_pdu)->padding = 0;
+ }
+
+ break;
+ }
+ }
+ AssertFatal(rel13->harq_process<8,
+ "ERROR: Format 6_1A: harq_pid=%d >= 8\n", rel13->harq_process);
+
+ dlsch0_harq = dlsch0->harq_processes[rel13->harq_process];
+ dlsch0_harq->codeword=0;
+
+ // printf("DCI: Setting subframe_tx for subframe %d\n",subframe);
+ dlsch0->subframe_tx[subframe] = 1;
+
+ conv_eMTC_rballoc(rel13->resource_block_coding,
+ fp->N_RB_DL,
+ dlsch0_harq->rb_alloc);
+
+ dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rel13->resource_block_coding&31]; // this is the 6PRB RIV
+
+
+ dlsch0_harq->rvidx = rel13->redundancy_version;
+
+ dlsch0_harq->Nl = 1;
+ // dlsch[0]->layer_index = 0;
+ // if (beamforming_mode == 0)
+ dlsch0_harq->mimo_mode = (fp->nb_antenna_ports_eNB == 1) ? SISO : ALAMOUTI;
+ //else if (beamforming_mode == 7)
+ // dlsch0_harq->mimo_mode = TM7;
+ //else
+ //LOG_E(PHY,"Invalid beamforming mode %dL\n", beamforming_mode);
+
+ dlsch0_harq->dl_power_off = 1;
+
+ dlsch0->active = 1;
+ dlsch0->harq_mask |= (1<<rel13->harq_process);
+
+
+ if (dlsch0_harq->round == 0) {
+ dlsch0_harq->status = ACTIVE;
+ // printf("Setting DLSCH process %d to ACTIVE\n",rel8->harq_process);
+ // MCS and TBS don't change across HARQ rounds
+ dlsch0_harq->mcs = rel13->mcs;
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
+
+ }
+
+ dlsch0->harq_ids[subframe] = rel13->harq_process;
+
+
+
+ dlsch0->rnti = rel13->rnti;
+
+
+
+
+
+
+
+}
+
+void fill_dci0(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t *proc,
+ DCI_ALLOC_t *dci_alloc,nfapi_hi_dci0_dci_pdu *pdu)
+{
+ LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
+
+ uint32_t cqi_req = pdu->dci_pdu_rel8.cqi_csi_request;
+ uint32_t dai = pdu->dci_pdu_rel8.dl_assignment_index;
+ uint32_t cshift = pdu->dci_pdu_rel8.cyclic_shift_2_for_drms;
+ uint32_t TPC = pdu->dci_pdu_rel8.tpc;
+ uint32_t mcs = pdu->dci_pdu_rel8.mcs_1;
+ uint32_t hopping = pdu->dci_pdu_rel8.frequency_hopping_enabled_flag;
+ uint32_t rballoc = computeRIV(frame_parms->N_RB_DL,
+ pdu->dci_pdu_rel8.resource_block_start,
+ pdu->dci_pdu_rel8.number_of_resource_block);
+
+ uint32_t ndi = pdu->dci_pdu_rel8.new_data_indication_1;
+
+#ifdef T_TRACER
+ T(T_ENB_PHY_ULSCH_UE_DCI, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe),
+ T_INT(pdu->dci_pdu_rel8.rnti), T_INT(((frame*10+subframe+4) % 8) /* TODO: correct harq pid */),
+ T_INT(mcs), T_INT(-1 /* TODO: remove round? */),
+ T_INT(pdu->dci_pdu_rel8.resource_block_start),
+ T_INT(pdu->dci_pdu_rel8.number_of_resource_block),
+ T_INT(get_TBS_UL(mcs, pdu->dci_pdu_rel8.number_of_resource_block) * 8),
+ T_INT(pdu->dci_pdu_rel8.aggregation_level),
+ T_INT(pdu->dci_pdu_rel8.cce_index));
+#endif
+
+ void *dci_pdu = (void*)dci_alloc->dci_pdu;
+
+ LOG_D(PHY,"SFN/SF:%04d%d DCI0[rnti %x cqi %d mcs %d hopping %d rballoc %x (%d,%d) ndi %d TPC %d cshift %d]\n",
+ frame,subframe,
+ pdu->dci_pdu_rel8.rnti,cqi_req, mcs,hopping,rballoc,
+ pdu->dci_pdu_rel8.resource_block_start,
+ pdu->dci_pdu_rel8.number_of_resource_block, ndi,TPC,cshift);
+
+ dci_alloc->format = format0;
+ dci_alloc->firstCCE = pdu->dci_pdu_rel8.cce_index;
+ dci_alloc->L = pdu->dci_pdu_rel8.aggregation_level;
+ dci_alloc->rnti = pdu->dci_pdu_rel8.rnti;
+ dci_alloc->ra_flag = 0;
+
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ if (frame_parms->frame_type == TDD) {
+ ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cqi_req = cqi_req;
+ ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->dai = dai;
+ ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cshift = cshift;
+ ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC = TPC;
+ ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs = mcs;
+ ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi = ndi;
+ ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rballoc;
+ ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->hopping = hopping;
+ ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->type = 0;
+ ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->padding = 0;
+ dci_alloc->dci_length = sizeof_DCI0_1_5MHz_TDD_1_6_t;
+ } else {
+ ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cqi_req = cqi_req;
+ ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cshift = cshift;
+ ((DCI0_1_5MHz_FDD_t *)dci_pdu)->TPC = TPC;
+ ((DCI0_1_5MHz_FDD_t *)dci_pdu)->mcs = mcs;
+ ((DCI0_1_5MHz_FDD_t *)dci_pdu)->ndi = ndi;
+ ((DCI0_1_5MHz_FDD_t *)dci_pdu)->rballoc = rballoc;
+ ((DCI0_1_5MHz_FDD_t *)dci_pdu)->hopping = hopping;
+ ((DCI0_1_5MHz_FDD_t *)dci_pdu)->type = 0;
+ ((DCI0_1_5MHz_FDD_t *)dci_pdu)->padding = 0;
+ dci_alloc->dci_length = sizeof_DCI0_1_5MHz_FDD_t;
+ }
+
+ break;
+
+ case 25:
+ if (frame_parms->frame_type == TDD) {
+ ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cqi_req = cqi_req;
+ ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->dai = dai;
+ ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift = cshift;
+ ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->TPC = TPC;
+ ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->mcs = mcs;
+ ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->ndi = ndi;
+ ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rballoc;
+ ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->hopping = hopping;
+ ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->type = 0;
+ ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->padding = 0;
+ dci_alloc->dci_length = sizeof_DCI0_5MHz_TDD_1_6_t;
+ } else {
+ ((DCI0_5MHz_FDD_t *)dci_pdu)->cqi_req = cqi_req;
+ ((DCI0_5MHz_FDD_t *)dci_pdu)->cshift = cshift;
+ ((DCI0_5MHz_FDD_t *)dci_pdu)->TPC = TPC;
+ ((DCI0_5MHz_FDD_t *)dci_pdu)->mcs = mcs;
+ ((DCI0_5MHz_FDD_t *)dci_pdu)->ndi = ndi;
+ ((DCI0_5MHz_FDD_t *)dci_pdu)->rballoc = rballoc;
+ ((DCI0_5MHz_FDD_t *)dci_pdu)->hopping = hopping;
+ ((DCI0_5MHz_FDD_t *)dci_pdu)->type = 0;
+ ((DCI0_5MHz_FDD_t *)dci_pdu)->padding = 0;
+ dci_alloc->dci_length = sizeof_DCI0_5MHz_FDD_t;
+ }
+
+ break;
+
+ case 50:
+ if (frame_parms->frame_type == TDD) {
+ ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cqi_req = cqi_req;
+ ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->dai = dai;
+ ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cshift = cshift;
+ ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->TPC = TPC;
+ ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->mcs = mcs;
+ ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->ndi = ndi;
+ ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->rballoc = rballoc;
+ ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->hopping = hopping;
+ ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->type = 0;
+ ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->padding = 0;
+ dci_alloc->dci_length = sizeof_DCI0_10MHz_TDD_1_6_t;
+ } else {
+ ((DCI0_10MHz_FDD_t *)dci_pdu)->cqi_req = cqi_req;
+ ((DCI0_10MHz_FDD_t *)dci_pdu)->cshift = cshift;
+ ((DCI0_10MHz_FDD_t *)dci_pdu)->TPC = TPC;
+ ((DCI0_10MHz_FDD_t *)dci_pdu)->mcs = mcs;
+ ((DCI0_10MHz_FDD_t *)dci_pdu)->ndi = ndi;
+ ((DCI0_10MHz_FDD_t *)dci_pdu)->rballoc = rballoc;
+ ((DCI0_10MHz_FDD_t *)dci_pdu)->hopping = hopping;
+ ((DCI0_10MHz_FDD_t *)dci_pdu)->type = 0;
+ ((DCI0_10MHz_FDD_t *)dci_pdu)->padding = 0;
+ dci_alloc->dci_length = sizeof_DCI0_10MHz_FDD_t;
+ }
+
+ break;
+
+ case 100:
+ if (frame_parms->frame_type == TDD) {
+ ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cqi_req = cqi_req;
+ ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->dai = dai;
+ ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cshift = cshift;
+ ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->TPC = TPC;
+ ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->mcs = mcs;
+ ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->ndi = ndi;
+ ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->rballoc = rballoc;
+ ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->hopping = hopping;
+ ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->type = 0;
+ ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->padding = 0;
+
+ dci_alloc->dci_length = sizeof_DCI0_20MHz_TDD_1_6_t;
+ } else {
+ ((DCI0_20MHz_FDD_t *)dci_pdu)->cqi_req = cqi_req;
+ ((DCI0_20MHz_FDD_t *)dci_pdu)->cshift = cshift;
+ ((DCI0_20MHz_FDD_t *)dci_pdu)->TPC = TPC;
+ ((DCI0_20MHz_FDD_t *)dci_pdu)->mcs = mcs;
+ ((DCI0_20MHz_FDD_t *)dci_pdu)->ndi = ndi;
+ ((DCI0_20MHz_FDD_t *)dci_pdu)->rballoc = rballoc;
+ ((DCI0_20MHz_FDD_t *)dci_pdu)->hopping = hopping;
+ ((DCI0_20MHz_FDD_t *)dci_pdu)->type = 0;
+ ((DCI0_20MHz_FDD_t *)dci_pdu)->padding = 0;
+ dci_alloc->dci_length = sizeof_DCI0_20MHz_FDD_t;
+ }
+
+ //printf("eNB: rb_alloc (20 MHz dci) %d\n",rballoc);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+}
+
+void fill_ulsch(PHY_VARS_eNB *eNB,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame,int subframe)
+{
+ uint8_t harq_pid;
+ uint8_t UE_id;
+ boolean_t new_ulsch = (find_ulsch(ulsch_pdu->ulsch_pdu_rel8.rnti,eNB,SEARCH_EXIST)==-1) ? TRUE : FALSE;
+
+ AssertFatal((UE_id=find_ulsch(ulsch_pdu->ulsch_pdu_rel8.rnti,eNB,SEARCH_EXIST_OR_FREE))>=0,
+ "No existing/free UE ULSCH for rnti %x\n",ulsch_pdu->ulsch_pdu_rel8.rnti);
+
+ LTE_eNB_ULSCH_t *ulsch=eNB->ulsch[UE_id];
+ LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
+
+ int use_srs = 0;
+
+ harq_pid = ulsch_pdu->ulsch_pdu_rel8.harq_process_number;
+
+ ulsch->harq_mask |= 1 << harq_pid;
+
+ ulsch->harq_processes[harq_pid]->frame = frame;
+ ulsch->harq_processes[harq_pid]->subframe = subframe;
+ ulsch->harq_processes[harq_pid]->handled = 0;
+
+ ulsch->harq_processes[harq_pid]->first_rb = ulsch_pdu->ulsch_pdu_rel8.resource_block_start;
+ ulsch->harq_processes[harq_pid]->nb_rb = ulsch_pdu->ulsch_pdu_rel8.number_of_resource_blocks;
+
+ AssertFatal(ulsch->harq_processes[harq_pid]->nb_rb>0,"nb_rb = 0\n");
+
+ ulsch->harq_processes[harq_pid]->dci_alloc = 1;
+ ulsch->harq_processes[harq_pid]->rar_alloc = 0;
+ ulsch->harq_processes[harq_pid]->n_DMRS = ulsch_pdu->ulsch_pdu_rel8.cyclic_shift_2_for_drms;
+
+ ulsch->harq_processes[harq_pid]->Nsymb_pusch = 12-(frame_parms->Ncp<<1)-(use_srs==0?0:1);
+ ulsch->harq_processes[harq_pid]->srs_active = use_srs;
+
+ //Mapping of cyclic shift field in DCI format0 to n_DMRS2 (3GPP 36.211, Table 5.5.2.1.1-1)
+ if(ulsch->harq_processes[harq_pid]->n_DMRS == 0)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 0;
+ else if(ulsch->harq_processes[harq_pid]->n_DMRS == 1)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 6;
+ else if(ulsch->harq_processes[harq_pid]->n_DMRS == 2)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 3;
+ else if(ulsch->harq_processes[harq_pid]->n_DMRS == 3)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 4;
+ else if(ulsch->harq_processes[harq_pid]->n_DMRS == 4)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 2;
+ else if(ulsch->harq_processes[harq_pid]->n_DMRS == 5)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 8;
+ else if(ulsch->harq_processes[harq_pid]->n_DMRS == 6)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 10;
+ else if(ulsch->harq_processes[harq_pid]->n_DMRS == 7)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 9;
+
+ LOG_D(PHY,"[eNB %d][PUSCH %d] Frame %d, Subframe %d Programming PUSCH with n_DMRS2 %d (cshift %d) ulsch:ndi:%d ulsch_pdu:ndi:%d new_ulsch:%d status:%d ulsch_pdu:rvidx:%d\n",
+ eNB->Mod_id,harq_pid,frame,subframe,
+ ulsch->harq_processes[harq_pid]->n_DMRS2,
+ ulsch->harq_processes[harq_pid]->n_DMRS,
+ ulsch->harq_processes[harq_pid]->ndi, ulsch_pdu->ulsch_pdu_rel8.new_data_indication, new_ulsch, ulsch->harq_processes[harq_pid]->status,
+ ulsch_pdu->ulsch_pdu_rel8.redundancy_version);
+
+ ulsch->harq_processes[harq_pid]->rvidx = ulsch_pdu->ulsch_pdu_rel8.redundancy_version;
+ ulsch->harq_processes[harq_pid]->Qm = ulsch_pdu->ulsch_pdu_rel8.modulation_type;
+ // Set O_ACK to 0 by default, will be set of DLSCH is scheduled and needs to be
+ ulsch->harq_processes[harq_pid]->O_ACK = 0;
+
+ if ((ulsch->harq_processes[harq_pid]->status == SCH_IDLE) ||
+ (ulsch->harq_processes[harq_pid]->ndi != ulsch_pdu->ulsch_pdu_rel8.new_data_indication) ||
+ (new_ulsch == TRUE)){
+ ulsch->harq_processes[harq_pid]->status = ACTIVE;
+
+ ulsch->harq_processes[harq_pid]->TBS = ulsch_pdu->ulsch_pdu_rel8.size<<3;
+
+ ulsch->harq_processes[harq_pid]->Msc_initial = 12*ulsch_pdu->ulsch_pdu_rel8.number_of_resource_blocks;
+ ulsch->harq_processes[harq_pid]->Nsymb_initial = ulsch->harq_processes[harq_pid]->Nsymb_pusch;
+ ulsch->harq_processes[harq_pid]->round = 0;
+ ulsch->harq_processes[harq_pid]->ndi = ulsch_pdu->ulsch_pdu_rel8.new_data_indication;
+ // note here, the CQI bits need to be kept constant as in initial transmission
+ // set to 0 in initial transmission, and don't touch them during retransmissions
+ // will be set if MAC has activated ULSCH_CQI_RI_PDU or ULSCH_CQI_HARQ_RI_PDU
+ ulsch->harq_processes[harq_pid]->Or1 = 0;
+ ulsch->harq_processes[harq_pid]->Or2 = 0;
+ }
+ else ulsch->harq_processes[harq_pid]->round++;
+
+ ulsch->rnti = ulsch_pdu->ulsch_pdu_rel8.rnti;
+ LOG_D(PHY,"Filling ULSCH %x (UE_id %d) (new_ulsch %d) for Frame %d, Subframe %d : harq_pid %d, status %d, handled %d, first_rb %d, nb_rb %d, rvidx %d, Qm %d, TBS %d, round %d \n",
+ ulsch->rnti,
+ UE_id,
+ new_ulsch,
+ frame,
+ subframe,
+ harq_pid,
+ ulsch->harq_processes[harq_pid]->status,
+ ulsch->harq_processes[harq_pid]->handled,
+ ulsch->harq_processes[harq_pid]->first_rb,
+ ulsch->harq_processes[harq_pid]->nb_rb,
+ ulsch->harq_processes[harq_pid]->rvidx,
+ ulsch->harq_processes[harq_pid]->Qm,
+ ulsch->harq_processes[harq_pid]->TBS,
+ ulsch->harq_processes[harq_pid]->round);
+}
+
+int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci)
+{
+ switch (dci->format) {
+
+ case format0: // This is an UL SCH allocation so nothing here, inform MAC
+ if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config>0))
+ switch(frame_parms->N_RB_DL) {
+ case 6:
+ LOG_D(PHY,"DCI format0 (TDD, 1.5MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, dai %d, cqi_req %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu[0])[0],
+ ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->hopping,
+ ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cshift,
+ ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai,
+ ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cqi_req);
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format0 (TDD1-6, 5MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, dai %d, cqi_req %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu[0])[0],
+ ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->hopping,
+ ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cshift,
+ ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai,
+ ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cqi_req);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format0 (TDD1-6, 10MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, dai %d, cqi_req %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu[0])[0],
+ ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->hopping,
+ ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cshift,
+ ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai,
+ ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cqi_req);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format0 (TDD1-6, 20MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, dai %d, cqi_req %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu[0])[0],
+ ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->hopping,
+ ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cshift,
+ ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai,
+ ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cqi_req);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+ else if (frame_parms->frame_type == FDD)
+ switch(frame_parms->N_RB_DL) {
+ case 6:
+ LOG_D(PHY,"DCI format0 (FDD, 1.5MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, cqi_req %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu[0])[0],
+ ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->hopping,
+ ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->cshift,
+ ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->cqi_req);
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format0 (FDD, 5MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, cqi_req %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu[0])[0],
+ ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->hopping,
+ ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->cshift,
+ ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->cqi_req);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format0 (FDD, 10MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, cqi_req %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu[0])[0],
+ ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->hopping,
+ ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->cshift,
+ ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->cqi_req);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format0 (FDD, 20MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, cqi_req %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu[0])[0],
+ ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->hopping,
+ ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->cshift,
+ ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->cqi_req);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+ else
+ LOG_E(PHY,"Don't know how to handle TDD format 0 yet\n");
+
+ break;
+
+ case format1:
+ if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config>0))
+
+ switch(frame_parms->N_RB_DL) {
+ case 6:
+ LOG_D(PHY,"DCI format1 (TDD 1.5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d, dai %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->rv,
+ ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->dai);
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format1 (TDD 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d, dai %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->rv,
+ ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->dai);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format1 (TDD 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d, dai %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->rv,
+ ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->dai);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format1 (TDD 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d, dai %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->rv,
+ ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->dai);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+ else if (frame_parms->frame_type == FDD) {
+ switch(frame_parms->N_RB_DL) {
+ case 6:
+ LOG_D(PHY,"DCI format1 (FDD, 1.5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rv,
+ ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format1 (FDD, 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->rv,
+ ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format1 (FDD, 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->rv,
+ ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format1 (FDD, 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->rv,
+ ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+ }
+
+ else
+ LOG_E(PHY,"Don't know how to handle TDD format 0 yet\n");
+
+ break;
+
+ case format1A: // This is DLSCH allocation for control traffic
+ if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config>0)) {
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ LOG_D(PHY,"DCI format1A (TDD1-6, 1_5MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]);
+ LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->vrb_type);
+ LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT25[((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc]);
+ LOG_D(PHY,"MCS %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs);
+ LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->harq_pid);
+ LOG_D(PHY,"NDI %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi);
+ LOG_D(PHY,"RV %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rv);
+ LOG_D(PHY,"TPC %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC);
+ LOG_D(PHY,"DAI %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai);
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format1A (TDD1-6, 5MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]);
+ LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->vrb_type);
+ LOG_D(PHY,"RB_ALLOC %d (NB_RB %d)\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT25[((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc]);
+ LOG_D(PHY,"MCS %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs);
+ LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->harq_pid);
+ LOG_D(PHY,"NDI %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi);
+ LOG_D(PHY,"RV %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rv);
+ LOG_D(PHY,"TPC %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC);
+ LOG_D(PHY,"DAI %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format1A (TDD1-6, 10MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]);
+ LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->vrb_type);
+ LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT50[((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc]);
+ LOG_D(PHY,"MCS %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs);
+ LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->harq_pid);
+ LOG_D(PHY,"NDI %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi);
+ LOG_D(PHY,"RV %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rv);
+ LOG_D(PHY,"TPC %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC);
+ LOG_D(PHY,"DAI %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format1A (TDD1-6, 20MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]);
+ LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->vrb_type);
+ LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT100[((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc]);
+ LOG_D(PHY,"MCS %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs);
+ LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->harq_pid);
+ LOG_D(PHY,"NDI %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi);
+ LOG_D(PHY,"RV %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rv);
+ LOG_D(PHY,"TPC %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC);
+ LOG_D(PHY,"DAI %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+
+ } else if (frame_parms->frame_type == FDD) {
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ LOG_D(PHY,"DCI format1A(FDD, 1.5MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]);
+ LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->vrb_type);
+ LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT25[((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc]);
+ LOG_D(PHY,"MCS %d\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->mcs);
+ LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid);
+ LOG_D(PHY,"NDI %d\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->ndi);
+ LOG_D(PHY,"RV %d\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rv);
+ LOG_D(PHY,"TPC %d\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format1A(FDD, 5MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]);
+ LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->vrb_type);
+ LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT25[((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc]);
+ LOG_D(PHY,"MCS %d\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->mcs);
+ LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid);
+ LOG_D(PHY,"NDI %d\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->ndi);
+ LOG_D(PHY,"RV %d\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->rv);
+ LOG_D(PHY,"TPC %d\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format1A(FDD, 10MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]);
+ LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->vrb_type);
+ LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT50[((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->rballoc]);
+ LOG_D(PHY,"MCS %d\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->mcs);
+ LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid);
+ LOG_D(PHY,"NDI %d\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->ndi);
+ LOG_D(PHY,"RV %d\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->rv);
+ LOG_D(PHY,"TPC %d\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format1A(FDD, 20MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]);
+ LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->vrb_type);
+ LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT100[((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->rballoc]);
+ LOG_D(PHY,"MCS %d\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->mcs);
+ LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid);
+ LOG_D(PHY,"NDI %d\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->ndi);
+ LOG_D(PHY,"RV %d\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->rv);
+ LOG_D(PHY,"TPC %d\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+ }
+
+ break;
+
+ case format1C: // This is DLSCH allocation for control traffic
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ LOG_D(PHY,"DCI format1C (1.5MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]);
+ LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",
+ ((DCI1C_1_5MHz_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT6[conv_1C_RIV(((DCI1C_1_5MHz_t *)&dci->dci_pdu[0])->rballoc,6)]);
+ LOG_D(PHY,"MCS %d\n",((DCI1C_1_5MHz_t *)&dci->dci_pdu[0])->mcs);
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format1C (5MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]);
+ LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1C_5MHz_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT25[conv_1C_RIV(((DCI1C_5MHz_t *)&dci->dci_pdu[0])->rballoc,25)]);
+ LOG_D(PHY,"MCS %d\n",((DCI1C_5MHz_t *)&dci->dci_pdu[0])->mcs);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format1C (10MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]);
+ LOG_D(PHY,"Ngap %d\n",((DCI1C_10MHz_t *)&dci->dci_pdu[0])->Ngap);
+ LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1C_10MHz_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT50[conv_1C_RIV(((DCI1C_10MHz_t *)&dci->dci_pdu[0])->rballoc,50)]);
+ LOG_D(PHY,"MCS %d\n",((DCI1C_10MHz_t *)&dci->dci_pdu[0])->mcs);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format1C (20MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]);
+ LOG_D(PHY,"Ngap %d\n",((DCI1C_20MHz_t *)&dci->dci_pdu[0])->Ngap);
+ LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1C_20MHz_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT50[conv_1C_RIV(((DCI1C_20MHz_t *)&dci->dci_pdu[0])->rballoc,100)]);
+ LOG_D(PHY,"MCS %d\n",((DCI1C_20MHz_t *)&dci->dci_pdu[0])->mcs);
+ break;
+
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+
+
+ break;
+
+ case format2:
+
+ if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config>0)) {
+ if (frame_parms->nb_antenna_ports_eNB == 2) {
+ switch(frame_parms->N_RB_DL) {
+ case 6:
+ LOG_D(PHY,"DCI format2 2 antennas (TDD 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tbswap %d, tpmi %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->tpmi
+ );
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format2 2 antennas (TDD 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->tpmi);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format2 2 antennas (TDD 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->tpmi);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format2 2 antennas (TDD 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->tpmi);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+ } else if (frame_parms->nb_antenna_ports_eNB == 4) {
+ switch(frame_parms->N_RB_DL) {
+ case 6:
+ LOG_D(PHY,"DCI format2 2 antennas (TDD 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tbswap %d, tpmi %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi
+ );
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format2 2 antennas (TDD 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format2 2 antennas (TDD 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format2 2 antennas (TDD 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+ }
+ } else if (frame_parms->frame_type == FDD) {
+ if (frame_parms->nb_antenna_ports_eNB == 2) {
+ switch(frame_parms->N_RB_DL) {
+ case 6:
+ LOG_D(PHY,"DCI format2 2 antennas (FDD, 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->tpmi,
+ ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 25:
+
+ LOG_D(PHY,"DCI format2 2 antennas (FDD, 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, swap %d, TPMI %d, TPC %d\n",
+
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->tpmi,
+ ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format2 2 antennas (FDD, 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->tpmi,
+ ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format2 2 antennas (FDD, 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->tpmi,
+ ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+ } else if (frame_parms->nb_antenna_ports_eNB == 4) {
+ switch(frame_parms->N_RB_DL) {
+
+ case 6:
+ LOG_D(PHY,"DCI format2 4 antennas (FDD, 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi,
+ ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format2 4 antennas (FDD, 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi,
+ ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format2 4 antennas (FDD, 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi,
+ ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format2 4 antennas (FDD, 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi,
+ ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+ }
+ }
+
+ else
+ LOG_E(PHY,"Don't know how to handle TDD format 0 yet\n");
+
+ break;
+
+ case format2A:
+
+ if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config>0)) {
+ if (frame_parms->nb_antenna_ports_eNB == 2) {
+ switch(frame_parms->N_RB_DL) {
+ case 6:
+ LOG_D(PHY,"DCI format2A 2 antennas (FDD 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap
+ );
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format2A 2 antennas (FDD 5 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format2A 2 antennas (FDD 10 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format2A 2 antennas (FDD 20 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+ } else if (frame_parms->nb_antenna_ports_eNB == 4) {
+ switch(frame_parms->N_RB_DL) {
+ case 6:
+ LOG_D(PHY,"DCI format2A 4 antennas (TDD 1.5 MHz), rnti %x (%"PRIu64"): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d, tpmi %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi
+ );
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format2A 4 antennas (TDD 5 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d, tpmi %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format2A 4 antennas (TDD 10 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d, tpmi %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format2A 4 antennas (TDD 20 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d, tpmi %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC,
+ ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai,
+ ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+ }
+ } else if (frame_parms->frame_type == FDD) {
+ if (frame_parms->nb_antenna_ports_eNB == 2) {
+ switch(frame_parms->N_RB_DL) {
+ case 6:
+ LOG_D(PHY,"DCI format2A 2 antennas (FDD, 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, TPC %d\n",
+ dci->rnti,
+ ((uint32_t*)&dci->dci_pdu)[0],
+ ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format2A 2 antennas (FDD, 5 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, TPC %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format2A 2 antennas (FDD, 10 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, TPC %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format2A 2 antennas (FDD, 20 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, TPC %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+ } else if (frame_parms->nb_antenna_ports_eNB == 4) {
+ switch(frame_parms->N_RB_DL) {
+
+ case 6:
+ LOG_D(PHY,"DCI format2A 4 antennas (FDD, 1.5 MHz), rnti %x (%"PRIu64"): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi,
+ ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 25:
+ LOG_D(PHY,"DCI format2A 4 antennas (FDD, 5 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi,
+ ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 50:
+ LOG_D(PHY,"DCI format2A 4 antennas (FDD, 5 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi,
+ ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ case 100:
+ LOG_D(PHY,"DCI format2A 4 antennas (FDD, 5 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n",
+ dci->rnti,
+ ((uint64_t*)&dci->dci_pdu)[0],
+ ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1,
+ ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2,
+ ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid,
+ ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1,
+ ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2,
+ ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1,
+ ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2,
+ ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi,
+ ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+ }
+ }
+
+ else
+ LOG_E(PHY,"Don't know how to handle TDD format 0 yet\n");
+
+ break;
+
+ case format1E_2A_M10PRB:
+
+ LOG_D(PHY,"DCI format1E_2A_M10PRB, rnti %x (%8x): harq_pid %d, rah %d, rb_alloc %x, mcs %d, rv %d, tpmi %d, ndi %d, dl_power_offset %d\n",
+ dci->rnti,
+ ((uint32_t *)&dci->dci_pdu)[0],
+ ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->harq_pid,
+ //((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->tb_swap,
+ ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->rah,
+ ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->rballoc,
+ ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->mcs,
+ ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->rv,
+ ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->tpmi,
+ ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->ndi,
+ ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->dl_power_off
+ );
+
+ break;
+
+ default:
+ LOG_E(PHY,"dci_tools.c: dump_dci, unknown format %d\n",dci->format);
+ return(-1);
+ }
+
+ return(0);
+}
+
+void extract_dci1A_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted)
+{
+ uint8_t harq_pid=0;
+ uint32_t rballoc=0;
+ uint8_t vrb_type=0;
+ uint8_t mcs=0;
+ uint8_t rv=0;
+ uint8_t ndi=0;
+ uint8_t TPC=0;
+
+ uint8_t dai=0;
+
+ switch (N_RB_DL) {
+ case 6:
+ if (frame_type == TDD) {
+ vrb_type = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
+ dai = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->dai;
+ // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ } else {
+ vrb_type = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->harq_pid;
+ //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ }
+ break;
+
+ case 25:
+
+ if (frame_type == TDD) {
+ vrb_type = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
+ dai = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->dai;
+ //printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ } else {
+ vrb_type = ((DCI1A_5MHz_FDD_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_5MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_5MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_5MHz_FDD_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_5MHz_FDD_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_5MHz_FDD_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_5MHz_FDD_t *)dci_pdu)->harq_pid;
+ //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ }
+
+ break;
+
+ case 50:
+ if (frame_type == TDD) {
+ vrb_type = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
+ dai = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->dai;
+ // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ } else {
+ vrb_type = ((DCI1A_10MHz_FDD_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_10MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_10MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_10MHz_FDD_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_10MHz_FDD_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_10MHz_FDD_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_10MHz_FDD_t *)dci_pdu)->harq_pid;
+ //printf("FDD 1A: mcs %d, vrb_type %d, rballoc %x,ndi %d, rv %d, TPC %d\n",mcs,vrb_type,rballoc,ndi,rv,TPC);
+ }
+ break;
+
+ case 100:
+ if (frame_type == TDD) {
+ vrb_type = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
+ dai = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->dai;
+ // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ } else {
+ vrb_type = ((DCI1A_20MHz_FDD_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_20MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_20MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_20MHz_FDD_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_20MHz_FDD_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_20MHz_FDD_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_20MHz_FDD_t *)dci_pdu)->harq_pid;
+ //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ }
+ break;
+ }
+
+ pdci_info_extarcted->vrb_type = vrb_type;
+ pdci_info_extarcted->mcs1 = mcs;
+ pdci_info_extarcted->rballoc = rballoc;
+ pdci_info_extarcted->rv1 = rv;
+ pdci_info_extarcted->ndi1 = ndi;
+ pdci_info_extarcted->TPC = TPC;
+ pdci_info_extarcted->harq_pid = harq_pid;
+ pdci_info_extarcted->dai = dai;
+}
+
+void extract_dci1C_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted)
+{
+
+ uint32_t rballoc=0;
+ uint8_t mcs=0;
+
+ switch (N_RB_DL) {
+ case 6:
+ mcs = ((DCI1C_5MHz_t *)dci_pdu)->mcs;
+ rballoc = conv_1C_RIV(((DCI1C_5MHz_t *)dci_pdu)->rballoc,6);
+
+ break;
+
+ case 25:
+ mcs = ((DCI1C_5MHz_t *)dci_pdu)->mcs;
+ rballoc = conv_1C_RIV(((DCI1C_5MHz_t *)dci_pdu)->rballoc,6);
+
+ break;
+
+ case 50:
+ mcs = ((DCI1C_10MHz_t *)dci_pdu)->mcs;
+ rballoc = conv_1C_RIV(((DCI1C_10MHz_t *)dci_pdu)->rballoc,6);
+
+ break;
+
+ case 100:
+ mcs = ((DCI1C_20MHz_t *)dci_pdu)->mcs;
+ rballoc = conv_1C_RIV(((DCI1C_20MHz_t *)dci_pdu)->rballoc,6);
+ break;
+
+ default:
+ AssertFatal(0,"Format 1C: Unknown N_RB_DL %d\n",N_RB_DL);
+ break;
+ }
+
+ pdci_info_extarcted->mcs1 = mcs;
+ pdci_info_extarcted->rballoc = rballoc;
+}
+
+void extract_dci1_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted)
+{
+
+ uint32_t rballoc=0;
+ uint8_t mcs=0;
+ uint8_t rah=0;
+ uint8_t rv=0;
+ uint8_t TPC=0;
+ uint8_t ndi=0;
+ uint8_t harq_pid=0;
+
+ switch (N_RB_DL) {
+ case 6:
+ if (frame_type == TDD) {
+ mcs = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rah;
+ rv = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->harq_pid;
+ } else {
+ mcs = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->mcs;
+ rah = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rah;
+ rballoc = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->harq_pid;
+ }
+
+ break;
+
+ case 25:
+ if (frame_type == TDD) {
+ mcs = ((DCI1_5MHz_TDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1_5MHz_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI1_5MHz_TDD_t *)dci_pdu)->rah;
+ rv = ((DCI1_5MHz_TDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_5MHz_TDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_5MHz_TDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_5MHz_TDD_t *)dci_pdu)->harq_pid;
+ } else {
+ mcs = ((DCI1_5MHz_FDD_t *)dci_pdu)->mcs;
+ rah = ((DCI1_5MHz_FDD_t *)dci_pdu)->rah;
+ rballoc = ((DCI1_5MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1_5MHz_FDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_5MHz_FDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_5MHz_FDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_5MHz_FDD_t *)dci_pdu)->harq_pid;
+ }
+
+ break;
+
+ case 50:
+ if (frame_type == TDD) {
+ mcs = ((DCI1_10MHz_TDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1_10MHz_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI1_10MHz_TDD_t *)dci_pdu)->rah;
+ rv = ((DCI1_10MHz_TDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_10MHz_TDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_10MHz_TDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_10MHz_TDD_t *)dci_pdu)->harq_pid;
+ } else {
+ mcs = ((DCI1_10MHz_FDD_t *)dci_pdu)->mcs;
+ rah = ((DCI1_10MHz_FDD_t *)dci_pdu)->rah;
+ rballoc = ((DCI1_10MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1_10MHz_FDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_10MHz_FDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_10MHz_FDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_10MHz_FDD_t *)dci_pdu)->harq_pid;
+ }
+
+ break;
+
+ case 100:
+ if (frame_type == TDD) {
+ mcs = ((DCI1_20MHz_TDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1_20MHz_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI1_20MHz_TDD_t *)dci_pdu)->rah;
+ rv = ((DCI1_20MHz_TDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_20MHz_TDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_20MHz_TDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_20MHz_TDD_t *)dci_pdu)->harq_pid;
+ } else {
+ mcs = ((DCI1_20MHz_FDD_t *)dci_pdu)->mcs;
+ rah = ((DCI1_20MHz_FDD_t *)dci_pdu)->rah;
+ rballoc = ((DCI1_20MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1_20MHz_FDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_20MHz_FDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_20MHz_FDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_20MHz_FDD_t *)dci_pdu)->harq_pid;
+ }
+
+ break;
+ }
+
+ pdci_info_extarcted->mcs1 = mcs;
+ pdci_info_extarcted->rah = rah;
+ pdci_info_extarcted->rballoc = rballoc;
+ pdci_info_extarcted->rv1 = rv;
+ pdci_info_extarcted->TPC = TPC;
+ pdci_info_extarcted->ndi1 = ndi;
+ pdci_info_extarcted->harq_pid = harq_pid;
+
+}
+
+void extract_dci2_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, uint8_t nb_antenna_ports_eNB, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted)
+{
+
+ uint32_t rballoc=0;
+ uint8_t rah=0;
+ uint8_t mcs1=0;
+ uint8_t mcs2=0;
+ uint8_t rv1=0;
+ uint8_t rv2=0;
+ uint8_t ndi1=0;
+ uint8_t ndi2=0;
+ uint8_t tbswap=0;
+ uint8_t tpmi=0;
+ uint8_t harq_pid=0;
+ uint8_t TPC=0;
+
+ switch (N_RB_DL) {
+
+ case 6:
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else {
+ LOG_E(PHY,"UE: Format2 DCI: unsupported number of TX antennas %d\n",nb_antenna_ports_eNB);
+ }
+
+ break;
+
+ case 25:
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else {
+ LOG_E(PHY,"UE: Format2 DCI: unsupported number of TX antennas %d\n",nb_antenna_ports_eNB);
+ }
+
+ break;
+
+ case 50:
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else {
+ LOG_E(PHY,"UE: Format2A DCI: unsupported number of TX antennas %d\n",nb_antenna_ports_eNB);
+ }
+
+ break;
+
+ case 100:
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else {
+ LOG_E(PHY,"UE: Format2A DCI: unsupported number of TX antennas %d\n",nb_antenna_ports_eNB);
+ }
+
+ break;
+ }
+
+ pdci_info_extarcted->rah = rah;
+ pdci_info_extarcted->mcs1 = mcs1;
+ pdci_info_extarcted->mcs2 = mcs2;
+ pdci_info_extarcted->rv1 = rv1;
+ pdci_info_extarcted->rv2 = rv2;
+ pdci_info_extarcted->harq_pid = harq_pid;
+ pdci_info_extarcted->rballoc = rballoc;
+ pdci_info_extarcted->tb_swap = tbswap;
+ pdci_info_extarcted->tpmi = tpmi;
+ pdci_info_extarcted->TPC = TPC;
+ pdci_info_extarcted->ndi1 = ndi1;
+ pdci_info_extarcted->ndi2 = ndi2;
+
+}
+
+void extract_dci2A_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, uint8_t nb_antenna_ports_eNB, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted)
+{
+
+ uint32_t rballoc=0;
+ uint8_t rah=0;
+ uint8_t mcs1=0;
+ uint8_t mcs2=0;
+ uint8_t rv1=0;
+ uint8_t rv2=0;
+ uint8_t ndi1=0;
+ uint8_t ndi2=0;
+ uint8_t tbswap=0;
+ uint8_t tpmi=0;
+ uint8_t harq_pid=0;
+ uint8_t TPC=0;
+
+ AssertFatal( (nb_antenna_ports_eNB == 2) || (nb_antenna_ports_eNB == 4), "unsupported nb_antenna_ports_eNB %d\n", nb_antenna_ports_eNB);
+ switch (N_RB_DL) {
+
+ case 6:
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->TPC;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->TPC;
+ }
+ }
+
+ break;
+
+ case 25:
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->TPC;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->TPC;
+ }
+ }
+ break;
+
+ case 50:
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->TPC;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->TPC;
+ }
+ }
+
+ break;
+
+ case 100:
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->TPC;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->TPC;
+ }
+ }
+
+ break;
+ }
+
+ pdci_info_extarcted->mcs1 = mcs1;
+ pdci_info_extarcted->mcs2 = mcs2;
+ pdci_info_extarcted->rballoc = rballoc;
+ pdci_info_extarcted->rah = rah;
+ pdci_info_extarcted->rv1 = rv1;
+ pdci_info_extarcted->rv2 = rv2;
+ pdci_info_extarcted->ndi1 = ndi1;
+ pdci_info_extarcted->ndi2 = ndi2;
+ pdci_info_extarcted->harq_pid = harq_pid;
+ pdci_info_extarcted->tb_swap = tbswap;
+ pdci_info_extarcted->TPC = TPC;
+ pdci_info_extarcted->tpmi = tpmi;
+}
+
+int check_dci_format1_1a_coherency(DCI_format_t dci_format,
+ uint8_t N_RB_DL,
+ uint16_t rnti,
+ uint16_t tc_rnti,
+ uint16_t si_rnti,
+ uint16_t ra_rnti,
+ uint16_t p_rnti,
+ uint32_t frame,
+ uint8_t subframe,
+ DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
+ LTE_DL_UE_HARQ_t *pdlsch0_harq)
+{
+ uint8_t harq_pid = pdci_info_extarcted->harq_pid;
+ uint32_t rballoc = pdci_info_extarcted->rballoc;
+ uint8_t mcs1 = pdci_info_extarcted->mcs1;
+ uint8_t TPC = pdci_info_extarcted->TPC;
+ uint8_t rah = pdci_info_extarcted->rah;
+#ifdef DEBUG_DCI
+ uint8_t rv1 = pdci_info_extarcted->rv1;
+ uint8_t ndi1 = pdci_info_extarcted->ndi1;
+#endif
+
+ uint8_t NPRB = 0;
+ long long int RIV_max = 0;
+
+#ifdef DEBUG_DCI
+ LOG_I(PHY,"[DCI-FORMAT-1-1A] AbsSubframe %d.%d dci_format %d\n", frame, subframe, dci_format);
+ LOG_I(PHY,"[DCI-FORMAT-1-1A] rnti %x\n", rnti);
+ LOG_I(PHY,"[DCI-FORMAT-1-1A] harq_pid %d\n", harq_pid);
+ LOG_I(PHY,"[DCI-FORMAT-1-1A] rah %d\n", rah);
+ LOG_I(PHY,"[DCI-FORMAT-1-1A] rballoc %x\n", rballoc);
+ LOG_I(PHY,"[DCI-FORMAT-1-1A] mcs1 %d\n", mcs1);
+ LOG_I(PHY,"[DCI-FORMAT-1-1A] rv1 %d\n", rv1);
+ LOG_I(PHY,"[DCI-FORMAT-1-1A] ndi1 %d\n", ndi1);
+ LOG_I(PHY,"[DCI-FORMAT-1-1A] TPC %d\n", TPC);
+#endif
+
+
+ // I- check dci content minimum coherency
+ if( ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) && harq_pid > 0)
+ {
+ return(0);
+ }
+
+ if(harq_pid>=8)
+ {
+ // LOG_I(PHY,"bad harq id \n");
+ return(0);
+ }
+
+ if(dci_format == format1 && ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) )
+ {
+ // LOG_I(PHY,"bad dci format \n");
+ return(0);
+ }
+
+
+ if( mcs1 > 28)
+ {
+ if(pdlsch0_harq->round == 0)
+ {
+ // LOG_I(PHY,"bad dci mcs + round \n");
+ return(0);
+ }
+
+ if((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
+ {
+ // LOG_I(PHY,"bad dci mcs + rnti \n");
+ return(0);
+ }
+ }
+
+ if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
+ {
+ NPRB = (TPC&1) + 2;
+ switch (N_RB_DL) {
+ case 6:
+ RIV_max = RIV_max6;
+ break;
+ case 25:
+ RIV_max = RIV_max25;
+ break;
+ case 50:
+ RIV_max = RIV_max50;
+ break;
+ case 100:
+ RIV_max = RIV_max100;
+ break;
+ }
+ }
+ else
+ {
+ switch (N_RB_DL) {
+ case 6:
+ NPRB = RIV2nb_rb_LUT6[rballoc];//NPRB;
+ if(rah)
+ RIV_max = RIV_max6;
+ else
+ RIV_max = 0x3F;
+ break;
+ case 25:
+ NPRB = RIV2nb_rb_LUT25[rballoc];//NPRB;
+ if(rah)
+ RIV_max = RIV_max25;
+ else
+ RIV_max = 0x1FFF;
+ break;
+ case 50:
+ NPRB = RIV2nb_rb_LUT50[rballoc];//NPRB;
+ if(rah)
+ RIV_max = RIV_max50;
+ else
+ RIV_max = 0x1FFFF;
+ break;
+ case 100:
+ NPRB = RIV2nb_rb_LUT100[rballoc];//NPRB;
+ if(rah)
+ RIV_max = RIV_max100;
+ else
+ RIV_max = 0x1FFFFFF;
+ break;
+ }
+ }
+
+
+ if(dci_format == format1)
+ {
+ NPRB = conv_nprb(rah, rballoc, N_RB_DL);
+ }
+
+
+ if(rballoc > RIV_max)
+ {
+ // LOG_I(PHY,"bad dci rballoc rballoc %d RIV_max %lld \n",rballoc, RIV_max);
+ // DCI false detection
+ return(0);
+ }
+
+ if(NPRB == 0)
+ {
+ // DCI false detection
+ // LOG_I(PHY,"bad NPRB = 0 \n");
+ return(0);
+ }
+
+ // this a retransmission
+ if(pdlsch0_harq->round>0)
+ {
+ // compare old TBS to new TBS
+ if((mcs1<29) && (pdlsch0_harq->TBS != TBStable[get_I_TBS(mcs1)][NPRB-1]))
+ {
+ // this is an eNB issue
+ // retransmisison but old and new TBS are different !!!
+ // work around, consider it as a new transmission
+ LOG_E(PHY,"Format1A Retransmission but TBS are different: consider it as new transmission !!! \n");
+ pdlsch0_harq->round = 0;
+ //return(0); // ?? to cross check
+ }
+ }
+
+ return(1);
+}
+
+int check_dci_format1c_coherency(uint8_t N_RB_DL,
+ DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
+ uint16_t rnti,
+ uint16_t si_rnti,
+ uint16_t ra_rnti,
+ uint16_t p_rnti,
+ LTE_DL_UE_HARQ_t *pdlsch0_harq)
+{
+ uint32_t rballoc = pdci_info_extarcted->rballoc;
+
+ uint8_t NPRB = 0;
+ uint32_t RIV_max = 0;
+
+ // I- check dci content minimum coherency
+
+ if((rnti!=si_rnti) && (rnti!=p_rnti) && (rnti!=ra_rnti))
+ return(0);
+
+ switch (N_RB_DL) {
+ case 6:
+ NPRB = RIV2nb_rb_LUT6[rballoc];//NPRB;
+ RIV_max = RIV_max6;
+ break;
+ case 25:
+ NPRB = RIV2nb_rb_LUT25[rballoc];//NPRB;
+ RIV_max = RIV_max25;
+ break;
+ case 50:
+ NPRB = RIV2nb_rb_LUT50[rballoc];//NPRB;
+ RIV_max = RIV_max50;
+ break;
+ case 100:
+ NPRB = RIV2nb_rb_LUT100[rballoc];//NPRB;
+ RIV_max = RIV_max100;
+ break;
+ }
+
+ if(rballoc > RIV_max)
+ {
+ // DCI false detection
+ return(0);
+ }
+
+ if(NPRB == 0)
+ {
+ // DCI false detection
+ return(0);
+ }
+
+ return(1);
+}
+
+int check_dci_format2_2a_coherency(DCI_format_t dci_format,
+ uint8_t N_RB_DL,
+ DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
+ uint16_t rnti,
+ uint16_t si_rnti,
+ uint16_t ra_rnti,
+ uint16_t p_rnti,
+ LTE_DL_UE_HARQ_t *pdlsch0_harq,
+ LTE_DL_UE_HARQ_t *pdlsch1_harq)
+{
+ uint8_t rah = pdci_info_extarcted->rah;
+ uint8_t mcs1 = pdci_info_extarcted->mcs1;
+ uint8_t mcs2 = pdci_info_extarcted->mcs2;
+ uint8_t rv1 = pdci_info_extarcted->rv1;
+ uint8_t rv2 = pdci_info_extarcted->rv2;
+ uint8_t harq_pid = pdci_info_extarcted->harq_pid;
+ uint32_t rballoc = pdci_info_extarcted->rballoc;
+
+#ifdef DEBUG_DCI
+ uint8_t ndi1 = pdci_info_extarcted->ndi1;
+ uint8_t ndi2 = pdci_info_extarcted->ndi2;
+#endif
+
+ uint8_t NPRB = 0;
+ long long RIV_max = 0;
+
+#ifdef DEBUG_DCI
+ LOG_I(PHY, "extarcted dci - dci_format %d \n", dci_format);
+ LOG_I(PHY, "extarcted dci - rnti %d \n", rnti);
+ LOG_I(PHY, "extarcted dci - rah %d \n", rah);
+ LOG_I(PHY, "extarcted dci - mcs1 %d \n", mcs1);
+ LOG_I(PHY, "extarcted dci - mcs2 %d \n", mcs2);
+ LOG_I(PHY, "extarcted dci - rv1 %d \n", rv1);
+ LOG_I(PHY, "extarcted dci - rv2 %d \n", rv2);
+ //LOG_I(PHY, "extarcted dci - ndi1 %d \n", ndi1);
+ //LOG_I(PHY, "extarcted dci - ndi2 %d \n", ndi2);
+ LOG_I(PHY, "extarcted dci - rballoc %x \n", rballoc);
+ LOG_I(PHY, "extarcted dci - harq pid %d \n", harq_pid);
+ LOG_I(PHY, "extarcted dci - round0 %d \n", pdlsch0_harq->round);
+ LOG_I(PHY, "extarcted dci - round1 %d \n", pdlsch1_harq->round);
+#endif
+
+ // I- check dci content minimum coherency
+ if(harq_pid>=8)
+ {
+ // LOG_I(PHY,"bad harq pid\n");
+ return(0);
+ }
+
+ if( (rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti) )
+ {
+ // LOG_I(PHY,"bad rnti\n");
+ return(0);
+ }
+
+
+ if( mcs1 > 28)
+ {
+ if(pdlsch0_harq->round == 0)
+ {
+ // LOG_I(PHY,"bad mcs1\n");
+ return(0);
+ }
+ }
+
+ if( mcs2 > 28)
+ {
+ if(pdlsch1_harq->round == 0)
+ {
+ // LOG_I(PHY,"bad mcs2\n");
+ return(0);
+ }
+ }
+
+
+ if((pdlsch0_harq->round == 0) && (rv1 > 0) && (mcs1 != 0))
+ {
+ // DCI false detection
+ // LOG_I(PHY,"bad rv1\n");
+ return(0);
+ }
+
+ if((pdlsch1_harq->round == 0) && (rv2 > 0) && (mcs2 != 0))
+ {
+ // DCI false detection
+ // LOG_I(PHY,"bad rv2\n");
+ return(0);
+ }
+
+
+ switch (N_RB_DL) {
+ case 6:
+ if (rah == 0)
+ {
+ //RBG = 1;
+ RIV_max = 0x3F;
+ }
+ else
+ {
+ RIV_max = RIV_max6;
+ }
+ break;
+ case 25:
+ if (rah == 0)
+ {
+ //RBG = 2;
+ RIV_max = 0x1FFF;
+ }
+ else
+ {
+ RIV_max = RIV_max25;
+ }
+ break;
+ case 50:
+ if (rah == 0)
+ {
+ //RBG = 3;
+ RIV_max = 0x1FFFF;
+ }
+ else
+ {
+ RIV_max = RIV_max50;
+ }
+ break;
+ case 100:
+ if (rah == 0)
+ {
+ //RBG = 4;
+ RIV_max = 0x1FFFFFF;
+ }
+ else
+ {
+ RIV_max = RIV_max100;
+ }
+ break;
+ }
+
+ NPRB = conv_nprb(rah,
+ rballoc,
+ N_RB_DL);
+
+
+
+ if( (rballoc > RIV_max) && (rah == 1) )
+ {
+ // DCI false detection
+ // LOG_I(PHY,"bad rballoc %d RIV_max %lld\n", rballoc, RIV_max);
+ return(0);
+ }
+
+ if(NPRB == 0)
+ {
+ // DCI false detection
+ // LOG_I(PHY,"bad NPRB\n");
+ return(0);
+ }
+
+ return(1);
+}
+
+void compute_llr_offset(LTE_DL_FRAME_PARMS *frame_parms,
+ LTE_UE_PDCCH *pdcch_vars,
+ LTE_UE_PDSCH *pdsch_vars,
+ LTE_DL_UE_HARQ_t *dlsch0_harq,
+ uint8_t nb_rb_alloc,
+ uint8_t subframe)
+{
+ uint32_t pbch_pss_sss_re;
+ uint32_t crs_re;
+ uint32_t granted_re;
+ uint32_t data_re;
+ uint32_t llr_offset;
+ uint8_t symbol;
+ uint8_t symbol_mod;
+
+ pdsch_vars->llr_offset[pdcch_vars->num_pdcch_symbols] = 0;
+
+ LOG_I(PHY,"compute_llr_offset: nb RB %d - Qm %d \n", nb_rb_alloc, dlsch0_harq->Qm);
+
+ //dlsch0_harq->rb_alloc_even;
+ //dlsch0_harq->rb_alloc_odd;
+
+ for(symbol=pdcch_vars->num_pdcch_symbols; symbol<frame_parms->symbols_per_tti; symbol++)
+ {
+ symbol_mod = (symbol >= (7-frame_parms->Ncp))? (symbol-(7-frame_parms->Ncp)) : symbol;
+ if((symbol_mod == 0) || symbol_mod == (4-frame_parms->Ncp))
+ {
+ if (frame_parms->nb_antennas_tx == 2)
+ crs_re = 4;
+ else
+ crs_re = 2;
+ }
+ else
+ {
+ crs_re = 0;
+ }
+
+ granted_re = nb_rb_alloc * (12-crs_re);
+ pbch_pss_sss_re = adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol);
+ pbch_pss_sss_re = (double)pbch_pss_sss_re * ((double)(12-crs_re)/12);
+ data_re = granted_re - pbch_pss_sss_re;
+ llr_offset = data_re * dlsch0_harq->Qm * 2;
+
+ pdsch_vars->llr_length[symbol] = data_re;
+ if(symbol < (frame_parms->symbols_per_tti-1))
+ pdsch_vars->llr_offset[symbol+1] = pdsch_vars->llr_offset[symbol] + llr_offset;
+
+ LOG_I(PHY,"Granted Re subframe %d / symbol %d => %d (%d RBs)\n", subframe, symbol_mod, granted_re,dlsch0_harq->nb_rb);
+ LOG_I(PHY,"Pbch/PSS/SSS Re subframe %d / symbol %d => %d \n", subframe, symbol_mod, pbch_pss_sss_re);
+ LOG_I(PHY,"CRS Re Per PRB subframe %d / symbol %d => %d \n", subframe, symbol_mod, crs_re);
+ LOG_I(PHY,"Data Re subframe %d / symbol %d => %d \n", subframe, symbol_mod, data_re);
+
+
+
+ LOG_I(PHY,"Data Re subframe %d-symbol %d => llr length %d, llr offset %d \n", subframe, symbol,
+ pdsch_vars->llr_length[symbol], pdsch_vars->llr_offset[symbol]);
+ }
+}
+void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
+ uint8_t N_RB_DL,
+ DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
+ LTE_DL_FRAME_PARMS *frame_parms,
+ LTE_UE_PDCCH *pdcch_vars,
+ LTE_UE_PDSCH *pdsch_vars,
+ uint8_t subframe,
+ uint16_t rnti,
+ uint16_t tc_rnti,
+ uint16_t si_rnti,
+ uint16_t ra_rnti,
+ uint16_t p_rnti,
+ LTE_DL_UE_HARQ_t *pdlsch0_harq,
+ LTE_UE_DLSCH_t *pdlsch0)
+{
+
+ uint8_t harq_pid = pdci_info_extarcted->harq_pid;
+ uint8_t vrb_type = pdci_info_extarcted->vrb_type;
+ uint32_t rballoc = pdci_info_extarcted->rballoc;
+ uint8_t mcs1 = pdci_info_extarcted->mcs1;
+ uint8_t rv1 = pdci_info_extarcted->rv1;
+ uint8_t ndi1 = pdci_info_extarcted->ndi1;
+ uint8_t TPC = pdci_info_extarcted->TPC;
+ uint8_t rah = pdci_info_extarcted->rah;
+ uint8_t dai = pdci_info_extarcted->dai;
+
+
+ uint8_t NPRB = 0;
+ uint8_t NPRB4TBS = 0;
+
+ if(dci_format == format1A)
+ {
+ switch (N_RB_DL) {
+ case 6:
+ NPRB = RIV2nb_rb_LUT6[rballoc];
+ break;
+ case 25:
+ NPRB = RIV2nb_rb_LUT25[rballoc];
+ break;
+ case 50:
+ NPRB = RIV2nb_rb_LUT50[rballoc];
+ break;
+ case 100:
+ NPRB = RIV2nb_rb_LUT100[rballoc];
+ break;
+ }
+ if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
+ {
+ NPRB4TBS = (TPC&1) + 2;
+ }
+ else
+ {
+ NPRB4TBS = NPRB;
+ /*
+ switch (N_RB_DL) {
+ case 6:
+ NPRB = RIV2nb_rb_LUT6[rballoc];//NPRB;
+ break;
+ case 25:
+ NPRB = RIV2nb_rb_LUT25[rballoc];//NPRB;
+ break;
+ case 50:
+ NPRB = RIV2nb_rb_LUT50[rballoc];//NPRB;
+ break;
+ case 100:
+ NPRB = RIV2nb_rb_LUT100[rballoc];//NPRB;
+ break;
+ }
+
+ */
+ }
+ }
+ else // format1
+ {
+ NPRB = conv_nprb(rah, rballoc, N_RB_DL);
+ NPRB4TBS=NPRB;
+ }
+
+ pdlsch0->current_harq_pid = harq_pid;
+ pdlsch0->active = 1;
+ pdlsch0->rnti = rnti;
+ if(dci_format == format1A)
+ pdlsch0->harq_ack[subframe].vDAI_DL = dai+1;
+
+ if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
+ {
+ pdlsch0_harq->round = 0;
+ pdlsch0_harq->status = ACTIVE;
+ }
+ else //CRNTI
+ {
+ if (rnti == tc_rnti) {
+ //fix for standalone Contention Resolution Id
+ pdlsch0_harq->DCINdi = (uint8_t)-1;
+ LOG_D(PHY,"UE (%x/%d): Format1A DCI: C-RNTI is temporary. Set NDI = %d and to be ignored\n",
+ rnti,harq_pid,pdlsch0_harq->DCINdi);
+ }
+
+ // NDI has been toggled or this is the first transmission
+ if ((ndi1!=pdlsch0_harq->DCINdi) || (pdlsch0_harq->first_tx==1))
+ {
+ pdlsch0_harq->round = 0;
+ pdlsch0_harq->first_tx = 0;
+ pdlsch0_harq->status = ACTIVE;
+
+ }else if (rv1 != 0 )
+ //NDI has not been toggled but rv was increased by eNB: retransmission
+ {
+ if (pdlsch0_harq->status == SCH_IDLE)
+ //packet was actually decoded in previous transmission (ACK was missed by eNB)
+ //However, the round is not a good check as it might have been decoded in a retransmission prior to this one.
+ {
+ // LOG_D(PHY,"skip pdsch decoding and report ack\n");
+ // skip pdsch decoding and report ack
+ //pdlsch0_harq->status = SCH_IDLE;
+ pdlsch0->active = 0;
+ pdlsch0->harq_ack[subframe].ack = 1;
+ pdlsch0->harq_ack[subframe].harq_id = harq_pid;
+ pdlsch0->harq_ack[subframe].send_harq_status = 1;
+
+ //pdlsch0_harq->first_tx = 0;
+ }
+ else //normal retransmission
+ {
+ // nothing special to do
+ }
+ }
+ else
+ {
+ pdlsch0_harq->status = ACTIVE;
+ }
+ }
+
+ pdlsch0_harq->DCINdi = ndi1;
+ pdlsch0_harq->mcs = mcs1;
+ pdlsch0_harq->rvidx = rv1;
+ pdlsch0_harq->nb_rb = NPRB;
+
+ pdlsch0_harq->codeword = 0;
+ pdlsch0_harq->Nl = 1;
+ pdlsch0_harq->mimo_mode = frame_parms->nb_antenna_ports_eNB == 1 ?SISO : ALAMOUTI;
+ pdlsch0_harq->dl_power_off = 1; //no power offset
+ pdlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC &3];
+
+ // compute resource allocation
+ if(dci_format == format1A)
+ {
+ switch (N_RB_DL) {
+ case 6:
+ if (vrb_type == LOCALIZED) {
+ pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT6[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT6[rballoc];
+ }
+ else {
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT6[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT6[rballoc];
+ }
+ break;
+
+ case 25:
+ if (vrb_type == LOCALIZED) {
+ pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT25[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT25[rballoc];
+ }
+ else {
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT25[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT25[rballoc];
+ }
+ break;
+
+ case 50:
+ if (vrb_type == LOCALIZED) {
+ pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT50_1[rballoc];
+ } else { // DISTRIBUTED
+ if ((rballoc&(1<<10)) == 0) {
+ rballoc = rballoc&(~(1<<10));
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
+ }
+ else {
+ rballoc = rballoc&(~(1<<10));
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
+ }
+ }
+ break;
+
+ case 100:
+ if (vrb_type == LOCALIZED) {
+ pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_even[2] = localRIV2alloc_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_even[3] = localRIV2alloc_LUT100_3[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[2] = localRIV2alloc_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_odd[3] = localRIV2alloc_LUT100_3[rballoc];
+ } else {
+ if ((rballoc&(1<<10)) == 0) { //Gap 1
+ rballoc = rballoc&(~(1<<12));
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap0_even_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap0_even_LUT100_3[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap0_odd_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap0_odd_LUT100_3[rballoc];
+ }
+ else { //Gap 2
+ rballoc = rballoc&(~(1<<12));
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap1_even_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap1_even_LUT100_3[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap1_odd_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap1_odd_LUT100_3[rballoc];
+ }
+ }
+ break;
+ }
+ }
+ else // format1
+ {
+ conv_rballoc(rah,rballoc,frame_parms->N_RB_DL,pdlsch0_harq->rb_alloc_even);
+ pdlsch0_harq->rb_alloc_odd[0]= pdlsch0_harq->rb_alloc_even[0];
+ pdlsch0_harq->rb_alloc_odd[1]= pdlsch0_harq->rb_alloc_even[1];
+ pdlsch0_harq->rb_alloc_odd[2]= pdlsch0_harq->rb_alloc_even[2];
+ pdlsch0_harq->rb_alloc_odd[3]= pdlsch0_harq->rb_alloc_even[3];
+ }
+ if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
+ {
+ pdlsch0_harq->TBS = TBStable[mcs1][NPRB4TBS-1];
+ pdlsch0_harq->Qm = 2;
+ }
+ else
+ {
+ if(mcs1 < 29)
+ {
+ pdlsch0_harq->TBS = TBStable[get_I_TBS(mcs1)][NPRB4TBS-1];
+ pdlsch0_harq->Qm = get_Qm(mcs1);
+ }
+ }
+
+ compute_llr_offset(frame_parms,
+ pdcch_vars,
+ pdsch_vars,
+ pdlsch0_harq,
+ NPRB,
+ subframe);
+}
+
+void prepare_dl_decoding_format1C(uint8_t N_RB_DL,
+ DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
+ LTE_DL_FRAME_PARMS *frame_parms,
+ LTE_UE_PDCCH *pdcch_vars,
+ LTE_UE_PDSCH *pdsch_vars,
+ uint32_t rnti,
+ uint32_t si_rnti,
+ uint32_t ra_rnti,
+ uint32_t p_rnti,
+ uint32_t frame,
+ uint8_t subframe,
+ LTE_DL_UE_HARQ_t *pdlsch0_harq,
+ LTE_UE_DLSCH_t *pdlsch0)
+{
+
+ uint8_t harq_pid = pdci_info_extarcted->harq_pid;
+ uint32_t rballoc = pdci_info_extarcted->rballoc;
+ uint8_t mcs1 = pdci_info_extarcted->mcs1;
+ uint8_t Ngap = pdci_info_extarcted->Ngap;
+
+ pdlsch0_harq->round = 0;
+ pdlsch0_harq->first_tx = 1;
+ pdlsch0_harq->vrb_type = DISTRIBUTED;
+
+ if (rnti==si_rnti) { // rule from Section 5.3.1 of 36.321
+ if (((frame&1) == 0) && (subframe == 5))
+ pdlsch0_harq->rvidx = (((3*((frame>>1)&3))+1)>>1)&3; // SIB1
+ else
+ pdlsch0_harq->rvidx = (((3*(subframe&3))+1)>>1)&3; // other SIBs
+ }
+ else if ((rnti==p_rnti) || (rnti==ra_rnti)) { // Section 7.1.7.3
+ pdlsch0_harq->rvidx = 0;
+ }
+
+
+ pdlsch0_harq->Nl = 1;
+ pdlsch0_harq->mimo_mode = frame_parms->nb_antenna_ports_eNB == 1 ?SISO : ALAMOUTI;
+ pdlsch0_harq->dl_power_off = 1; //no power offset
+
+ pdlsch0_harq->codeword = 0;
+ pdlsch0_harq->mcs = mcs1;
+ pdlsch0_harq->TBS = TBStable1C[mcs1];
+ pdlsch0_harq->Qm = 2;
+
+
+ pdlsch0->current_harq_pid = harq_pid;
+ pdlsch0->active = 1;
+ pdlsch0->rnti = rnti;
+
+ switch (N_RB_DL) {
+ case 6:
+ pdlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rballoc];
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT6[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT6[rballoc];
+
+ break;
+
+ case 25:
+ pdlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rballoc];
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT25[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT25[rballoc];
+ break;
+
+ case 50:
+ pdlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rballoc];
+ if (Ngap == 0) {
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
+ }
+ else {
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT50_1[rballoc];
+ }
+ break;
+
+ case 100:
+ pdlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rballoc];
+ if (Ngap==0) {
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap0_even_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap0_odd_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap0_even_LUT100_3[rballoc];
+ pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap0_odd_LUT100_3[rballoc];
+ }
+ else {
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap1_even_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap1_odd_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap1_even_LUT100_3[rballoc];
+ pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap1_odd_LUT100_3[rballoc];
+ }
+ break;
+
+ default:
+ AssertFatal(0,"Format 1C: Unknown N_RB_DL %d\n",frame_parms->N_RB_DL);
+ break;
+ }
+
+ compute_llr_offset(frame_parms,
+ pdcch_vars,
+ pdsch_vars,
+ pdlsch0_harq,
+ pdlsch0_harq->nb_rb,
+ subframe);
+
+}
+
+void compute_precoding_info_2cw(uint8_t tpmi, uint8_t tbswap, uint16_t pmi_alloc, LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_UE_HARQ_t *dlsch0_harq, LTE_DL_UE_HARQ_t *dlsch1_harq)
+{
+
+switch (tpmi) {
+ case 0:
+ dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1;
+ dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1;
+ dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,0, 1);
+ dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,0, 1);
+ break;
+ case 1:
+ dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj;
+ dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj;
+ dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,1, 1);
+ dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,1, 1);
+ break;
+ case 2: // PUSCH precoding
+ dlsch0_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING;
+ dlsch1_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING;
+ if (tbswap==0){
+ dlsch0_harq->pmi_alloc = pmi_alloc;
+ dlsch1_harq->pmi_alloc = pmi_alloc^0x1555;
+ } else {
+ dlsch1_harq->pmi_alloc = pmi_alloc;
+ dlsch0_harq->pmi_alloc = pmi_alloc^0x1555;
+ }
+#ifdef DEBUG_HARQ
+ printf ("\n \n compute_precoding_info_2cw pmi_alloc_new = %d\n", dlsch0_harq->pmi_alloc);
+ #endif
+ break;
+ default:
+ break;
+ }
+}
+
+void compute_precoding_info_1cw(uint8_t tpmi, uint16_t pmi_alloc, LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_UE_HARQ_t *dlsch_harq)
+{
+
+switch (tpmi) {
+ case 0 :
+ dlsch_harq->mimo_mode = ALAMOUTI;
+ break;
+ case 1:
+ dlsch_harq->mimo_mode = UNIFORM_PRECODING11;
+ dlsch_harq->pmi_alloc = pmi_extend(frame_parms,0, 0);
+ break;
+ case 2:
+ dlsch_harq->mimo_mode = UNIFORM_PRECODING1m1;
+ dlsch_harq->pmi_alloc = pmi_extend(frame_parms,1, 0);
+ break;
+ case 3:
+ dlsch_harq->mimo_mode = UNIFORM_PRECODING1j;
+ dlsch_harq->pmi_alloc = pmi_extend(frame_parms,2, 0);
+ break;
+ case 4:
+ dlsch_harq->mimo_mode = UNIFORM_PRECODING1mj;
+ dlsch_harq->pmi_alloc = pmi_extend(frame_parms,3, 0);
+ break;
+ case 5:
+ dlsch_harq->mimo_mode = PUSCH_PRECODING0;
+ dlsch_harq->pmi_alloc = pmi_alloc;//pmi_convert(frame_parms,dlsch0->pmi_alloc,0);
+ break;
+ case 6:
+ dlsch_harq->mimo_mode = PUSCH_PRECODING1;
+ dlsch_harq->pmi_alloc = pmi_alloc;//pmi_convert(frame_parms,dlsch0->pmi_alloc,1);
+ break;
+ }
+ #ifdef DEBUG_HARQ
+ printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d with tpmi %d\n", dlsch_harq->pmi_alloc, tpmi);
+ #endif
+ }
+
+void compute_precoding_info_format2A(uint8_t tpmi,
+ uint8_t nb_antenna_ports_eNB,
+ uint8_t tb0_active,
+ uint8_t tb1_active,
+ LTE_DL_UE_HARQ_t *dlsch0_harq,
+ LTE_DL_UE_HARQ_t *dlsch1_harq)
+{
+
+ dlsch0_harq->dl_power_off = 0;
+ dlsch1_harq->dl_power_off = 0;
+
+ if (nb_antenna_ports_eNB == 2) {
+ if ((tb0_active==1) && (tb1_active==1)) {
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+ } else {
+ dlsch0_harq->mimo_mode = ALAMOUTI;
+ dlsch1_harq->mimo_mode = ALAMOUTI;
+ }
+ } else if (nb_antenna_ports_eNB == 4) { // 4 antenna case
+ if ((tb0_active==1) && (tb1_active==1)) {
+ switch (tpmi) {
+ case 0: // one layer per transport block
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+ break;
+
+ case 1: // one-layers on TB 0, two on TB 1
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->Nl = 2;
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+ break;
+
+ case 2: // two-layers on TB 0, two on TB 1
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch0_harq->Nl = 2;
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+ break;
+
+ case 3: //
+ LOG_E(PHY,"Illegal value (3) for TPMI in Format 2A DCI\n");
+ break;
+ }
+ } else if (tb0_active == 1) {
+ switch (tpmi) {
+ case 0: // one layer per transport block
+ dlsch0_harq->mimo_mode = ALAMOUTI;
+ dlsch1_harq->mimo_mode = ALAMOUTI;
+ break;
+
+ case 1: // two-layers on TB 0
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch0_harq->Nl = 2;
+ dlsch0_harq->dl_power_off = 1;
+ break;
+
+ case 2: // two-layers on TB 0, two on TB 1
+ case 3: //
+ LOG_E(PHY,"Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n",tpmi);
+ break;
+ }
+ } else if (tb1_active == 1) {
+ switch (tpmi) {
+ case 0: // one layer per transport block
+ dlsch0_harq->mimo_mode = ALAMOUTI;
+ dlsch1_harq->mimo_mode = ALAMOUTI;
+ break;
+
+ case 1: // two-layers on TB 0
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->Nl = 2;
+ dlsch0_harq->dl_power_off = 1;
+ break;
+
+ case 2: // two-layers on TB 0, two on TB 1
+ case 3: //
+ LOG_E(PHY,"Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n",tpmi);
+ break;
+ }
+ }
+ }
+ // printf("Format 2A: NPRB=%d (rballoc %x,mcs1 %d, mcs2 %d, frame_type %d N_RB_DL %d,active %d/%d)\n",NPRB,rballoc,mcs1,mcs2,frame_parms->frame_type,frame_parms->N_RB_DL,dlsch0->active,dlsch1->active);
+ //printf("UE (%x/%d): Subframe %d Format2A DCI: ndi1 %d, old_ndi1 %d, ndi2 %d, old_ndi2 %d (first tx1 %d, first tx2 %d) harq_status1 %d, harq_status2 %d\n",dlsch0->rnti,harq_pid,subframe,ndi,dlsch0_harq->DCINdi,
+ // dlsch0_harq->first_tx,dlsch1_harq->first_tx,dlsch0_harq->status,dlsch1_harq->status);
+ //printf("TBS0 %d, TBS1 %d\n",dlsch0_harq->TBS,dlsch1_harq->TBS);
+
+}
+
+void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
+ DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
+ LTE_DL_FRAME_PARMS *frame_parms,
+ LTE_UE_PDCCH *pdcch_vars,
+ LTE_UE_PDSCH *pdsch_vars,
+ uint16_t rnti,
+ uint8_t subframe,
+ LTE_DL_UE_HARQ_t *dlsch0_harq,
+ LTE_DL_UE_HARQ_t *dlsch1_harq,
+ LTE_UE_DLSCH_t *pdlsch0,
+ LTE_UE_DLSCH_t *pdlsch1)
+{
+
+ uint8_t rah = pdci_info_extarcted->rah;
+ uint8_t mcs1 = pdci_info_extarcted->mcs1;
+ uint8_t mcs2 = pdci_info_extarcted->mcs2;
+ uint8_t rv1 = pdci_info_extarcted->rv1;
+ uint8_t rv2 = pdci_info_extarcted->rv2;
+ uint8_t harq_pid = pdci_info_extarcted->harq_pid;
+ uint32_t rballoc = pdci_info_extarcted->rballoc;
+ uint8_t tbswap = pdci_info_extarcted->tb_swap;
+ uint8_t tpmi = pdci_info_extarcted->tpmi;
+ uint8_t TPC = pdci_info_extarcted->TPC;
+ uint8_t ndi1 = pdci_info_extarcted->ndi1;
+ uint8_t ndi2 = pdci_info_extarcted->ndi2;
+
+ uint8_t TB0_active = 1;
+ uint8_t TB1_active = 1;
+
+ // printf("inside prepare pdlsch1->pmi_alloc %d \n",pdlsch1->pmi_alloc);
+
+
+ if ((rv1 == 1) && (mcs1 == 0)) {
+ TB0_active=0;
+ }
+ if ((rv2 == 1) && (mcs2 == 0)) {
+ TB1_active=0;
+ }
+
+#ifdef DEBUG_HARQ
+ printf("[DCI UE]: TB0 status %d , TB1 status %d\n", TB0_active, TB1_active);
+#endif
+
+ dlsch0_harq->mcs = mcs1;
+ dlsch1_harq->mcs = mcs2;
+ dlsch0_harq->rvidx = rv1;
+ dlsch1_harq->rvidx = rv2;
+ dlsch0_harq->DCINdi = ndi1;
+ dlsch1_harq->DCINdi = ndi2;
+
+ dlsch0_harq->codeword = 0;
+ dlsch1_harq->codeword = 1;
+ dlsch0_harq->Nl = 1;
+ dlsch1_harq->Nl = 1;
+ dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
+ dlsch1_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+
+ pdlsch0->current_harq_pid = harq_pid;
+ pdlsch0->harq_ack[subframe].harq_id = harq_pid;
+ pdlsch1->current_harq_pid = harq_pid;
+ pdlsch1->harq_ack[subframe].harq_id = harq_pid;
+
+ // assume two CW are active
+ dlsch0_harq->status = ACTIVE;
+ dlsch1_harq->status = ACTIVE;
+ pdlsch0->active = 1;
+ pdlsch1->active = 1;
+ pdlsch0->rnti = rnti;
+ pdlsch1->rnti = rnti;
+
+
+ if (TB0_active && TB1_active && tbswap==1) {
+ dlsch0_harq->codeword = 1;
+ dlsch1_harq->codeword = 0;
+ }
+
+
+ if (!TB0_active && TB1_active){
+ dlsch1_harq->codeword = 0;
+ }
+
+ if (TB0_active && !TB1_active){
+ dlsch0_harq->codeword = 0;
+ }
+
+
+ if (TB0_active==0) {
+ dlsch0_harq->status = SCH_IDLE;
+ pdlsch0->active = 0;
+ #ifdef DEBUG_HARQ
+ printf("[DCI UE]: TB0 is deactivated, retransmit TB1 transmit in TM6\n");
+ #endif
+ }
+
+ if (TB1_active==0) {
+ dlsch1_harq->status = SCH_IDLE;
+ pdlsch1->active = 0;
+ }
+
+#ifdef DEBUG_HARQ
+ printf("[DCI UE]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status);
+#endif
+
+ // compute resource allocation
+ if (TB0_active == 1){
+
+ dlsch0_harq->nb_rb = conv_nprb(rah,
+ rballoc,
+ frame_parms->N_RB_DL);
+ conv_rballoc(rah,
+ rballoc,
+ frame_parms->N_RB_DL,
+ dlsch0_harq->rb_alloc_even);
+
+ dlsch0_harq->rb_alloc_odd[0]= dlsch0_harq->rb_alloc_even[0];
+ dlsch0_harq->rb_alloc_odd[1]= dlsch0_harq->rb_alloc_even[1];
+ dlsch0_harq->rb_alloc_odd[2]= dlsch0_harq->rb_alloc_even[2];
+ dlsch0_harq->rb_alloc_odd[3]= dlsch0_harq->rb_alloc_even[3];
+
+ if (TB1_active == 1){
+ dlsch1_harq->rb_alloc_even[0]= dlsch0_harq->rb_alloc_even[0];
+ dlsch1_harq->rb_alloc_even[1]= dlsch0_harq->rb_alloc_even[1];
+ dlsch1_harq->rb_alloc_even[2]= dlsch0_harq->rb_alloc_even[2];
+ dlsch1_harq->rb_alloc_even[3]= dlsch0_harq->rb_alloc_even[3];
+ dlsch1_harq->rb_alloc_odd[0] = dlsch0_harq->rb_alloc_odd[0];
+ dlsch1_harq->rb_alloc_odd[1] = dlsch0_harq->rb_alloc_odd[1];
+ dlsch1_harq->rb_alloc_odd[2] = dlsch0_harq->rb_alloc_odd[2];
+ dlsch1_harq->rb_alloc_odd[3] = dlsch0_harq->rb_alloc_odd[3];
+
+ dlsch1_harq->nb_rb = dlsch0_harq->nb_rb;
+
+ //dlsch0_harq->Nl = 1;
+ //dlsch1_harq->Nl = 1;
+ }
+ } else if ((TB0_active == 0) && (TB1_active == 1)){
+
+ conv_rballoc(rah,
+ rballoc,
+ frame_parms->N_RB_DL,
+ dlsch1_harq->rb_alloc_even);
+
+ dlsch1_harq->rb_alloc_odd[0]= dlsch1_harq->rb_alloc_even[0];
+ dlsch1_harq->rb_alloc_odd[1]= dlsch1_harq->rb_alloc_even[1];
+ dlsch1_harq->rb_alloc_odd[2]= dlsch1_harq->rb_alloc_even[2];
+ dlsch1_harq->rb_alloc_odd[3]= dlsch1_harq->rb_alloc_even[3];
+ dlsch1_harq->nb_rb = conv_nprb(rah,
+ rballoc,
+ frame_parms->N_RB_DL);
+ }
+
+
+ // compute precoding matrix + mimo mode
+ if(dci_format == format2)
+ {
+ if ((TB0_active) && (TB1_active)){ //two CW active
+ compute_precoding_info_2cw(tpmi, tbswap, pdlsch0->pmi_alloc,frame_parms, dlsch0_harq, dlsch1_harq);
+
+ // printf("[DCI UE 1]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status);
+ } else if ((TB0_active) && (!TB1_active)) { // only CW 0 active
+ compute_precoding_info_1cw(tpmi, pdlsch0->pmi_alloc, frame_parms, dlsch0_harq);
+ } else {
+ compute_precoding_info_1cw(tpmi, pdlsch1->pmi_alloc, frame_parms, dlsch1_harq);
+ // printf("I am doing compute_precoding_info_1cw with tpmi %d \n", tpmi);
+ }
+ //printf(" UE DCI harq0 MIMO mode = %d\n", dlsch0_harq->mimo_mode);
+ if ((frame_parms->nb_antenna_ports_eNB == 1) && (TB0_active))
+ dlsch0_harq->mimo_mode = SISO;
+ }
+ else
+ {
+ compute_precoding_info_format2A( tpmi,
+ frame_parms->nb_antenna_ports_eNB,
+ TB0_active,
+ TB1_active,
+ dlsch0_harq,
+ dlsch1_harq);
+ }
+ // printf("[DCI UE 2]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status);
+ // reset round + compute Qm
+ if (TB0_active) {
+ // printf("TB0 ndi1 =%d, dlsch0_harq->DCINdi =%d, dlsch0_harq->first_tx = %d\n", ndi1, dlsch0_harq->DCINdi, dlsch0_harq->first_tx);
+ if ((ndi1!=dlsch0_harq->DCINdi) || (dlsch0_harq->first_tx==1)) {
+ dlsch0_harq->round = 0;
+ dlsch0_harq->status = ACTIVE;
+ dlsch0_harq->DCINdi = ndi1;
+
+ //LOG_I(PHY,"[UE] DLSCH: New Data Indicator CW0 subframe %d (pid %d, round %d)\n",
+ // subframe,harq_pid,dlsch0_harq->round);
+ if ( dlsch0_harq->first_tx==1) {
+ // LOG_D(PHY,"Format 2 DCI First TX0: Clearing flag\n");
+ dlsch0_harq->first_tx = 0;
+ }
+ }
+ /*else if (rv1 != 0 )
+ //NDI has not been toggled but rv was increased by eNB: retransmission
+ {
+ if(dlsch0_harq->status == SCH_IDLE) {
+ // skip pdsch decoding and report ack
+ //dlsch0_harq->status = SCH_IDLE;
+ pdlsch0->active = 0;
+ pdlsch0->harq_ack[subframe].ack = 1;
+ pdlsch0->harq_ack[subframe].harq_id = harq_pid;
+ pdlsch0->harq_ack[subframe].send_harq_status = 1;
+ }*/
+
+ // if Imcs in [29..31] TBS is assumed to be as determined from DCI transported in the latest
+ // PDCCH for the same trasport block using Imcs in [0 .. 28]
+ if(dlsch0_harq->mcs <= 28)
+ {
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
+ LOG_D(PHY,"[UE] DLSCH: New TBS CW0 subframe %d (pid %d, round %d) TBS %d \n",
+ subframe,harq_pid,dlsch0_harq->round, dlsch0_harq->TBS);
+ }
+ else
+ {
+ LOG_D(PHY,"[UE] DLSCH: Keep the same TBS CW0 subframe %d (pid %d, round %d) TBS %d \n",
+ subframe,harq_pid,dlsch0_harq->round, dlsch0_harq->TBS);
+ }
+ //if(dlsch0_harq->Nl == 2)
+ //dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][(dlsch0_harq->nb_rb<<1)-1];
+ if (mcs1 <= 28)
+ dlsch0_harq->Qm = get_Qm(mcs1);
+ else if (mcs1<=31)
+ dlsch0_harq->Qm = (mcs1-28)<<1;
+ }
+
+ // printf("[DCI UE 3]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status);
+
+ if (TB1_active) {
+ // printf("TB1 ndi2 =%d, dlsch1_harq->DCINdi =%d, dlsch1_harq->first_tx = %d\n", ndi2, dlsch1_harq->DCINdi, dlsch1_harq->first_tx);
+ if ((ndi2!=dlsch1_harq->DCINdi) || (dlsch1_harq->first_tx==1)) {
+ dlsch1_harq->round = 0;
+ dlsch1_harq->status = ACTIVE;
+ dlsch1_harq->DCINdi = ndi2;
+ //LOG_I(PHY,"[UE] DLSCH: New Data Indicator CW1 subframe %d (pid %d, round %d)\n",
+ // subframe,harq_pid,dlsch0_harq->round);
+ if (dlsch1_harq->first_tx==1) {
+ // LOG_D(PHY,"Format 2 DCI First TX1: Clearing flag\n");
+ dlsch1_harq->first_tx = 0;
+ }
+ }
+ /*else if (rv1 != 0 )
+ //NDI has not been toggled but rv was increased by eNB: retransmission
+ {
+ if(dlsch1_harq->status == SCH_IDLE) {
+ // skip pdsch decoding and report ack
+ //dlsch1_harq->status = SCH_IDLE;
+ pdlsch1->active = 0;
+ pdlsch1->harq_ack[subframe].ack = 1;
+ pdlsch1->harq_ack[subframe].harq_id = harq_pid;
+ pdlsch1->harq_ack[subframe].send_harq_status = 1;
+ }
+ }*/
+
+ // if Imcs in [29..31] TBS is assumed to be as determined from DCI transported in the latest
+ // PDCCH for the same trasport block using Imcs in [0 .. 28]
+ if(dlsch1_harq->mcs <= 28)
+ {
+ dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
+ LOG_D(PHY,"[UE] DLSCH: New TBS CW1 subframe %d (pid %d, round %d) TBS %d \n",
+ subframe,harq_pid,dlsch1_harq->round, dlsch1_harq->TBS);
+ }
+ else
+ {
+ LOG_D(PHY,"[UE] DLSCH: Keep the same TBS CW1 subframe %d (pid %d, round %d) TBS %d \n",
+ subframe,harq_pid,dlsch1_harq->round, dlsch1_harq->TBS);
+ }
+ if (mcs2 <= 28)
+ dlsch1_harq->Qm = get_Qm(mcs2);
+ else if (mcs1<=31)
+ dlsch1_harq->Qm = (mcs2-28)<<1;
+ }
+
+
+ compute_llr_offset(frame_parms,
+ pdcch_vars,
+ pdsch_vars,
+ dlsch0_harq,
+ dlsch0_harq->nb_rb,
+ subframe);
+
+
+ /* #ifdef DEBUG_HARQ
+ printf("[DCI UE]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status);
+ printf("[DCI UE]: TB0_active %d , TB1_active %d\n", TB0_active, TB1_active);
+ if (dlsch0 != NULL && dlsch1 != NULL)
+ printf("[DCI UE] dlsch0_harq status = %d, dlsch1_harq status = %d\n", dlsch0_harq->status, dlsch1_harq->status);
+ else if (dlsch0 == NULL && dlsch1 != NULL)
+ printf("[DCI UE] dlsch0_harq NULL dlsch1_harq status = %d\n", dlsch1_harq->status);
+ else if (dlsch0 != NULL && dlsch1 == NULL)
+ printf("[DCI UE] dlsch1_harq NULL dlsch0_harq status = %d\n", dlsch0_harq->status);
+ #endif*/
+}
+
+int generate_ue_dlsch_params_from_dci(int frame,
+ uint8_t subframe,
+ void *dci_pdu,
+ uint16_t rnti,
+ DCI_format_t dci_format,
+ LTE_UE_PDCCH *pdcch_vars,
+ LTE_UE_PDSCH *pdsch_vars,
+ LTE_UE_DLSCH_t **dlsch,
+ LTE_DL_FRAME_PARMS *frame_parms,
+ PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
+ uint16_t si_rnti,
+ uint16_t ra_rnti,
+ uint16_t p_rnti,
+ uint8_t beamforming_mode,
+ uint16_t tc_rnti)
+{
+
+ uint8_t harq_pid=0;
+ uint8_t frame_type=frame_parms->frame_type;
+ uint8_t tpmi=0;
+ LTE_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
+ LTE_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
+
+ DCI_INFO_EXTRACTED_t dci_info_extarcted;
+ uint8_t status=0;
+
+ if (!dlsch[0]) return -1;
+
+ #ifdef DEBUG_DCI
+ LOG_D(PHY,"dci_tools.c: Filling ue dlsch params -> rnti %x, SFN/SF %d/%d, dci_format %s\n",
+ rnti,
+ frame%1024,
+ subframe,
+ (dci_format==format0? "Format 0":(
+ dci_format==format1? "format 1":(
+ dci_format==format1A? "format 1A":(
+ dci_format==format1B? "format 1B":(
+ dci_format==format1C? "format 1C":(
+ dci_format==format1D? "format 1D":(
+ dci_format==format1E_2A_M10PRB? "format 1E_2A_M10PRB":(
+ dci_format==format2? "format 2":(
+ dci_format==format2A? "format 2A":(
+ dci_format==format2B? "format 2B":(
+ dci_format==format2C? "format 2C":(
+ dci_format==format2D? "format 2D":(
+ dci_format==format3? "format 3": "UNKNOWN"
+ ))))))))))))));
+ #endif
+
+ memset(&dci_info_extarcted,0,sizeof(dci_info_extarcted));
+ switch (dci_format) {
+
+ case format0: // This is an ULSCH allocation so nothing here, inform MAC
+ LOG_E(PHY,"format0 not possible\n");
+ return(-1);
+ break;
+
+ case format1A:
+ {
+ // extract dci infomation
+#ifdef DEBUG_DCI
+ LOG_I(PHY,"[DCI-FORMAT-1A] AbsSubframe %d.%d extarct dci info \n", frame, subframe);
+#endif
+ extract_dci1A_info(frame_parms->N_RB_DL,
+ frame_type,
+ dci_pdu,
+ &dci_info_extarcted);
+
+
+ // check dci content
+ dlsch0 = dlsch[0];
+ dlsch0->active = 0;
+ dlsch0_harq = dlsch[0]->harq_processes[dci_info_extarcted.harq_pid];
+#ifdef DEBUG_DCI
+ LOG_I(PHY,"[DCI-FORMAT-1A] AbsSubframe %d.%d check dci coherency \n", frame, subframe);
+#endif
+ status = check_dci_format1_1a_coherency(format1A,
+ frame_parms->N_RB_DL,
+ rnti,
+ tc_rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,frame,subframe,
+ &dci_info_extarcted,
+ dlsch0_harq);
+ if(status == 0)
+ {
+ printf("bad DCI 1A !!! \n");
+ return(-1);
+ }
+
+ // dci is correct ==> update internal structure and prepare dl decoding
+#ifdef DEBUG_DCI
+ LOG_I(PHY,"[DCI-FORMAT-1A] AbsSubframe %d.%d prepare dl decoding \n", frame, subframe);
+#endif
+ prepare_dl_decoding_format1_1A(format1A,
+ frame_parms->N_RB_DL,
+ &dci_info_extarcted,
+ frame_parms,
+ pdcch_vars,
+ pdsch_vars,
+ subframe,
+ rnti,
+ tc_rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ dlsch0_harq,
+ dlsch0);
+
+
+
+ break;
+ }
+ case format1C:
+ {
+ // extract dci infomation
+#ifdef DEBUG_DL_DECODING
+ LOG_I(PHY,"[DCI Format-1C] extact dci information \n");
+#endif
+ extract_dci1C_info(frame_parms->N_RB_DL,
+ frame_type,
+ dci_pdu,
+ &dci_info_extarcted);
+
+
+ // check dci content
+#ifdef DEBUG_DL_DECODING
+ LOG_I(PHY,"[DCI Format-1C] check dci content \n");
+#endif
+ dlsch0 = dlsch[0];
+ dlsch0->active = 0;
+ dlsch0_harq = dlsch[0]->harq_processes[dci_info_extarcted.harq_pid];
+
+ status = check_dci_format1c_coherency(frame_parms->N_RB_DL,
+ &dci_info_extarcted,
+ rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ dlsch0_harq);
+ if(status == 0)
+ return(-1);
+
+ // dci is correct ==> update internal structure and prepare dl decoding
+#ifdef DEBUG_DL_DECODING
+ LOG_I(PHY,"[DCI Format-1C] prepare downlink decoding \n");
+#endif
+ prepare_dl_decoding_format1C(frame_parms->N_RB_DL,
+ &dci_info_extarcted,
+ frame_parms,
+ pdcch_vars,
+ pdsch_vars,
+ rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ frame,
+ subframe,
+ dlsch0_harq,
+ dlsch0);
+
+ break;
+ }
+
+ case format1:
+ {
+ // extract dci infomation
+#ifdef DEBUG_DCI
+ LOG_I(PHY,"[DCI-FORMAT-1] AbsSubframe %d.%d extarct dci info \n", frame, subframe);
+#endif
+ extract_dci1_info(frame_parms->N_RB_DL,
+ frame_type,
+ dci_pdu,
+ &dci_info_extarcted);
+
+ // check dci content
+ dlsch0 = dlsch[0];
+ dlsch0->active = 0;
+ dlsch0_harq = dlsch[0]->harq_processes[dci_info_extarcted.harq_pid];
+
+#ifdef DEBUG_DCI
+ LOG_I(PHY,"[DCI-FORMAT-1] AbsSubframe %d.%d check dci coherency \n", frame, subframe);
+#endif
+ status = check_dci_format1_1a_coherency(format1,
+ frame_parms->N_RB_DL,
+ rnti,
+ tc_rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,frame,subframe,
+ &dci_info_extarcted,
+ dlsch0_harq);
+ if(status == 0)
+ {
+ printf("bad DCI 1 !!! \n");
+ return(-1);
+ }
+
+
+ // dci is correct ==> update internal structure and prepare dl decoding
+#ifdef DEBUG_DCI
+ LOG_I(PHY,"[DCI-FORMAT-1] AbsSubframe %d.%d prepare dl decoding \n", frame, subframe);
+#endif
+ prepare_dl_decoding_format1_1A(format1,
+ frame_parms->N_RB_DL,
+ &dci_info_extarcted,
+ frame_parms,
+ pdcch_vars,
+ pdsch_vars,
+ subframe,
+ rnti,
+ tc_rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ dlsch0_harq,
+ dlsch0);
+ break;
+ }
+
+ case format2:
+ {
+ // extract dci infomation
+ //LOG_I(PHY,"[DCI-format2] AbsSubframe %d.%d extract dci infomation \n", frame, subframe);
+ extract_dci2_info(frame_parms->N_RB_DL,
+ frame_type,
+ frame_parms->nb_antenna_ports_eNB,
+ dci_pdu,
+ &dci_info_extarcted);
+
+
+ // check dci content
+ dlsch[0]->active = 1;
+ dlsch[1]->active = 1;
+
+ dlsch0 = dlsch[0];
+ dlsch1 = dlsch[1];
+
+ dlsch0_harq = dlsch0->harq_processes[dci_info_extarcted.harq_pid];
+ dlsch1_harq = dlsch1->harq_processes[dci_info_extarcted.harq_pid];
+ // printf("before coherency dlsch[1]->pmi_alloc %d\n",dlsch[1]->pmi_alloc);
+ // printf("before coherency dlsch1->pmi_alloc %d\n",dlsch1->pmi_alloc);
+ // printf("before coherency dlsch1_harq->pmi_alloc %d\n",dlsch1_harq->pmi_alloc);
+
+ //LOG_I(PHY,"[DCI-format2] check dci content \n");
+ status = check_dci_format2_2a_coherency(format2,
+ frame_parms->N_RB_DL,
+ &dci_info_extarcted,
+ rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ dlsch0_harq,
+ dlsch1_harq);
+ if(status == 0)
+ return(-1);
+
+
+ // dci is correct ==> update internal structure and prepare dl decoding
+ //LOG_I(PHY,"[DCI-format2] update internal structure and prepare dl decoding \n");
+ prepare_dl_decoding_format2_2A(format2,
+ &dci_info_extarcted,
+ frame_parms,
+ pdcch_vars,
+ pdsch_vars,
+ rnti,
+ subframe,
+ dlsch0_harq,
+ dlsch1_harq,
+ dlsch0,
+ dlsch1);
+ }
+ break;
+
+ case format2A:
+ {
+ // extract dci infomation
+ LOG_I(PHY,"[DCI-format2] AbsSubframe %d.%d extract dci infomation \n", frame%1024, subframe);
+ extract_dci2A_info(frame_parms->N_RB_DL,
+ frame_type,
+ frame_parms->nb_antenna_ports_eNB,
+ dci_pdu,
+ &dci_info_extarcted);
+
+ // check dci content
+ //LOG_I(PHY,"[DCI-format2A] check dci content \n");
+ //LOG_I(PHY,"[DCI-format2A] tb_swap %d harq_pid %d\n", dci_info_extarcted.tb_swap, dci_info_extarcted.harq_pid);
+ //dlsch[0]->active = 0;
+ //dlsch[1]->active = 0;
+
+ if (dci_info_extarcted.tb_swap == 0) {
+ dlsch0 = dlsch[0];
+ dlsch1 = dlsch[1];
+ } else {
+ dlsch0 = dlsch[1];
+ dlsch1 = dlsch[0];
+ }
+ dlsch0_harq = dlsch0->harq_processes[dci_info_extarcted.harq_pid];
+ dlsch1_harq = dlsch1->harq_processes[dci_info_extarcted.harq_pid];
+
+ //LOG_I(PHY,"[DCI-format2A] check dci content \n");
+ status = check_dci_format2_2a_coherency(format2A,
+ frame_parms->N_RB_DL,
+ &dci_info_extarcted,
+ rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ dlsch0_harq,
+ dlsch1_harq);
+ if(status == 0)
+ return(-1);
+
+ // dci is correct ==> update internal structure and prepare dl decoding
+ //LOG_I(PHY,"[DCI-format2A] update internal structure and prepare dl decoding \n");
+ prepare_dl_decoding_format2_2A(format2A,
+ &dci_info_extarcted,
+ frame_parms,
+ pdcch_vars,
+ pdsch_vars,
+ rnti,
+ subframe,
+ dlsch0_harq,
+ dlsch1_harq,
+ dlsch0,
+ dlsch1);
+ }
+ break;
+
+ case format1E_2A_M10PRB:
+ if (!dlsch[0]) return -1;
+
+ harq_pid = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->harq_pid;
+
+ if (harq_pid>=8) {
+ LOG_E(PHY,"Format 1E_2A_M10PRB: harq_pid=%d >= 8\n", harq_pid);
+ return(-1);
+ }
+
+ dlsch[0]->current_harq_pid = harq_pid;
+ dlsch[0]->harq_ack[subframe].harq_id = harq_pid;
+
+ /*
+ tbswap = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->tb_swap;
+ if (tbswap == 0) {
+ dlsch0 = dlsch[0];
+ dlsch1 = dlsch[1];
+ }
+ else{
+ dlsch0 = dlsch[1];
+ dlsch1 = dlsch[0];
+ }
+ */
+ dlsch0 = dlsch[0];
+
+ dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
+ // Needs to be checked
+ dlsch0_harq->codeword=0;
+ conv_rballoc(((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rah,
+ ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rballoc,frame_parms->N_RB_DL,
+ dlsch0_harq->rb_alloc_even);
+
+ dlsch0_harq->rb_alloc_odd[0] = dlsch0_harq->rb_alloc_even[0];
+ dlsch0_harq->rb_alloc_odd[1] = dlsch0_harq->rb_alloc_even[1];
+ dlsch0_harq->rb_alloc_odd[2] = dlsch0_harq->rb_alloc_even[2];
+ dlsch0_harq->rb_alloc_odd[3] = dlsch0_harq->rb_alloc_even[3];
+ /*
+ dlsch1_harq->rb_alloc_even[0] = dlsch0_harq->rb_alloc_even[0];
+ dlsch1_harq->rb_alloc_even[1] = dlsch0_harq->rb_alloc_even[1];
+ dlsch1_harq->rb_alloc_even[2] = dlsch0_harq->rb_alloc_even[2];
+ dlsch1_harq->rb_alloc_even[3] = dlsch0_harq->rb_alloc_even[3];
+ */
+ dlsch0_harq->nb_rb = conv_nprb(((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rah,
+ ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rballoc,
+ frame_parms->N_RB_DL);
+ //dlsch1_harq->nb_rb = dlsch0_harq->nb_rb;
+
+ dlsch0_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->mcs;
+ dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->TPC&3];
+
+
+
+ /*
+ if (dlsch0_harq->mcs>20) {
+ printf("dci_tools.c: mcs > 20 disabled for now (asked %d)\n",dlsch0_harq->mcs);
+ return(-1);
+ }
+ */
+
+ //dlsch1_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->mcs2;
+ dlsch0_harq->rvidx = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rv;
+ //dlsch1_harq->rvidx = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rv2;
+
+ // check if either TB is disabled (see 36-213 V8.6 p. 26)
+
+ if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) {
+ dlsch0_harq->status = DISABLED;
+ }
+
+ //if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) {
+ //dlsch1_harq->status = DISABLED;
+ //}
+ dlsch0_harq->Nl = 1;
+
+ //dlsch0->layer_index = tbswap;
+ //dlsch1->layer_index = 1-tbswap;
+
+
+ // Fix this
+ tpmi = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->tpmi;
+ // printf("ue: tpmi %d\n",tpmi);
+
+ switch (tpmi) {
+ case 0 :
+ dlsch0_harq->mimo_mode = ALAMOUTI;
+ break;
+
+ case 1:
+ dlsch0_harq->mimo_mode = UNIFORM_PRECODING11;
+ dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,0,0);
+ break;
+
+ case 2:
+ dlsch0_harq->mimo_mode = UNIFORM_PRECODING1m1;
+ dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,1, 0);
+ break;
+
+ case 3:
+ dlsch0_harq->mimo_mode = UNIFORM_PRECODING1j;
+ dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,2, 0);
+
+ break;
+
+ case 4:
+ dlsch0_harq->mimo_mode = UNIFORM_PRECODING1mj;
+ dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,3, 0);
+ break;
+
+ case 5:
+ dlsch0_harq->mimo_mode = PUSCH_PRECODING0;
+ // pmi stored from ulsch allocation routine
+ dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;
+ //LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
+ break;
+
+
+ case 6:
+ dlsch0_harq->mimo_mode = PUSCH_PRECODING1;
+ LOG_E(PHY,"Unsupported TPMI\n");
+ return(-1);
+ break;
+ }
+
+
+ if (frame_parms->nb_antenna_ports_eNB == 1)
+ dlsch0_harq->mimo_mode = SISO;
+
+
+ if ((dlsch0_harq->DCINdi != ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->ndi) ||
+ (dlsch0_harq->first_tx==1)) {
+
+ dlsch0_harq->round = 0;
+ dlsch0_harq->first_tx = 0;
+ dlsch0_harq->status = ACTIVE;
+ }
+ /*
+ else if (dlsch0_harq->status == SCH_IDLE) { // we got same ndi for a previously decoded process,
+ // this happens if either another harq process in the same
+ // is NAK or an ACK was not received
+
+ dlsch0->harq_ack[subframe].ack = 1;
+ dlsch0->harq_ack[subframe].harq_id = harq_pid;
+ dlsch0->harq_ack[subframe].send_harq_status = 1;
+ dlsch0->active = 0;
+ return(0);
+ }
+ */
+
+ dlsch0_harq->DCINdi = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->ndi;
+ dlsch0_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->mcs;
+
+ if (dlsch0_harq->nb_rb>1) {
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
+ } else
+ dlsch0_harq->TBS =0;
+
+ dlsch0->rnti = rnti;
+ //dlsch1->rnti = rnti;
+
+ dlsch0->active = 1;
+ //dlsch1->active = 1;
+
+ dlsch0_harq->dl_power_off = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->dl_power_off;
+ //dlsch1_harq->dl_power_off = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->dl_power_off;
+
+
+ break;
+
+ default:
+ LOG_E(PHY,"format %d not yet implemented\n",dci_format);
+ return(-1);
+ break;
+ }
+
+#ifdef UE_DEBUG_TRACE
+
+ if (dlsch[0] && (dlsch[0]->rnti != 0xffff)) {
+ LOG_I(PHY,"dci_format:%d Abssubframe: %d.%d \n",dci_format,frame%1024,subframe);
+ LOG_I(PHY,"PDSCH dlsch0 UE: rnti %x\n",dlsch[0]->rnti);
+ LOG_D(PHY,"PDSCH dlsch0 UE: NBRB %d\n",dlsch0_harq->nb_rb);
+ LOG_D(PHY,"PDSCH dlsch0 UE: rballoc %x\n",dlsch0_harq->rb_alloc_even[0]);
+ LOG_I(PHY,"PDSCH dlsch0 UE: harq_pid %d\n",dci_info_extarcted.harq_pid);
+ LOG_I(PHY,"PDSCH dlsch0 UE: g %d\n",dlsch[0]->g_pucch);
+ LOG_D(PHY,"PDSCH dlsch0 UE: round %d\n",dlsch0_harq->round);
+ LOG_D(PHY,"PDSCH dlsch0 UE: DCINdi %d\n",dlsch0_harq->DCINdi);
+ LOG_D(PHY,"PDSCH dlsch0 UE: rvidx %d\n",dlsch0_harq->rvidx);
+ LOG_D(PHY,"PDSCH dlsch0 UE: TBS %d\n",dlsch0_harq->TBS);
+ LOG_D(PHY,"PDSCH dlsch0 UE: mcs %d\n",dlsch0_harq->mcs);
+ LOG_D(PHY,"PDSCH dlsch0 UE: pwr_off %d\n",dlsch0_harq->dl_power_off);
+ }
+#endif
+
+#if T_TRACER
+ if( (dlsch[0]->rnti != si_rnti) && (dlsch[0]->rnti != ra_rnti) && (dlsch[0]->rnti != p_rnti))
+ {
+ T(T_UE_PHY_DLSCH_UE_DCI, T_INT(0), T_INT(frame%1024), T_INT(subframe),
+ T_INT(dlsch[0]->rnti), T_INT(dci_format),
+ T_INT(harq_pid),
+ T_INT(dlsch0_harq->mcs),
+ T_INT(dlsch0_harq->TBS));
+ }
+#endif
+
+
+ // compute DL power control parameters
+ if (dlsch0_harq != NULL){
+ computeRhoA_UE(pdsch_config_dedicated, dlsch[0],dlsch0_harq->dl_power_off, frame_parms->nb_antenna_ports_eNB);
+ computeRhoB_UE(pdsch_config_dedicated,&(frame_parms->pdsch_config_common),frame_parms->nb_antenna_ports_eNB,dlsch[0],dlsch0_harq->dl_power_off);
+ }
+
+ if (dlsch1_harq != NULL) {
+ computeRhoA_UE(pdsch_config_dedicated, dlsch[1],dlsch1_harq->dl_power_off, frame_parms->nb_antenna_ports_eNB);
+ computeRhoB_UE(pdsch_config_dedicated,&(frame_parms->pdsch_config_common),frame_parms->nb_antenna_ports_eNB,dlsch[1],dlsch1_harq->dl_power_off);
+ }
+
+
+ return(0);
+}
+
+
+uint8_t subframe2harq_pid(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t subframe)
+{
+ uint8_t ret = 255;
+
+ if (frame_parms->frame_type == FDD) {
+ ret = (((frame*10)+subframe)&7);
+ } else {
+
+ switch (frame_parms->tdd_config) {
+
+ case 1:
+ if ((subframe==2) ||
+ (subframe==3) ||
+ (subframe==7) ||
+ (subframe==8))
+ switch (subframe) {
+ case 2:
+ case 3:
+ ret = (subframe-2);
+ break;
+
+ case 7:
+ case 8:
+ ret = (subframe-5);
+ break;
+
+ default:
+ LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config);
+ ret = (255);
+ break;
+ }
+
+ break;
+
+ case 2:
+ if ((subframe!=2) && (subframe!=7)) {
+ LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config);
+ ret=255;
+ }
+ else ret = (subframe/7);
+ break;
+
+ case 3:
+ if ((subframe<2) || (subframe>4)) {
+ LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config);
+ ret = (255);
+ }
+ else ret = (subframe-2);
+ break;
+
+ case 4:
+ if ((subframe<2) || (subframe>3)) {
+ LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config);
+ ret = (255);
+ }
+ else ret = (subframe-2);
+ break;
+
+ case 5:
+ if (subframe!=2) {
+ LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config);
+ ret = (255);
+ }
+ else ret = (subframe-2);
+ break;
+
+ default:
+ LOG_E(PHY,"subframe2_harq_pid, Unsupported TDD mode %d\n",frame_parms->tdd_config);
+ ret = (255);
+ }
+ }
+
+ AssertFatal(ret!=255,
+ "invalid harq_pid(%d) at SFN/SF = %d/%d\n", (int8_t)ret, frame, subframe);
+ return ret;
+}
+
+uint8_t pdcch_alloc2ul_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint8_t n)
+{
+ uint8_t ul_subframe = 255;
+
+ if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config == 1) &&
+ ((n==1)||(n==6))) // tdd_config 0,1 SF 1,5
+ ul_subframe = ((n+6)%10);
+ else if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config == 6) &&
+ ((n==0)||(n==1)||(n==5)||(n==6)))
+ ul_subframe = ((n+7)%10);
+ else if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config == 6) &&
+ (n==9)) // tdd_config 6 SF 9
+ ul_subframe = ((n+5)%10);
+ else
+ ul_subframe = ((n+4)%10);
+
+ AssertFatal(frame_parms->frame_type == FDD || subframe_select(frame_parms,ul_subframe) == SF_UL,"illegal ul_subframe %d (n %d)\n",ul_subframe,n);
+
+ LOG_D(PHY, "subframe %d: PUSCH subframe = %d\n", n, ul_subframe);
+ return ul_subframe;
+}
+
+uint8_t ul_subframe2pdcch_alloc_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint8_t n)
+{
+ if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config == 1) &&
+ ((n==7)||(n==2))) // tdd_config 0,1 SF 1,5
+ return((n==7)? 1 : 6);
+ else if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config == 6) &&
+ ((n==7)||(n==8)||(n==2)||(n==3)))
+ return((n+3)%10);
+ else if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config == 6) &&
+ (n==4)) // tdd_config 6 SF 9
+ return(9);
+ else
+ return((n+6)%10);
+}
+
+uint32_t pdcch_alloc2ul_frame(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame, uint8_t n)
+{
+ uint32_t ul_frame;
+
+ if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config == 1) &&
+ ((n==1)||(n==6))) // tdd_config 0,1 SF 1,5
+ ul_frame = (frame + (n==1 ? 0 : 1));
+ else if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config == 6) &&
+ ((n==0)||(n==1)||(n==5)||(n==6)))
+ ul_frame = (frame + (n>=5 ? 1 : 0));
+ else if ((frame_parms->frame_type == TDD) &&
+ (frame_parms->tdd_config == 6) &&
+ (n==9)) // tdd_config 6 SF 9
+ ul_frame = (frame+1);
+ else
+ ul_frame = (frame+(n>=6 ? 1 : 0));
+
+ LOG_D(PHY, "frame %d subframe %d: PUSCH frame = %d\n", frame, n, ul_frame);
+ return ul_frame % 1024;
+}
+
+int32_t pmi_convert_rank1_from_rank2(uint16_t pmi_alloc, int tpmi, int nb_rb)
+{
+ int nb_subbands = 0;
+ int32_t pmi_alloc_new = 0, pmi_new = 0, pmi_old = 0;
+ int i;
+
+ switch (nb_rb) {
+ case 6:
+ nb_subbands = 6;
+ break;
+ default:
+ case 25:
+ nb_subbands = 7;
+ break;
+ case 50:
+ nb_subbands = 9;
+ break;
+ case 100:
+ nb_subbands = 13;
+ break;
+ }
+
+ for (i = 0; i < nb_subbands; i++) {
+ pmi_old = (pmi_alloc >> i)&1;
+
+ if (pmi_old == 0)
+ if (tpmi == 5)
+ pmi_new = 0;
+ else
+ pmi_new = 1;
+ else
+ if (tpmi == 5)
+ pmi_new = 2;
+ else
+ pmi_new = 3;
+
+ pmi_alloc_new|=pmi_new<<(2*i);
+
+ }
+#ifdef DEBUG_HARQ
+printf(" [DCI UE] pmi_alloc_old %d, pmi_alloc_new %d pmi_old %d , pmi_new %d\n", pmi_alloc, pmi_alloc_new,pmi_old, pmi_new );
+#endif
+return(pmi_alloc_new);
+
+}
+
+uint16_t quantize_subband_pmi(PHY_MEASUREMENTS *meas,uint8_t eNB_id,int nb_rb)
+{
+
+ int i, aarx;
+ uint16_t pmiq=0;
+ uint32_t pmivect = 0;
+ uint8_t rank = meas->rank[eNB_id];
+ int pmi_re,pmi_im;
+ int nb_subbands=0;
+
+
+ switch (nb_rb) {
+ case 6:
+ nb_subbands = 6;
+ break;
+ default:
+ case 25:
+ nb_subbands = 7;
+ break;
+ case 50:
+ nb_subbands = 9;
+ break;
+ case 100:
+ nb_subbands = 13;
+ break;
+ }
+
+
+ for (i=0; i<nb_subbands; i++) {
+ pmi_re = 0;
+ pmi_im = 0;
+
+ if (rank == 0) {
+ for (aarx=0; aarx<meas->nb_antennas_rx; aarx++) {
+ pmi_re += meas->subband_pmi_re[eNB_id][i][aarx];
+ pmi_im += meas->subband_pmi_im[eNB_id][i][aarx];
+ }
+
+ // pmi_re = meas->subband_pmi_re[eNB_id][i][meas->selected_rx_antennas[eNB_id][i]];
+ // pmi_im = meas->subband_pmi_im[eNB_id][i][meas->selected_rx_antennas[eNB_id][i]];
+
+ // printf("pmi => (%d,%d)\n",pmi_re,pmi_im);
+ if ((pmi_re > pmi_im) && (pmi_re > -pmi_im))
+ pmiq = PMI_2A_11;
+ else if ((pmi_re < pmi_im) && (pmi_re > -pmi_im))
+ pmiq = PMI_2A_1j;
+ else if ((pmi_re < pmi_im) && (pmi_re < -pmi_im))
+ pmiq = PMI_2A_1m1;
+ else if ((pmi_re > pmi_im) && (pmi_re < -pmi_im))
+ pmiq = PMI_2A_1mj;
+
+ // printf("subband %d, pmi%d \n",i,pmiq);
+ pmivect |= (pmiq<<(2*i));
+ }
+
+ else if (rank==1) {
+ for (aarx=0; aarx<meas->nb_antennas_rx; aarx++) {
+ pmi_re += meas->subband_pmi_re[eNB_id][i][aarx];
+ //printf("meas->subband_pmi_re[eNB_id][i][%d]=%d\n", aarx, meas->subband_pmi_re[eNB_id][i][aarx]);
+ pmi_im += meas->subband_pmi_im[eNB_id][i][aarx];
+ //printf("meas->subband_pmi_im[eNB_id][i][%d]=%d\n",aarx, meas->subband_pmi_im[eNB_id][i][aarx]);
+ }
+ if (pmi_re >= pmi_im) // this is not orthogonal
+ // this is orthogonal
+ //if (((pmi_re >= pmi_im) && (pmi_re >= -pmi_im)) || ((pmi_re <= pmi_im) && (pmi_re >= -pmi_im)))
+ pmiq = PMI_2A_R1_11;
+ else
+ pmiq = PMI_2A_R1_1j;
+
+ // printf("subband %d, pmi_re %d, pmi_im %d, pmiq %d \n",i,pmi_re,pmi_im,pmiq);
+ // printf("subband %d, pmi%d \n",i,pmiq);
+ //According to Section 7.2.4 of 36.213
+
+ pmivect |= ((pmiq-1)<<(i)); //shift 1 since only one bit
+ }
+ else {
+ LOG_E(PHY,"PMI feedback for rank>1 not supported!\n");
+ pmivect = 0;
+ }
+
+ }
+#ifdef DEBUG_HARQ
+ printf( "quantize_subband_pmi pmivect %d \n", pmivect);
+#endif
+ return(pmivect);
+}
+
+uint16_t quantize_subband_pmi2(PHY_MEASUREMENTS *meas,uint8_t eNB_id,uint8_t a_id,int nb_subbands)
+{
+
+ uint8_t i;
+ uint16_t pmiq=0;
+ uint16_t pmivect = 0;
+ uint8_t rank = meas->rank[eNB_id];
+ int pmi_re,pmi_im;
+
+ for (i=0; i<nb_subbands; i++) {
+
+ if (rank == 0) {
+ pmi_re = meas->subband_pmi_re[eNB_id][i][a_id];
+ pmi_im = meas->subband_pmi_im[eNB_id][i][a_id];
+
+ if ((pmi_re > pmi_im) && (pmi_re > -pmi_im))
+ pmiq = PMI_2A_11;
+ else if ((pmi_re < pmi_im) && (pmi_re > -pmi_im))
+ pmiq = PMI_2A_1j;
+ else if ((pmi_re < pmi_im) && (pmi_re < -pmi_im))
+ pmiq = PMI_2A_1m1;
+ else if ((pmi_re > pmi_im) && (pmi_re < -pmi_im))
+ pmiq = PMI_2A_1mj;
+
+ pmivect |= (pmiq<<(2*i));
+ } else {
+ // This needs to be done properly!!!
+ pmivect = 0;
+ }
+ }
+
+ return(pmivect);
+}
+
+uint16_t quantize_wideband_pmi(PHY_MEASUREMENTS *meas,uint8_t eNB_id)
+{
+
+ uint16_t pmiq=0;
+ uint8_t rank = meas->rank[eNB_id];
+ //int pmi;
+ int pmi_re,pmi_im;
+
+ if (rank == 1) {
+ //pmi =
+ pmi_re = meas->wideband_pmi_re[eNB_id][meas->selected_rx_antennas[eNB_id][0]];
+ pmi_im = meas->wideband_pmi_im[eNB_id][meas->selected_rx_antennas[eNB_id][0]];
+
+ if ((pmi_re > pmi_im) && (pmi_re > -pmi_im))
+ pmiq = PMI_2A_11;
+ else if ((pmi_re < pmi_im) && (pmi_re > -pmi_im))
+ pmiq = PMI_2A_1j;
+ else if ((pmi_re < pmi_im) && (pmi_re < -pmi_im))
+ pmiq = PMI_2A_1m1;
+ else if ((pmi_re > pmi_im) && (pmi_re < -pmi_im))
+ pmiq = PMI_2A_1mj;
+
+ } else {
+ // This needs to be done properly!
+ pmiq = PMI_2A_11;
+ }
+
+
+ return(pmiq);
+}
+/*
+ uint8_t sinr2cqi(int sinr) {
+ if (sinr<-3)
+ return(0);
+ if (sinr>14)
+ return(10);
+ else
+ return(3+(sinr>>1));
+ }
+*/
+
+uint8_t sinr2cqi(double sinr,uint8_t trans_mode)
+{
+ // int flag_LA=0;
+
+ uint8_t retValue = 0;
+
+ if(flag_LA==0) {
+ // Ideal Channel Estimation
+ if (sinr<=-4.89)
+ retValue = (0);
+ else if (sinr < -3.53)
+ retValue = (3);
+ else if (sinr <= -1.93)
+ retValue = (4);
+ else if (sinr <= -0.43)
+ retValue = (5);
+ else if (sinr <= 1.11)
+ retValue = (6);
+ else if (sinr <= 3.26)
+ retValue = (7);
+ else if (sinr <= 5.0)
+ retValue = (8);
+ else if (sinr <= 7.0)
+ retValue = (9);
+ else if (sinr <= 9.0)
+ retValue = (10);
+ else if (sinr <= 11.0)
+ retValue = (11);
+ else if (sinr <= 13.0)
+ retValue = (12);
+ else if (sinr <= 15.5)
+ retValue = (13);
+ else if (sinr <= 17.5)
+ retValue = (14);
+ else
+ retValue = (15);
+ } else {
+ int h=0;
+ int trans_mode_tmp;
+
+ if (trans_mode ==5)
+ trans_mode_tmp=2;
+ else if(trans_mode ==6)
+ trans_mode_tmp=3;
+ else
+ trans_mode_tmp = trans_mode-1;
+
+ for(h=0; h<16; h++) {
+ if(sinr<=sinr_to_cqi[trans_mode_tmp][h])
+ retValue = (h);
+ }
+ }
+
+ LOG_D(PHY, "sinr=%f trans_mode=%d cqi=%d\n", sinr, trans_mode, retValue);
+ return retValue;
+}
+//uint32_t fill_subband_cqi(PHY_MEASUREMENTS *meas,uint8_t eNB_id) {
+//
+// uint8_t i;
+//// uint16_t cqivect = 0;
+// uint32_t cqivect = 0;
+//
+//// char diff_cqi;
+// int diff_cqi=0;
+//
+// for (i=0;i<NUMBER_OF_SUBBANDS;i++) {
+//
+// diff_cqi = -sinr2cqi(meas->wideband_cqi_dB[eNB_id][0]) + sinr2cqi(meas->subband_cqi_dB[eNB_id][0][i]);
+//
+// // Note, this is Table 7.2.1-2 from 36.213
+// if (diff_cqi<=-1)
+// diff_cqi = 3;
+// else if (diff_cqi>2)
+// diff_cqi = 2;
+// cqivect |= (diff_cqi<<(2*i));
+//
+// }
+//
+// return(cqivect);
+//}
+
+
+uint32_t fill_subband_cqi(PHY_MEASUREMENTS *meas,uint8_t eNB_id,uint8_t trans_mode,int nb_subbands)
+{
+
+ uint8_t i;
+
+ uint32_t cqivect = 0,offset=0;
+
+
+ int diff_cqi=0;
+
+ for (i=0; i<nb_subbands; i++) {
+
+ diff_cqi = -sinr2cqi(meas->wideband_cqi_avg[eNB_id],trans_mode) + sinr2cqi(meas->subband_cqi_tot_dB[eNB_id][i],trans_mode);
+
+ // Note, this is Table 7.2.1-2 from 36.213
+ if (diff_cqi<=-1)
+ offset = 3;
+ else if (diff_cqi>=2)
+ offset = 2;
+ else
+ offset=(uint32_t)diff_cqi;
+
+ cqivect |= (offset<<(2*i));
+
+ }
+
+ return(cqivect);
+}
+
+void fill_CQI(LTE_UE_ULSCH_t *ulsch,PHY_MEASUREMENTS *meas,uint8_t eNB_id,uint8_t harq_pid,int N_RB_DL,uint16_t rnti, uint8_t trans_mode, double sinr_eff)
+{
+
+ // printf("[PHY][UE] Filling CQI for eNB %d, meas->wideband_cqi_tot[%d] %d\n",
+ // eNB_id,eNB_id,meas->wideband_cqi_tot[eNB_id]);
+ double sinr_tmp;
+ uint8_t *o = ulsch->o;
+ UCI_format_t uci_format = ulsch->uci_format;
+
+ if(flag_LA==1)
+ sinr_tmp = sinr_eff;
+ else
+ sinr_tmp = (double) meas->wideband_cqi_avg[eNB_id];
+
+
+
+ //LOG_I(PHY,"[UE][UCI] Filling CQI format %d for eNB %d N_RB_DL %d\n",uci_format,eNB_id,N_RB_DL);
+
+ switch (N_RB_DL) {
+
+ case 6:
+ switch (uci_format) {
+ case wideband_cqi_rank1_2A:
+ ((wideband_cqi_rank1_2A_1_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((wideband_cqi_rank1_2A_1_5MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,6);
+ break;
+
+ case wideband_cqi_rank2_2A:
+ ((wideband_cqi_rank2_2A_1_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi
+ ((wideband_cqi_rank2_2A_1_5MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi
+ ((wideband_cqi_rank2_2A_1_5MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,6);
+ break;
+
+ case HLC_subband_cqi_nopmi:
+ ((HLC_subband_cqi_nopmi_1_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_nopmi_1_5MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,6);
+ break;
+
+ case HLC_subband_cqi_rank1_2A:
+ ((HLC_subband_cqi_rank1_2A_1_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_rank1_2A_1_5MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,6);
+ ((HLC_subband_cqi_rank1_2A_1_5MHz *)o)->pmi = quantize_wideband_pmi(meas,eNB_id);
+ break;
+
+ case HLC_subband_cqi_rank2_2A:
+ // This has to be improved!!!
+ ((HLC_subband_cqi_rank2_2A_1_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_rank2_2A_1_5MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,6);
+ ((HLC_subband_cqi_rank2_2A_1_5MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_rank2_2A_1_5MHz *)o)->diffcqi2 = fill_subband_cqi(meas,eNB_id,trans_mode,6);
+ ((HLC_subband_cqi_rank2_2A_1_5MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,6);
+ break;
+
+ case HLC_subband_cqi_mcs_CBA:
+ // this is the cba mcs uci for cba transmission
+ ((HLC_subband_cqi_mcs_CBA_1_5MHz *)o)->mcs = ulsch->harq_processes[harq_pid]->mcs;
+ ((HLC_subband_cqi_mcs_CBA_1_5MHz *)o)->crnti = rnti;
+ LOG_D(PHY,"fill uci for cba rnti %x, mcs %d \n", rnti, ulsch->harq_processes[harq_pid]->mcs);
+ break;
+
+ case ue_selected:
+ LOG_E(PHY,"fill_CQI ue_selected CQI not supported yet!!!\n");
+ AssertFatal(1==0,"fill_CQI ue_selected CQI not supported yet!!!");
+ break;
+
+ default:
+ LOG_E(PHY,"unsupported CQI mode (%d)!!!\n",uci_format);
+ AssertFatal(1==0,"unsupported CQI mode !!!");
+ break;
+
+ }
+
+ break;
+
+ case 25:
+ switch (uci_format) {
+ case wideband_cqi_rank1_2A:
+ ((wideband_cqi_rank1_2A_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((wideband_cqi_rank1_2A_5MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,7);
+ break;
+
+ case wideband_cqi_rank2_2A:
+ ((wideband_cqi_rank2_2A_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi
+ ((wideband_cqi_rank2_2A_5MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi
+ ((wideband_cqi_rank2_2A_5MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,7);
+ break;
+
+ case HLC_subband_cqi_nopmi:
+ ((HLC_subband_cqi_nopmi_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_nopmi_5MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,7);
+ break;
+
+ case HLC_subband_cqi_rank1_2A:
+ ((HLC_subband_cqi_rank1_2A_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_rank1_2A_5MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,7);
+ ((HLC_subband_cqi_rank1_2A_5MHz *)o)->pmi = quantize_wideband_pmi(meas,eNB_id);
+ break;
+
+ case HLC_subband_cqi_rank2_2A:
+ // This has to be improved!!!
+ ((HLC_subband_cqi_rank2_2A_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_rank2_2A_5MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,7);
+ ((HLC_subband_cqi_rank2_2A_5MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_rank2_2A_5MHz *)o)->diffcqi2 = fill_subband_cqi(meas,eNB_id,trans_mode,7);
+ ((HLC_subband_cqi_rank2_2A_5MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,7);
+ break;
+
+ case HLC_subband_cqi_mcs_CBA:
+ // this is the cba mcs uci for cba transmission
+ ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->mcs = ulsch->harq_processes[harq_pid]->mcs;
+ ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->crnti = rnti;
+ LOG_N(PHY,"fill uci for cba rnti %x, mcs %d \n", rnti, ulsch->harq_processes[harq_pid]->mcs);
+ break;
+
+ case ue_selected:
+ LOG_E(PHY,"fill_CQI ue_selected CQI not supported yet!!!\n");
+ AssertFatal(1==0,"fill_CQI ue_selected CQI not supported yet!!!");
+ break;
+
+ default:
+ LOG_E(PHY,"unsupported CQI mode (%d)!!!\n",uci_format);
+ AssertFatal(1==0,"unsupported CQI mode !!!");
+ break;
+
+ }
+
+ break;
+
+ case 50:
+ switch (uci_format) {
+ case wideband_cqi_rank1_2A:
+ ((wideband_cqi_rank1_2A_10MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((wideband_cqi_rank1_2A_10MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,9);
+ break;
+
+ case wideband_cqi_rank2_2A:
+ ((wideband_cqi_rank2_2A_10MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi
+ ((wideband_cqi_rank2_2A_10MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi
+ ((wideband_cqi_rank2_2A_10MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,9);
+ break;
+
+ case HLC_subband_cqi_nopmi:
+ ((HLC_subband_cqi_nopmi_10MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_nopmi_10MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,9);
+ break;
+
+ case HLC_subband_cqi_rank1_2A:
+ ((HLC_subband_cqi_rank1_2A_10MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_rank1_2A_10MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,9);
+ ((HLC_subband_cqi_rank1_2A_10MHz *)o)->pmi = quantize_wideband_pmi(meas,eNB_id);
+ break;
+
+ case HLC_subband_cqi_rank2_2A:
+ // This has to be improved!!!
+ ((HLC_subband_cqi_rank2_2A_10MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_rank2_2A_10MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,9);
+ ((HLC_subband_cqi_rank2_2A_10MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_rank2_2A_10MHz *)o)->diffcqi2 = fill_subband_cqi(meas,eNB_id,trans_mode,9);
+ ((HLC_subband_cqi_rank2_2A_10MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,9);
+ break;
+
+ case HLC_subband_cqi_mcs_CBA:
+ // this is the cba mcs uci for cba transmission
+ ((HLC_subband_cqi_mcs_CBA_10MHz *)o)->mcs = ulsch->harq_processes[harq_pid]->mcs;
+ ((HLC_subband_cqi_mcs_CBA_10MHz *)o)->crnti = rnti;
+ LOG_N(PHY,"fill uci for cba rnti %x, mcs %d \n", rnti, ulsch->harq_processes[harq_pid]->mcs);
+ break;
+
+ case ue_selected:
+ LOG_E(PHY,"fill_CQI ue_selected CQI not supported yet!!!\n");
+ AssertFatal(1==0,"fill_CQI ue_selected CQI not supported yet!!!");
+ break;
+
+ default:
+ LOG_E(PHY,"unsupported CQI mode (%d)!!!\n",uci_format);
+ AssertFatal(1==0,"unsupported CQI mode !!!");
+ break;
+
+ }
+
+ break;
+
+ case 100:
+ switch (uci_format) {
+ case wideband_cqi_rank1_2A:
+ ((wideband_cqi_rank1_2A_20MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((wideband_cqi_rank1_2A_20MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,13);
+ break;
+
+ case wideband_cqi_rank2_2A:
+ ((wideband_cqi_rank2_2A_20MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi
+ ((wideband_cqi_rank2_2A_20MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi
+ ((wideband_cqi_rank2_2A_20MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,13);
+ break;
+
+ case HLC_subband_cqi_nopmi:
+ ((HLC_subband_cqi_nopmi_20MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_nopmi_20MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,13);
+ break;
+
+ case HLC_subband_cqi_rank1_2A:
+ ((HLC_subband_cqi_rank1_2A_20MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_rank1_2A_20MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,13);
+ ((HLC_subband_cqi_rank1_2A_20MHz *)o)->pmi = quantize_wideband_pmi(meas,eNB_id);
+ break;
+
+ case HLC_subband_cqi_rank2_2A:
+ // This has to be improved!!!
+ ((HLC_subband_cqi_rank2_2A_20MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_rank2_2A_20MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,13);
+ ((HLC_subband_cqi_rank2_2A_20MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode);
+ ((HLC_subband_cqi_rank2_2A_20MHz *)o)->diffcqi2 = fill_subband_cqi(meas,eNB_id,trans_mode,13);
+ ((HLC_subband_cqi_rank2_2A_20MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,13);
+ break;
+
+ case HLC_subband_cqi_mcs_CBA:
+ // this is the cba mcs uci for cba transmission
+ ((HLC_subband_cqi_mcs_CBA_20MHz *)o)->mcs = ulsch->harq_processes[harq_pid]->mcs;
+ ((HLC_subband_cqi_mcs_CBA_20MHz *)o)->crnti = rnti;
+ LOG_N(PHY,"fill uci for cba rnti %x, mcs %d \n", rnti, ulsch->harq_processes[harq_pid]->mcs);
+ break;
+
+ case ue_selected:
+ LOG_E(PHY,"fill_CQI ue_selected CQI not supported yet!!!\n");
+ AssertFatal(1==0,"fill_CQI ue_selected CQI not supported yet!!!");
+ break;
+
+ default:
+ LOG_E(PHY,"unsupported CQI mode (%d)!!!\n",uci_format);
+ AssertFatal(1==0,"unsupported CQI mode !!!");
+ break;
+
+ }
+
+ break;
+
+ }
+
+
+}
+
+void reset_cba_uci(void *o)
+{
+ // this is the cba mcs uci for cba transmission
+ ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->mcs = 0; //fixme
+ ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->crnti = 0x0;
+}
+
+
+uint32_t pmi_extend(LTE_DL_FRAME_PARMS *frame_parms,uint8_t wideband_pmi, uint8_t rank)
+{
+
+ uint8_t i,wideband_pmi2;
+ uint32_t pmi_ex = 0;
+
+ if (frame_parms->N_RB_DL!=25) {
+ LOG_E(PHY,"pmi_extend not yet implemented for anything else than 25PRB\n");
+ return(-1);
+ }
+
+ if (rank==0) {
+ wideband_pmi2=wideband_pmi&3;
+ for (i=0; i<14; i+=2)
+ pmi_ex|=(wideband_pmi2<<i);
+ }
+ else if (rank==1) {
+ wideband_pmi2=wideband_pmi&1;
+ for (i=0; i<7; i++)
+ pmi_ex|=(wideband_pmi2<<i);
+ }
+ else {
+ LOG_E(PHY,"unsupported rank\n");
+ return(-1);
+ }
+
+ return(pmi_ex);
+}
+
+
+int generate_ue_ulsch_params_from_dci(void *dci_pdu,
+ uint16_t rnti,
+ uint8_t subframe,
+ DCI_format_t dci_format,
+ PHY_VARS_UE *ue,
+ UE_rxtx_proc_t *proc,
+ uint16_t si_rnti,
+ uint16_t ra_rnti,
+ uint16_t p_rnti,
+ uint16_t cba_rnti,
+ uint8_t eNB_id,
+ uint8_t use_srs)
+{
+
+ uint8_t harq_pid;
+ uint8_t transmission_mode = ue->transmission_mode[eNB_id];
+ ANFBmode_t AckNackFBMode;
+ LTE_UE_ULSCH_t *ulsch = ue->ulsch[eNB_id];
+ LTE_UE_DLSCH_t **dlsch = ue->dlsch[ue->current_thread_id[subframe]][0];
+ PHY_MEASUREMENTS *meas = &ue->measurements;
+ LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
+ // uint32_t current_dlsch_cqi = ue->current_dlsch_cqi[eNB_id];
+
+ if(frame_parms->frame_type == TDD)
+ {
+ AckNackFBMode = ue->pucch_config_dedicated[eNB_id].tdd_AckNackFeedbackMode;
+ }
+ else
+ {
+ AckNackFBMode = 1; // 1: multiplexing for FDD
+ }
+
+ uint32_t cqi_req;
+ uint32_t dai=3;
+ uint32_t cshift;
+ uint32_t TPC;
+ uint32_t ndi;
+ uint32_t mcs;
+ uint32_t rballoc,RIV_max;
+ uint16_t* RIV2first_rb_LUT;
+ uint16_t* RIV2nb_rb_LUT;
+
+ // uint32_t hopping;
+ // uint32_t type;
+
+ if (dci_format == format0) {
+
+ if (!ulsch)
+ return -1;
+
+ if (rnti == ra_rnti)
+ harq_pid = 0;
+ else
+ harq_pid = subframe2harq_pid(frame_parms,
+ pdcch_alloc2ul_frame(frame_parms,proc->frame_rx,subframe),
+ pdcch_alloc2ul_subframe(frame_parms,subframe));
+ LOG_D(PHY,"Frame %d, Subframe %d: Programming ULSCH for (%d.%d) => harq_pid %d\n",
+ proc->frame_rx,subframe,
+ pdcch_alloc2ul_frame(frame_parms,proc->frame_rx,subframe),
+ pdcch_alloc2ul_subframe(frame_parms,subframe), harq_pid);
+
+ if (harq_pid == 255) {
+ LOG_E(PHY, "frame %d, subframe %d, rnti %x, format %d: illegal harq_pid!\n",
+ proc->frame_rx, subframe, rnti, dci_format);
+ return(-1);
+ }
+
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ if (frame_parms->frame_type == TDD) {
+ cqi_req = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cqi_req;
+ dai = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->dai;
+ cshift = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ ndi = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi;
+ mcs = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->hopping=hopping;
+ // type = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->type;
+ } else {
+ cqi_req = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cqi_req;
+ cshift = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->ndi;
+ mcs = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->hopping=hopping;
+ // type = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->type;
+ }
+
+ RIV_max = RIV_max6;
+ RIV2first_rb_LUT = RIV2first_rb_LUT6;
+ RIV2nb_rb_LUT = RIV2nb_rb_LUT6;
+
+ break;
+
+ case 25:
+ if (frame_parms->frame_type == TDD) {
+ cqi_req = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cqi_req;
+ dai = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->dai;
+ cshift = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ ndi = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->ndi;
+ mcs = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->hopping=hopping;
+ // type = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->type;
+ } else {
+ cqi_req = ((DCI0_5MHz_FDD_t *)dci_pdu)->cqi_req;
+ cshift = ((DCI0_5MHz_FDD_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_5MHz_FDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI0_5MHz_FDD_t *)dci_pdu)->ndi;
+ mcs = ((DCI0_5MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_5MHz_FDD_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_5MHz_FDD_t *)dci_pdu)->hopping=hopping;
+ // type = ((DCI0_5MHz_FDD_t *)dci_pdu)->type;
+ }
+
+ RIV_max = RIV_max25;
+ RIV2first_rb_LUT = RIV2first_rb_LUT25;
+ RIV2nb_rb_LUT = RIV2nb_rb_LUT25;
+ // printf("***********rballoc %d, first_rb %d, nb_rb %d (dci %p)\n",rballoc,ulsch->harq_processes[harq_pid]->first_rb,ulsch->harq_processes[harq_pid]->nb_rb,dci_pdu);
+ break;
+
+ case 50:
+ if (frame_parms->frame_type == TDD) {
+ cqi_req = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cqi_req;
+ dai = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->dai;
+ cshift = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ ndi = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->ndi;
+ mcs = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->hopping=hopping;
+ // type = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->type;
+ } else {
+ cqi_req = ((DCI0_10MHz_FDD_t *)dci_pdu)->cqi_req;
+ cshift = ((DCI0_10MHz_FDD_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_10MHz_FDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI0_10MHz_FDD_t *)dci_pdu)->ndi;
+ mcs = ((DCI0_10MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_10MHz_FDD_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_10MHz_FDD_t *)dci_pdu)->hopping=hopping;
+ // type = ((DCI0_10MHz_FDD_t *)dci_pdu)->type;
+ }
+
+ RIV_max = RIV_max50;
+ RIV2first_rb_LUT = RIV2first_rb_LUT50;
+ RIV2nb_rb_LUT = RIV2nb_rb_LUT50;
+
+ break;
+
+ case 100:
+ if (frame_parms->frame_type == TDD) {
+ cqi_req = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cqi_req;
+ dai = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->dai;
+ cshift = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ ndi = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->ndi;
+ mcs = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->hopping=hopping;
+ // type = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->type;
+ } else {
+ cqi_req = ((DCI0_20MHz_FDD_t *)dci_pdu)->cqi_req;
+ cshift = ((DCI0_20MHz_FDD_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_20MHz_FDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI0_20MHz_FDD_t *)dci_pdu)->ndi;
+ mcs = ((DCI0_20MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_20MHz_FDD_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_20MHz_FDD_t *)dci_pdu)->hopping=hopping;
+ // type = ((DCI0_20MHz_FDD_t *)dci_pdu)->type;
+ }
+
+ RIV_max = RIV_max100;
+ RIV2first_rb_LUT = RIV2first_rb_LUT100;
+ RIV2nb_rb_LUT = RIV2nb_rb_LUT100;
+
+ // printf("rb_alloc (20 MHz dci) %d\n",rballoc);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+
+
+ if (rballoc > RIV_max) {
+ LOG_E(PHY,"frame %d, subframe %d, rnti %x, format %d: FATAL ERROR: generate_ue_ulsch_params_from_dci, rb_alloc[%d] > RIV_max[%d]\n",
+ proc->frame_rx, subframe, rnti, dci_format,rballoc,RIV_max);
+ LOG_E(PHY,"Wrong DCI0 detection, do not transmit PUSCH for HARQID: %d\n",harq_pid);
+ ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 0;
+ return(-1);
+ }
+
+
+ // indicate that this process is to be serviced in subframe n+4
+ if ((rnti >= cba_rnti) && (rnti < p_rnti))
+ ulsch->harq_processes[harq_pid]->subframe_cba_scheduling_flag = 1; //+=1 this indicates the number of dci / cba group: not supported in the data struct
+ else
+ {
+ ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
+ //LOG_I(PHY,"[HARQ-UL harqId: %d] DCI0 ==> subframe_scheduling_flag = %d round: %d\n", harq_pid, ulsch->harq_processes[harq_pid]->subframe_scheduling_flag, ulsch->harq_processes[harq_pid]->round);
+
+ }
+
+ ulsch->harq_processes[harq_pid]->TPC = TPC;
+ ulsch->harq_processes[harq_pid]->first_rb = RIV2first_rb_LUT[rballoc];
+ ulsch->harq_processes[harq_pid]->nb_rb = RIV2nb_rb_LUT[rballoc];
+
+ if (ue->ul_power_control_dedicated[eNB_id].accumulationEnabled == 1) {
+ LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ACC) %d, adjusting by %d (TPC %d)\n",
+ ue->Mod_id,harq_pid,proc->frame_rx,subframe,ulsch->f_pusch,
+ delta_PUSCH_acc[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC],
+ ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC);
+ ulsch->f_pusch += delta_PUSCH_acc[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC];
+ } else {
+ LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ABS) %d, adjusting to %d (TPC %d)\n",
+ ue->Mod_id,harq_pid,proc->frame_rx,subframe,ulsch->f_pusch,
+ delta_PUSCH_abs[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC],
+ ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC);
+ ulsch->f_pusch = delta_PUSCH_abs[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC];
+ }
+
+ if (ulsch->harq_processes[harq_pid]->first_tx==1) {
+ // ulsch->harq_processes[harq_pid]->Ndi = 1;
+ ulsch->harq_processes[harq_pid]->first_tx=0;
+ ulsch->harq_processes[harq_pid]->DCINdi= ndi;
+ ulsch->harq_processes[harq_pid]->round = 0;
+ } else {
+ if (ulsch->harq_processes[harq_pid]->DCINdi!=ndi) { // new SDU opportunity
+ // ulsch->harq_processes[harq_pid]->Ndi = 1;
+ ulsch->harq_processes[harq_pid]->DCINdi= ndi;
+ ulsch->harq_processes[harq_pid]->round = 0;
+ } else {
+ // ulsch->harq_processes[harq_pid]->Ndi = 0;
+ //ulsch->harq_processes[harq_pid]->round++; // This is done in phich RX
+
+ //#ifdef DEBUG_PHICH
+ //LOG_I(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d Adaptative Retrans, NDI not toggled => Nack. maxHARQ_Tx %d \n",
+ // ue->Mod_id,harq_pid,
+ // proc->frame_rx,
+ // subframe,
+ // ulsch->Mlimit);
+ //#endif
+/*
+ if (ulsch->harq_processes[harq_pid]->round > 0) // NACK detected on phich
+ {
+ // ulsch->harq_processes[harq_pid]->round++; already done on phich_rx
+ // ulsch->harq_processes[harq_pid] = ulsch->harq_processes[8];
+ // LOG_I(PHY," Adaptative retransmission - copy temporary harq Process to current harq process. [harqId %d round %d] \n",harq_pid, ulsch->harq_processes[8]->round);
+
+ if (ulsch->harq_processes[harq_pid]->round >= ulsch->Mlimit) //UE_mac_inst[eNB_id].scheduling_info.maxHARQ_Tx)
+ {
+ ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 0;
+ ulsch->harq_processes[harq_pid]->round = 0;
+ ulsch->harq_processes[harq_pid]->status = IDLE;
+ //LOG_I(PHY," PUSCH MAX Retransmission acheived ==> flush harq buff (%d) \n",harq_pid);
+ //LOG_I(PHY," [HARQ-UL harqId: %d] Adaptative retransmission NACK MAX RETRANS(%d) ==> subframe_scheduling_flag = %d round: %d\n", harq_pid, UE_mac_inst[eNB_id].scheduling_info.maxHARQ_Tx, ulsch->harq_processes[harq_pid]->subframe_scheduling_flag, ulsch->harq_processes[harq_pid]->round);
+ }
+ else
+ {
+ // ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
+ uint8_t rv_table[4] = {0, 2, 3, 1};
+ ulsch->harq_processes[harq_pid]->rvidx = rv_table[ulsch->harq_processes[harq_pid]->round&3];
+ ulsch->O_RI = 0;
+ ulsch->O = 0;
+ ulsch->uci_format = HLC_subband_cqi_nopmi;
+ //LOG_I(PHY," [HARQ-UL harqId: %d] Adaptative retransmission NACK ==> subframe_scheduling_flag = %d round: %d\n", harq_pid, ulsch->harq_processes[harq_pid]->subframe_scheduling_flag,ulsch->harq_processes[harq_pid]->round);
+ }
+ }
+*/
+ }
+ }
+
+ ulsch->harq_processes[harq_pid]->n_DMRS = cshift;
+
+ //printf("nb_rb %d, first_rb %d (RIV %d)\n",ulsch->harq_processes[harq_pid]->nb_rb,ulsch->harq_processes[harq_pid]->first_rb,rballoc);
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ // ulsch->cba_rnti[0]=rnti;
+ } else {
+ ulsch->rnti = rnti;
+ }
+
+ // printf("[PHY][UE] DCI format 0: harq_pid %d nb_rb %d, rballoc %d\n",harq_pid,ulsch->harq_processes[harq_pid]->nb_rb,
+ // ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->rballoc);
+ //Mapping of cyclic shift field in DCI format0 to n_DMRS2 (3GPP 36.211, Table 5.5.2.1.1-1)
+ if(cshift == 0)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 0;
+ else if(cshift == 1)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 6;
+ else if(cshift == 2)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 3;
+ else if(cshift == 3)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 4;
+ else if(cshift == 4)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 2;
+ else if(cshift == 5)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 8;
+ else if(cshift == 6)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 10;
+ else if(cshift == 7)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 9;
+
+
+ //reserved for cooperative communication
+ /*
+ if(ulsch->n_DMRS2 == 6)
+ ulsch->cooperation_flag = 2;
+ else
+ ulsch->cooperation_flag = 0;
+ */
+
+ if ((ulsch->harq_processes[harq_pid]->nb_rb>0) && (ulsch->harq_processes[harq_pid]->nb_rb < 25))
+ ulsch->power_offset = ue_power_offsets[ulsch->harq_processes[harq_pid]->nb_rb-1];
+
+ // if (ulsch->harq_processes[harq_pid]->Ndi == 1)
+ // ulsch->harq_processes[harq_pid]->status = ACTIVE;
+
+
+ if (cqi_req == 1) {
+
+ if( (AntennaInfoDedicated__transmissionMode_tm3 == transmission_mode) || (AntennaInfoDedicated__transmissionMode_tm4 == transmission_mode) )
+ {
+ ulsch->O_RI = 1;
+ }
+ else
+ {
+ ulsch->O_RI = 0;
+ }
+ //ulsch->O_RI = 0; //we only support 2 antenna ports, so this is always 1 according to 3GPP 36.213 Table
+
+ switch(transmission_mode) {
+ // The aperiodic CQI reporting mode is fixed for every transmission mode instead of being configured by higher layer signaling
+ case 1:
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_mcs_CBA;
+ ulsch->o_RI[0] = 0;
+ } else if(meas->rank[eNB_id] == 0) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_nopmi;
+ ulsch->o_RI[0] = 0;
+ } else {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_nopmi;
+ ulsch->o_RI[0] = 1;
+ }
+
+ break;
+
+ case 2:
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_mcs_CBA;
+ ulsch->o_RI[0] = 0;
+ } else if(meas->rank[eNB_id] == 0) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_nopmi;
+ ulsch->o_RI[0] = 0;
+ } else {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_nopmi;
+ ulsch->o_RI[0] = 1;
+ }
+
+ break;
+
+ case 3:
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_mcs_CBA;
+ ulsch->o_RI[0] = 0;
+ } else if(meas->rank[eNB_id] == 0) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_nopmi;
+ ulsch->o_RI[0] = 0;
+ } else {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_nopmi;
+ ulsch->o_RI[0] = 1;
+ }
+
+ break;
+
+ case 4:
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_mcs_CBA;
+ ulsch->o_RI[0] = 0;
+ } else if(meas->rank[eNB_id] == 0) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_wideband_cqi_rank1_2A_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_wideband_cqi_rank1_2A_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_wideband_cqi_rank1_2A_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_wideband_cqi_rank1_2A_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = wideband_cqi_rank1_2A;
+ ulsch->o_RI[0] = 0;
+ } else {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_wideband_cqi_rank2_2A_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_wideband_cqi_rank2_2A_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_wideband_cqi_rank2_2A_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_wideband_cqi_rank2_2A_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = wideband_cqi_rank2_2A;
+ ulsch->o_RI[0] = 1;
+ }
+
+ break;
+
+ case 5:
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_mcs_CBA;
+ ulsch->o_RI[0] = 0;
+ } else if(meas->rank[eNB_id] == 0) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_wideband_cqi_rank1_2A_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_wideband_cqi_rank1_2A_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_wideband_cqi_rank1_2A_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_wideband_cqi_rank1_2A_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = wideband_cqi_rank1_2A;
+ ulsch->o_RI[0] = 0;
+ } else {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_wideband_cqi_rank2_2A_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_wideband_cqi_rank2_2A_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_wideband_cqi_rank2_2A_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_wideband_cqi_rank2_2A_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = wideband_cqi_rank2_2A;
+ ulsch->o_RI[0] = 1;
+ }
+
+ break;
+
+ case 6:
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_mcs_CBA;
+ ulsch->o_RI[0] = 0;
+ } else if(meas->rank[eNB_id] == 0) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_wideband_cqi_rank1_2A_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_wideband_cqi_rank1_2A_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_wideband_cqi_rank1_2A_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_wideband_cqi_rank1_2A_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = wideband_cqi_rank1_2A;
+ ulsch->o_RI[0] = 0;
+ } else {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_wideband_cqi_rank2_2A_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_wideband_cqi_rank2_2A_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_wideband_cqi_rank2_2A_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_wideband_cqi_rank2_2A_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = wideband_cqi_rank2_2A;
+ ulsch->o_RI[0] = 1;
+ }
+
+ break;
+
+ case 7:
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_mcs_CBA;
+ ulsch->o_RI[0] = 0;
+ } else if(meas->rank[eNB_id] == 0) {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_nopmi;
+ ulsch->o_RI[0] = 0;
+ } else {
+ switch (ue->frame_parms.N_RB_DL) {
+ case 6:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz;
+ break;
+
+ case 50:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz;
+ break;
+
+ case 100:
+ ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz;
+ break;
+ }
+
+ ulsch->uci_format = HLC_subband_cqi_nopmi;
+ ulsch->o_RI[0] = 1;
+ }
+
+ break;
+
+ default:
+ LOG_E(PHY,"Incorrect Transmission Mode \n");
+ break;
+ }
+ } else {
+ ulsch->O_RI = 0;
+ ulsch->O = 0;
+ ulsch->uci_format = HLC_subband_cqi_nopmi;
+ }
+
+ print_CQI(ulsch->o,ulsch->uci_format,eNB_id,ue->frame_parms.N_RB_DL);
+
+ ulsch->bundling = 1-AckNackFBMode;
+
+ if (frame_parms->frame_type == FDD) {
+ //int dl_subframe = (subframe<4) ? (subframe+6) : (subframe-4);
+ int dl_subframe = subframe;
+
+ if (ue->dlsch[ue->current_thread_id[subframe]][eNB_id][0]->harq_ack[dl_subframe].send_harq_status>0) { // we have downlink transmission
+ ulsch->harq_processes[harq_pid]->O_ACK = 1;
+ } else {
+ ulsch->harq_processes[harq_pid]->O_ACK = 0;
+ }
+ /*LOG_I(PHY,"DCI 0 Processing: dl_subframe %d send_harq_status Odd %d send_harq_status Even %d harq_pid %d O_ACK %d\n", dl_subframe,
+ ue->dlsch[0][eNB_id][0]->harq_ack[dl_subframe].send_harq_status,
+ ue->dlsch[1][eNB_id][0]->harq_ack[dl_subframe].send_harq_status,
+ harq_pid,
+ ulsch->harq_processes[harq_pid]->O_ACK);*/
+
+ } else {
+ if (ulsch->bundling)
+ ulsch->harq_processes[harq_pid]->O_ACK = (dai == 3)? 0 : 1;
+ else
+ ulsch->harq_processes[harq_pid]->O_ACK = (dai >= 2)? 2 : (dai+1)&3; //(dai+1)&3;
+
+ // ulsch->harq_processes[harq_pid]->V_UL_DAI = dai+1;
+ }
+
+ dlsch[0]->harq_ack[subframe].vDAI_UL = dai+1;
+
+
+ LOG_D(PHY, "[PUSCH %d] Format0 DCI %s, CQI_req=%d, cshift=%d, TPC=%d, DAI=%d, vDAI_UL[sf#%d]=%d, NDI=%d, MCS=%d, RBalloc=%d, first_rb=%d, harq_pid=%d, nb_rb=%d, subframe_scheduling_flag=%d"
+ " ulsch->bundling %d, O_ACK %d \n",
+ harq_pid,
+ (frame_parms->frame_type == TDD? "TDD" : "FDD"),
+ cqi_req, cshift, TPC, dai, subframe, dlsch[0]->harq_ack[subframe].vDAI_UL, ndi, mcs, rballoc,
+ ulsch->harq_processes[harq_pid]->first_rb, harq_pid, ulsch->harq_processes[harq_pid]->nb_rb,
+ ulsch->harq_processes[harq_pid]->subframe_scheduling_flag,
+ ulsch->bundling,
+ ulsch->harq_processes[harq_pid]->O_ACK);
+
+ LOG_D(PHY,"Setting beta_offset_cqi_times8 to %d, index %d\n",
+ beta_cqi[ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index],
+ ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index);
+
+ ulsch->beta_offset_cqi_times8 = beta_cqi[ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index];//18;
+ ulsch->beta_offset_ri_times8 = beta_ri[ue->pusch_config_dedicated[eNB_id].betaOffset_RI_Index];//10;
+ ulsch->beta_offset_harqack_times8 = beta_ack[ue->pusch_config_dedicated[eNB_id].betaOffset_ACK_Index];//16;
+
+ ulsch->Nsymb_pusch = 12-(frame_parms->Ncp<<1)-(use_srs==0?0:1);
+ ulsch->srs_active = use_srs;
+
+ if ((rnti >= cba_rnti) && (rnti < p_rnti))
+ ulsch->harq_processes[harq_pid]->status = CBA_ACTIVE;
+ else
+ ulsch->harq_processes[harq_pid]->status = ACTIVE;
+
+ ulsch->harq_processes[harq_pid]->rvidx = 0;
+
+ // ulsch->harq_processes[harq_pid]->calibration_flag =0;
+ if (mcs < 29) {
+ ulsch->harq_processes[harq_pid]->mcs = mcs;
+ // ulsch->harq_processes[harq_pid]->round = 0;
+ } else {
+ ulsch->harq_processes[harq_pid]->rvidx = mcs - 28;
+ if (ulsch->harq_processes[harq_pid]->round == 0) {
+ LOG_W(PHY,"PUSCH::mcs = %d and DCI0::mcs(%d) > 28 and round == %d\n", ulsch->harq_processes[harq_pid]->mcs, mcs, ulsch->harq_processes[harq_pid]->round);
+ } else {
+ LOG_D(PHY,"PUSCH::mcs = %d and DCI0::mcs(%d) > 28 and round == %d\n", ulsch->harq_processes[harq_pid]->mcs, mcs, ulsch->harq_processes[harq_pid]->round);
+ }
+ //LOG_E(PHY,"Fatal: mcs(%d) > 28!!! and round == 0\n", mcs);
+ }
+ ulsch->harq_processes[harq_pid]->TBS = TBStable[get_I_TBS_UL(ulsch->harq_processes[harq_pid]->mcs)][ulsch->harq_processes[harq_pid]->nb_rb-1];
+
+ /*
+ else if (ulsch->harq_processes[harq_pid]->mcs == 29) {
+ ulsch->harq_processes[harq_pid]->mcs = 4;
+ ulsch->harq_processes[harq_pid]->TBS = TBStable[get_I_TBS_UL(ulsch->harq_processes[harq_pid]->mcs)][ulsch->harq_processes[harq_pid]->nb_rb-1];
+ // ulsch->harq_processes[harq_pid]->calibration_flag =1;
+ // printf("Auto-Calibration (UE): mcs %d, TBS %d, nb_rb %d\n",ulsch->harq_processes[harq_pid]->mcs,ulsch->harq_processes[harq_pid]->TBS,ulsch->harq_processes[harq_pid]->nb_rb);
+ }*/
+ ulsch->harq_processes[harq_pid]->Msc_initial = 12*ulsch->harq_processes[harq_pid]->nb_rb;
+ ulsch->harq_processes[harq_pid]->Nsymb_initial = ulsch->Nsymb_pusch;
+
+ // a Ndi=1 automatically acknowledges previous PUSCH transmission
+ if (ue->ulsch_Msg3_active[eNB_id] == 1)
+ ue->ulsch_Msg3_active[eNB_id] = 0;
+
+ LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d, subframe %d : Programming PUSCH with n_DMRS2 %d (cshift %d), nb_rb %d, first_rb %d, mcs %d, round %d, rv %d, ulsch_ue_Msg3_active %d, cqi_req %d => O %d\n",
+ ue->Mod_id,harq_pid,
+ proc->frame_rx,subframe,ulsch->harq_processes[harq_pid]->n_DMRS2,cshift,ulsch->harq_processes[harq_pid]->nb_rb,ulsch->harq_processes[harq_pid]->first_rb,
+ ulsch->harq_processes[harq_pid]->mcs,ulsch->harq_processes[harq_pid]->round,ulsch->harq_processes[harq_pid]->rvidx, ue->ulsch_Msg3_active[eNB_id],cqi_req,ulsch->O);
+
+ // ulsch->n_DMRS2 = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift;
+
+#ifdef UE_DEBUG_TRACE
+
+ LOG_D(PHY,"Format 0 DCI : ulsch (ue): AbsSubframe %d.%d\n",proc->frame_rx%1024,subframe);
+ LOG_D(PHY,"Format 0 DCI : ulsch (ue): NBRB %d\n",ulsch->harq_processes[harq_pid]->nb_rb);
+ LOG_D(PHY,"Format 0 DCI :ulsch (ue): first_rb %d\n",ulsch->harq_processes[harq_pid]->first_rb);
+ LOG_D(PHY,"Format 0 DCI :ulsch (ue): rballoc %d\n",rballoc);
+ LOG_D(PHY,"Format 0 DCI :ulsch (ue): harq_pid %d\n",harq_pid);
+ LOG_D(PHY,"Format 0 DCI :ulsch (ue): first_tx %d\n",ulsch->harq_processes[harq_pid]->first_tx);
+ LOG_D(PHY,"Format 0 DCI :ulsch (ue): DCINdi %d\n",ulsch->harq_processes[harq_pid]->DCINdi);
+ LOG_D(PHY,"Format 0 DCI :ulsch (ue): round %d\n",ulsch->harq_processes[harq_pid]->round);
+ //LOG_I(PHY,"Format 0 DCI :ulsch (ue): TBS %d\n",ulsch->harq_processes[harq_pid]->TBS);
+ LOG_D(PHY,"Format 0 DCI :ulsch (ue): mcs %d\n",ulsch->harq_processes[harq_pid]->mcs);
+ //LOG_I(PHY,"Format 0 DCI :ulsch (ue): O %d\n",ulsch->O);
+ //LOG_I(PHY,"Format 0 DCI :ulsch (ue): cqiReq %d\n",cqi_req);
+ //if (frame_parms->frame_type == TDD)
+ // LOG_I(PHY,"Format 0 DCI :ulsch (ue): O_ACK/DAI %d/%d\n",ulsch->harq_processes[harq_pid]->O_ACK,dai);
+ //else
+ // LOG_I(PHY,"Format 0 DCI :ulsch (ue): O_ACK %d\n",ulsch->harq_processes[harq_pid]->O_ACK);
+
+ LOG_D(PHY,"Format 0 DCI :ulsch (ue): Nsymb_pusch %d\n",ulsch->Nsymb_pusch);
+ LOG_D(PHY,"Format 0 DCI :ulsch (ue): cshift %d\n",ulsch->harq_processes[harq_pid]->n_DMRS2);
+ LOG_D(PHY,"Format 0 DCI :ulsch (ue): phich status %d\n",ulsch->harq_processes[harq_pid]->status);
+#else
+ UNUSED_VARIABLE(dai);
+#endif
+ return(0);
+ } else {
+ LOG_E(PHY,"frame %d, subframe %d: FATAL ERROR, generate_ue_ulsch_params_from_dci, Illegal dci_format %d\n",
+ proc->frame_rx, subframe,dci_format);
+ return(-1);
+ }
+
+}
+
+/*
+int generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB *eNB,
+ eNB_rxtx_proc_t *proc,
+ void *dci_pdu,
+ uint16_t rnti,
+ DCI_format_t dci_format,
+ uint8_t UE_id,
+ uint16_t si_rnti,
+ uint16_t ra_rnti,
+ uint16_t p_rnti,
+ uint16_t cba_rnti,
+ uint8_t use_srs)
+{
+
+ uint8_t harq_pid;
+ uint32_t rb_alloc;
+ uint8_t transmission_mode=eNB->transmission_mode[UE_id];
+ ANFBmode_t AckNackFBMode = eNB->pucch_config_dedicated[UE_id].tdd_AckNackFeedbackMode;
+ LTE_eNB_ULSCH_t *ulsch=eNB->ulsch[UE_id];
+ LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
+ int subframe = proc->subframe_tx;
+
+ uint32_t cqi_req = 0;
+ uint32_t dai = 0;
+ uint32_t cshift = 0;
+ uint32_t TPC = 0;
+ uint32_t mcs = 0;
+ uint32_t rballoc = UINT32_MAX;
+ uint32_t RIV_max = 0;
+ // uint32_t hopping;
+ // uint32_t type;
+
+#ifdef DEBUG_DCI
+ printf("filling eNB ulsch params for rnti %x, dci format %d, dci %x, subframe %d\n",
+ rnti,dci_format,*(uint32_t*)dci_pdu,subframe);
+#endif
+
+ if (dci_format == format0) {
+
+ harq_pid = subframe2harq_pid(frame_parms,
+ pdcch_alloc2ul_frame(frame_parms,
+ proc->frame_tx,
+ subframe),
+ pdcch_alloc2ul_subframe(frame_parms,subframe));
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ if (frame_parms->frame_type == TDD) {
+ cqi_req = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cqi_req;
+ dai = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->dai;
+ cshift = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ mcs = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->hopping=hopping;
+ // type = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->type;
+ } else {
+ cqi_req = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cqi_req;
+ cshift = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->TPC;
+ mcs = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->hopping=hopping;
+ // type = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->type;
+ }
+
+ RIV_max = RIV_max6;
+ ulsch->harq_processes[harq_pid]->first_rb = RIV2first_rb_LUT6[rballoc];
+ ulsch->harq_processes[harq_pid]->nb_rb = RIV2nb_rb_LUT6[rballoc];
+
+ break;
+
+ case 25:
+ if (frame_parms->frame_type == TDD) {
+ cqi_req = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cqi_req;
+ dai = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->dai;
+ cshift = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ mcs = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->hopping;
+ // type = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->type;
+ } else {
+ cqi_req = ((DCI0_5MHz_FDD_t *)dci_pdu)->cqi_req;
+ cshift = ((DCI0_5MHz_FDD_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_5MHz_FDD_t *)dci_pdu)->TPC;
+ mcs = ((DCI0_5MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_5MHz_FDD_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_5MHz_FDD_t *)dci_pdu)->hopping;
+ // type = ((DCI0_5MHz_FDD_t *)dci_pdu)->type;
+ }
+
+ RIV_max = RIV_max25;
+ ulsch->harq_processes[harq_pid]->first_rb = RIV2first_rb_LUT25[rballoc];
+ ulsch->harq_processes[harq_pid]->nb_rb = RIV2nb_rb_LUT25[rballoc];
+
+ break;
+
+ case 50:
+ if (frame_parms->frame_type == TDD) {
+ cqi_req = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cqi_req;
+ dai = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->dai;
+ cshift = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ mcs = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->hopping;
+ // type = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->type;
+ } else {
+ cqi_req = ((DCI0_10MHz_FDD_t *)dci_pdu)->cqi_req;
+ cshift = ((DCI0_10MHz_FDD_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_10MHz_FDD_t *)dci_pdu)->TPC;
+ mcs = ((DCI0_10MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_10MHz_FDD_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_10MHz_FDD_t *)dci_pdu)->hopping;
+ // type = ((DCI0_10MHz_FDD_t *)dci_pdu)->type;
+ }
+
+ RIV_max = RIV_max50;
+ ulsch->harq_processes[harq_pid]->first_rb = RIV2first_rb_LUT50[rballoc];
+ ulsch->harq_processes[harq_pid]->nb_rb = RIV2nb_rb_LUT50[rballoc];
+
+ break;
+
+ case 100:
+ if (frame_parms->frame_type == TDD) {
+ cqi_req = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cqi_req;
+ dai = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->dai;
+ cshift = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ mcs = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->hopping;
+ // type = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->type;
+ } else {
+ cqi_req = ((DCI0_20MHz_FDD_t *)dci_pdu)->cqi_req;
+ cshift = ((DCI0_20MHz_FDD_t *)dci_pdu)->cshift;
+ TPC = ((DCI0_20MHz_FDD_t *)dci_pdu)->TPC;
+ mcs = ((DCI0_20MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI0_20MHz_FDD_t *)dci_pdu)->rballoc;
+ // hopping = ((DCI0_20MHz_FDD_t *)dci_pdu)->hopping;
+ // type = ((DCI0_20MHz_FDD_t *)dci_pdu)->type;
+ }
+
+ RIV_max = RIV_max100;
+ ulsch->harq_processes[harq_pid]->first_rb = RIV2first_rb_LUT100[rballoc];
+ ulsch->harq_processes[harq_pid]->nb_rb = RIV2nb_rb_LUT100[rballoc];
+
+ //printf("eNB: rb_alloc (20 MHz dci) %d\n",rballoc);
+ break;
+
+ default:
+ LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
+ DevParam (frame_parms->N_RB_DL, 0, 0);
+ break;
+ }
+
+
+ rb_alloc = rballoc;
+ AssertFatal(rb_alloc>RIV_max,
+ "Format 0: rb_alloc (%d) > RIV_max (%d)\n",rb_alloc,RIV_max);
+#ifdef DEBUG_DCI
+ printf("generate_eNB_ulsch_params_from_dci: subframe %d, rnti %x,harq_pid %d,cqi_req %d\n",subframe,rnti,harq_pid,cqi_req);
+#endif
+
+ ulsch->harq_processes[harq_pid]->dci_alloc = 1;
+ ulsch->harq_processes[harq_pid]->rar_alloc = 0;
+ ulsch->harq_processes[harq_pid]->TPC = TPC;
+ ulsch->harq_processes[harq_pid]->n_DMRS = cshift;
+
+
+ if (cqi_req == 1) {
+ // 36.213 7.2.1 (release 10) says:
+ // "RI is only reported for transmission modes 3 and 4,
+ // as well as transmission modes 8 and 9 with PMI/RI reporting"
+ // This is for aperiodic reporting.
+ // TODO: deal with TM 8&9 correctly when they are implemented.
+ // TODO: deal with periodic reporting if we implement it.
+ //
+ if (transmission_mode == 3 || transmission_mode == 4)
+ ulsch->harq_processes[harq_pid]->O_RI = 1; //we only support 2 antenna ports, so this is always 1 according to 3GPP 36.213 Table
+ else
+ ulsch->harq_processes[harq_pid]->O_RI = 0;
+
+ switch(transmission_mode) {
+ // The aperiodic CQI reporting mode is fixed for every transmission mode instead of being configured by higher layer signaling
+ case 1:
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ ulsch->harq_processes[harq_pid]->Or2 = 0;
+
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_5MHz;
+ break;
+
+ case 50:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_10MHz;
+ break;
+
+ case 100:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_20MHz;
+ break;
+ }
+
+ ulsch->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_mcs_CBA;
+ } else {
+ ulsch->harq_processes[harq_pid]->Or2 = 0;
+
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_5MHz;
+ break;
+
+ case 50:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_10MHz;
+ break;
+
+ case 100:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_20MHz;
+ break;
+ }
+
+ ulsch->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_nopmi;
+ }
+
+ break;
+
+ case 2:
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ ulsch->harq_processes[harq_pid]->Or2 = 0;
+
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_5MHz;
+ break;
+
+ case 50:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_10MHz;
+ break;
+
+ case 100:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_20MHz;
+ break;
+ }
+
+ ulsch->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_mcs_CBA;
+ } else {
+ ulsch->harq_processes[harq_pid]->Or2 = 0;
+
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_5MHz;
+ break;
+
+ case 50:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_10MHz;
+ break;
+
+ case 100:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_20MHz;
+ break;
+ }
+
+ ulsch->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_nopmi;
+ }
+
+ break;
+
+ case 3:
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ ulsch->harq_processes[harq_pid]->Or2 = 0;
+
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_5MHz;
+ break;
+
+ case 50:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_10MHz;
+ break;
+
+ case 100:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_20MHz;
+ break;
+ }
+
+ ulsch->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_mcs_CBA;
+ } else {
+ ulsch->harq_processes[harq_pid]->Or2 = 0;
+
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_5MHz;
+ break;
+
+ case 50:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_10MHz;
+ break;
+
+ case 100:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_20MHz;
+ break;
+ }
+
+ ulsch->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_nopmi;
+ }
+
+ break;
+
+ case 4:
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ ulsch->harq_processes[harq_pid]->Or2 = 0;
+
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_5MHz;
+ break;
+
+ case 50:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_10MHz;
+ break;
+
+ case 100:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_20MHz;
+ break;
+ }
+
+ ulsch->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_mcs_CBA;
+ } else {
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ ulsch->harq_processes[harq_pid]->Or2 = sizeof_wideband_cqi_rank2_2A_1_5MHz;
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_wideband_cqi_rank1_2A_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->harq_processes[harq_pid]->Or2 = sizeof_wideband_cqi_rank2_2A_5MHz;
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_wideband_cqi_rank1_2A_5MHz;
+ break;
+
+ case 50:
+ ulsch->harq_processes[harq_pid]->Or2 = sizeof_wideband_cqi_rank2_2A_10MHz;
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_wideband_cqi_rank1_2A_10MHz;
+ break;
+
+ case 100:
+ ulsch->harq_processes[harq_pid]->Or2 = sizeof_wideband_cqi_rank2_2A_20MHz;
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_wideband_cqi_rank1_2A_20MHz;
+ break;
+
+ }
+
+ ulsch->harq_processes[harq_pid]->uci_format = wideband_cqi_rank1_2A;
+ }
+
+ break;
+
+ case 5:
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ ulsch->harq_processes[harq_pid]->Or2 = 0;
+
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_5MHz;
+ break;
+
+ case 50:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_10MHz;
+ break;
+
+ case 100:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_20MHz;
+ break;
+ }
+
+ ulsch->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_mcs_CBA;
+ } else {
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ ulsch->harq_processes[harq_pid]->Or2 = sizeof_wideband_cqi_rank2_2A_1_5MHz;
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_wideband_cqi_rank1_2A_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->harq_processes[harq_pid]->Or2 = sizeof_wideband_cqi_rank2_2A_5MHz;
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_wideband_cqi_rank1_2A_5MHz;
+ break;
+
+ case 50:
+ ulsch->harq_processes[harq_pid]->Or2 = sizeof_wideband_cqi_rank2_2A_10MHz;
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_wideband_cqi_rank1_2A_10MHz;
+ break;
+
+ case 100:
+ ulsch->harq_processes[harq_pid]->Or2 = sizeof_wideband_cqi_rank2_2A_20MHz;
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_wideband_cqi_rank1_2A_20MHz;
+ break;
+ }
+
+ ulsch->harq_processes[harq_pid]->uci_format = wideband_cqi_rank1_2A;
+ }
+
+ break;
+
+ case 6:
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ ulsch->harq_processes[harq_pid]->Or2 = 0;
+
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_5MHz;
+ break;
+
+ case 50:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_10MHz;
+ break;
+
+ case 100:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_mcs_CBA_20MHz;
+ break;
+ }
+
+ ulsch->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_mcs_CBA;
+ } else {
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ ulsch->harq_processes[harq_pid]->Or2 = sizeof_wideband_cqi_rank2_2A_1_5MHz;
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_wideband_cqi_rank1_2A_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->harq_processes[harq_pid]->Or2 = sizeof_wideband_cqi_rank2_2A_5MHz;
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_wideband_cqi_rank1_2A_5MHz;
+ break;
+
+ case 50:
+ ulsch->harq_processes[harq_pid]->Or2 = sizeof_wideband_cqi_rank2_2A_10MHz;
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_wideband_cqi_rank1_2A_10MHz;
+ break;
+
+ case 100:
+ ulsch->harq_processes[harq_pid]->Or2 = sizeof_wideband_cqi_rank2_2A_20MHz;
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_wideband_cqi_rank1_2A_20MHz;
+ break;
+ }
+
+ ulsch->harq_processes[harq_pid]->uci_format = wideband_cqi_rank1_2A;
+ }
+
+ break;
+
+ case 7:
+ ulsch->harq_processes[harq_pid]->Or2 = 0;
+
+ switch (frame_parms->N_RB_DL) {
+ case 6:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_1_5MHz;
+ break;
+
+ case 25:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_5MHz;
+ break;
+
+ case 50:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_10MHz;
+ break;
+
+ case 100:
+ ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_20MHz;
+ break;
+ }
+
+ ulsch->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_nopmi;
+ break;
+
+ default:
+ LOG_E(PHY,"Incorrect Transmission Mode \n");
+ break;
+ }
+ } else {
+ ulsch->harq_processes[harq_pid]->O_RI = 0;
+ ulsch->harq_processes[harq_pid]->Or2 = 0;
+ ulsch->harq_processes[harq_pid]->Or1 = 0;
+ ulsch->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_nopmi;
+ }
+
+ ulsch->bundling = 1-AckNackFBMode;
+
+ if (frame_parms->frame_type == FDD) {
+ int dl_subframe = (subframe<4) ? (subframe+6) : (subframe-4);
+
+ if (eNB->dlsch[UE_id][0]->subframe_tx[dl_subframe]>0) { // we have downlink transmission
+ ulsch->harq_processes[harq_pid]->O_ACK = 1;
+ } else {
+ ulsch->harq_processes[harq_pid]->O_ACK = 0;
+ }
+ } else {
+ if (ulsch->bundling)
+ ulsch->harq_processes[harq_pid]->O_ACK = (dai == 3)? 0 : 1;
+ else
+ ulsch->harq_processes[harq_pid]->O_ACK = (dai+1)&3;
+
+ ulsch->harq_processes[harq_pid]->V_UL_DAI = dai+1;
+ }
+
+ ulsch->beta_offset_cqi_times8 = beta_cqi[eNB->pusch_config_dedicated[UE_id].betaOffset_CQI_Index];//18;
+ ulsch->beta_offset_ri_times8 = beta_ri[eNB->pusch_config_dedicated[UE_id].betaOffset_RI_Index];//10;
+ ulsch->beta_offset_harqack_times8 = beta_ack[eNB->pusch_config_dedicated[UE_id].betaOffset_ACK_Index];//16;
+
+ ulsch->harq_processes[harq_pid]->Nsymb_pusch = 12-(frame_parms->Ncp<<1)-(use_srs==0?0:1);
+ ulsch->harq_processes[harq_pid]->srs_active = use_srs;
+
+ //Mapping of cyclic shift field in DCI format0 to n_DMRS2 (3GPP 36.211, Table 5.5.2.1.1-1)
+ if(cshift == 0)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 0;
+ else if(cshift == 1)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 6;
+ else if(cshift == 2)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 3;
+ else if(cshift == 3)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 4;
+ else if(cshift == 4)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 2;
+ else if(cshift == 5)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 8;
+ else if(cshift == 6)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 10;
+ else if(cshift == 7)
+ ulsch->harq_processes[harq_pid]->n_DMRS2 = 9;
+
+
+ LOG_D(PHY,"[eNB %d][PUSCH %d] Frame %d, subframe %d : Programming PUSCH with n_DMRS2 %d (cshift %d)\n",
+ eNB->Mod_id,harq_pid,proc->frame_tx,subframe,ulsch->harq_processes[harq_pid]->n_DMRS2,cshift);
+
+
+
+ if (ulsch->harq_processes[harq_pid]->round == 0) {
+ if ((rnti >= cba_rnti) && (rnti < p_rnti))
+ ulsch->harq_processes[harq_pid]->status = CBA_ACTIVE;
+ else
+ ulsch->harq_processes[harq_pid]->status = ACTIVE;
+
+ ulsch->harq_processes[harq_pid]->rvidx = 0;
+ ulsch->harq_processes[harq_pid]->mcs = mcs;
+ // ulsch->harq_processes[harq_pid]->calibration_flag = 0;
+ //if (ulsch->harq_processes[harq_pid]->mcs)
+ //
+ //if (ulsch->harq_processes[harq_pid]->mcs == 29) {
+ //ulsch->harq_processes[harq_pid]->mcs = 4;
+ // ulsch->harq_processes[harq_pid]->calibration_flag = 1;
+ // printf("Auto-Calibration (eNB): mcs %d, nb_rb %d\n",ulsch->harq_processes[harq_pid]->mcs,ulsch->harq_processes[harq_pid]->nb_rb);
+ //}
+
+ ulsch->harq_processes[harq_pid]->TBS = TBStable[get_I_TBS_UL(ulsch->harq_processes[harq_pid]->mcs)][ulsch->harq_processes[harq_pid]->nb_rb-1];
+
+ ulsch->harq_processes[harq_pid]->Msc_initial = 12*ulsch->harq_processes[harq_pid]->nb_rb;
+ ulsch->harq_processes[harq_pid]->Nsymb_initial = ulsch->harq_processes[harq_pid]->Nsymb_pusch;
+ ulsch->harq_processes[harq_pid]->round = 0;
+ } else {
+ if (mcs>28)
+ ulsch->harq_processes[harq_pid]->rvidx = mcs - 28;
+ else {
+ ulsch->harq_processes[harq_pid]->rvidx = 0;
+ ulsch->harq_processes[harq_pid]->mcs = mcs;
+ }
+
+ // ulsch->harq_processes[harq_pid]->round++;
+ }
+
+ if ((rnti >= cba_rnti) && (rnti < p_rnti)) {
+ ulsch->cba_rnti[0] = rnti;
+ } else {
+ ulsch->rnti = rnti;
+ }
+
+ //ulsch->n_DMRS2 = cshift;
+
+#ifdef DEBUG_DCI
+ printf("ulsch (eNB): NBRB %d\n",ulsch->harq_processes[harq_pid]->nb_rb);
+ printf("ulsch (eNB): first_rb %d\n",ulsch->harq_processes[harq_pid]->first_rb);
+ printf("ulsch (eNB): harq_pid %d\n",harq_pid);
+ printf("ulsch (eNB): round %d\n",ulsch->harq_processes[harq_pid]->round);
+ printf("ulsch (eNB): TBS %d\n",ulsch->harq_processes[harq_pid]->TBS);
+ printf("ulsch (eNB): mcs %d\n",ulsch->harq_processes[harq_pid]->mcs);
+ printf("ulsch (eNB): Or1 %d\n",ulsch->harq_processes[harq_pid]->Or1);
+ printf("ulsch (eNB): Nsymb_pusch %d\n",ulsch->harq_processes[harq_pid]->Nsymb_pusch);
+ printf("ulsch (eNB): cshift %d\n",ulsch->harq_processes[harq_pid]->n_DMRS2);
+#else
+ UNUSED_VARIABLE(dai);
+#endif
+ return(0);
+ } else {
+ LOG_E(PHY,"generate_eNB_ulsch_params_from_dci, Illegal dci_format %d\n",dci_format);
+ return(-1);
+ }
+
+}
+*/
+
+double sinr_eff_cqi_calc(PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe)
+{
+ uint8_t transmission_mode = ue->transmission_mode[eNB_id];
+ PHY_MEASUREMENTS *meas = &ue->measurements;
+ LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
+ int32_t **dl_channel_est = ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].dl_ch_estimates[eNB_id];
+ double *s_dB;
+ s_dB = ue->sinr_CQI_dB;
+ // LTE_UE_ULSCH_t *ulsch = ue->ulsch[eNB_id];
+ //for the calculation of SINR_eff for CQI calculation
+ int count,a_rx,a_tx;
+ double abs_channel=0;
+ double channelx=0;
+ double channely=0;
+ double channelx_i=0;
+ double channely_i=0;
+ uint16_t q = quantize_subband_pmi(meas,eNB_id,7);
+ uint8_t qq;
+
+ switch(transmission_mode) {
+ case 1:
+ for (count=0; count<frame_parms->N_RB_DL*12; count++) {
+ for(a_tx=0; a_tx<frame_parms->nb_antenna_ports_eNB; a_tx++) {
+ for (a_rx=0; a_rx<frame_parms->nb_antennas_rx; a_rx++) {
+ s_dB[count] = 10*log10(pow(((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2],2) + pow(((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2],
+ 2)) - meas->n0_power_avg_dB;
+ }
+ }
+ }
+
+ break;
+
+ case 2:
+ for (count=0; count<frame_parms->N_RB_DL*12; count++) {
+ abs_channel=0;
+
+ for(a_tx=0; a_tx<frame_parms->nb_antenna_ports_eNB; a_tx++) {
+ for (a_rx=0; a_rx<frame_parms->nb_antennas_rx; a_rx++) {
+ abs_channel += (pow(((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2],2) + pow(((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2],2));
+ }
+ }
+
+ s_dB[count] = 10*log10(abs_channel/2) - meas->n0_power_avg_dB;
+ }
+
+ break;
+
+ case 5:
+ for (count=0; count<frame_parms->N_RB_DL*12; count++) {
+ channelx=0;
+ channely=0;
+ channelx_i=0;
+ channely_i=0;
+ qq = (q>>(((count/12)>>2)<<1))&3;
+
+ //printf("pmi_alloc %d: rb %d, pmi %d\n",q,count/12,qq);
+ for(a_tx=0; a_tx<frame_parms->nb_antenna_ports_eNB; a_tx++) {
+ for (a_rx=0; a_rx<frame_parms->nb_antennas_rx; a_rx++) {
+ switch(qq) {
+ case 0:
+ if (channelx==0 || channely==0) {
+ channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ channelx_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ } else {
+ channelx += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ channelx_i -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely_i -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ }
+
+ break;
+
+ case 1:
+ if (channelx==0 || channely==0) {
+ channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ channelx_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ } else {
+ channelx -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ channelx_i += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely_i += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ }
+
+ break;
+
+ case 2:
+ if (channelx==0 || channely==0) {
+ channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ channelx_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ } else {
+ channelx -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ channely += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channelx_i += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ channely_i -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ }
+
+ break;
+
+ case 3:
+ if (channelx==0 || channely==0) {
+ channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ channelx_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ } else {
+ channelx += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ channely -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channelx_i -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ channely_i += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ }
+
+ break;
+
+ default:
+ printf("Problem in SINR Calculation for TM5 \n");
+ break;
+ }//switch(qq)
+ }//a_rx
+ }//a_tx
+
+ s_dB[count] = 10 * log10 ((pow(channelx,2) + pow(channely,2))/2) - 10 * log10 ((pow(channelx_i,2) + pow(channely_i,2))/2) - meas->n0_power_avg_dB;
+ }//count
+
+ break;
+
+ case 6:
+ for (count=0; count<frame_parms->N_RB_DL*12; count++) {
+ channelx=0;
+ channely=0;
+ qq = (q>>(((count/12)>>2)<<1))&3;
+
+ //printf("pmi_alloc %d: rb %d, pmi %d\n",q,count/12,qq);
+ for(a_tx=0; a_tx<frame_parms->nb_antenna_ports_eNB; a_tx++) {
+ for (a_rx=0; a_rx<frame_parms->nb_antennas_rx; a_rx++) {
+ switch(qq) {
+ case 0:
+ if (channelx==0 || channely==0) {
+ channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ } else {
+ channelx += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ }
+
+ break;
+
+ case 1:
+ if (channelx==0 || channely==0) {
+ channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ } else {
+ channelx -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ }
+
+ break;
+
+ case 2:
+ if (channelx==0 || channely==0) {
+ channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ } else {
+ channelx -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ channely += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ }
+
+ break;
+
+ case 3:
+ if (channelx==0 || channely==0) {
+ channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ } else {
+ channelx += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2];
+ channely -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2];
+ }
+
+ break;
+
+ default:
+ printf("Problem in SINR Calculation for TM6 \n");
+ break;
+ }//switch(qq)
+ }//a_rx
+ }//a_tx
+
+ s_dB[count] = 10 * log10 ((pow(channelx,2) + pow(channely,2))/2) - meas->n0_power_avg_dB;
+ }//count
+
+ break;
+
+ default:
+ printf("Problem in SINR Calculation for CQI \n");
+ break;
+ }
+
+ int ii;
+ double sinr_eff = 0;
+ double sinr_eff_qpsk=0;
+ double sinr_eff_qam16=0;
+ double sinr_eff_qam64=0;
+ double x = 0;
+ double I_qpsk=0;
+ double I_qam16=0;
+ double I_qam64=0;
+ double I_qpsk_avg=0;
+ double I_qam16_avg=0;
+ double I_qam64_avg=0;
+ double qpsk_max=12.2;
+ double qam16_max=19.2;
+ double qam64_max=25.2;
+ double sinr_min = -20;
+ int offset=0;
+
+
+ for (offset = 0; offset <= 24; offset++) {
+ for(ii=0; ii<12; ii++) {
+ //x is the sinr_dB in dB
+ x = s_dB[(offset*12)+ii];
+
+ if(x<sinr_min) {
+ I_qpsk +=0;
+ I_qam16 +=0;
+ I_qam64 +=0;
+ } else {
+ if(x>qpsk_max)
+ I_qpsk += 1;
+ else
+ I_qpsk += (q_qpsk[0]*pow(x,7) + q_qpsk[1]*pow(x,6) + q_qpsk[2]*pow(x,5) + q_qpsk[3]*pow(x,4) + q_qpsk[4]*pow(x,3) + q_qpsk[5]*pow(x,2) + q_qpsk[6]*x + q_qpsk[7]);
+
+ if(x>qam16_max)
+ I_qam16 += 1;
+ else
+ I_qam16 += (q_qam16[0]*pow(x,7) + q_qam16[1]*pow(x,6) + q_qam16[2]*pow(x,5) + q_qam16[3]*pow(x,4) + q_qam16[4]*pow(x,3) + q_qam16[5]*pow(x,2) + q_qam16[6]*x + q_qam16[7]);
+
+ if(x>qam64_max)
+ I_qam64 += 1;
+ else
+ I_qam64 += (q_qam64[0]*pow(x,7) + q_qam64[1]*pow(x,6) + q_qam64[2]*pow(x,5) + q_qam64[3]*pow(x,4) + q_qam64[4]*pow(x,3) + q_qam64[5]*pow(x,2) + q_qam64[6]*x + q_qam64[7]);
+
+ }
+ }
+ }
+
+ // averaging of accumulated MI
+ I_qpsk_avg = I_qpsk/(12*frame_parms->N_RB_DL);
+ I_qam16_avg = I_qam16/(12*frame_parms->N_RB_DL);
+ I_qam64_avg = I_qam64/(12*frame_parms->N_RB_DL);
+
+ // I->SINR_effective Mapping
+
+ sinr_eff_qpsk = (p_qpsk[0]*pow(I_qpsk_avg,7) + p_qpsk[1]*pow(I_qpsk_avg,6) + p_qpsk[2]*pow(I_qpsk_avg,5) + p_qpsk[3]*pow(I_qpsk_avg,4) + p_qpsk[4]*pow(I_qpsk_avg,3) + p_qpsk[5]*pow(I_qpsk_avg,
+ 2) + p_qpsk[6]*I_qpsk_avg + p_qpsk[7]);
+
+ sinr_eff_qam16 = (p_qam16[0]*pow(I_qam16_avg,7) + p_qam16[1]*pow(I_qam16_avg,6) + p_qam16[2]*pow(I_qam16_avg,5) + p_qam16[3]*pow(I_qam16_avg,4) + p_qam16[4]*pow(I_qam16_avg,
+ 3) + p_qam16[5]*pow(I_qam16_avg,2) + p_qam16[6]*I_qam16_avg + p_qam16[7]);
+
+ sinr_eff_qam64 = (p_qam64[0]*pow(I_qam64_avg,7) + p_qam64[1]*pow(I_qam64_avg,6) + p_qam64[2]*pow(I_qam64_avg,5) + p_qam64[3]*pow(I_qam64_avg,4) + p_qam64[4]*pow(I_qam64_avg,
+ 3) + p_qam64[5]*pow(I_qam64_avg,2) + p_qam64[6]*I_qam64_avg + p_qam64[7]);
+ sinr_eff = cmax3(sinr_eff_qpsk,sinr_eff_qam16,sinr_eff_qam64);
+
+ //printf("SINR_Eff = %e\n",sinr_eff);
+
+ return(sinr_eff);
+}
+//
+
+
+
+#ifdef DEBUG_DLSCH_TOOLS
+main()
+{
+
+ int i;
+ uint8_t rah;
+ uint32_t rballoc;
+
+ generate_RIV_tables();
+
+ rah = 0;
+ rballoc = 0x1fff;
+ printf("rballoc 0 %x => %x\n",rballoc,conv_rballoc(rah,rballoc));
+ rah = 1;
+
+ rballoc = 0x1678;
+ printf("rballoc 1 %x => %x\n",rballoc,conv_rballoc(rah,rballoc));
+
+ rballoc = 0xfffc;
+ printf("rballoc 1 %x => %x\n",rballoc,conv_rballoc(rah,rballoc));
+ rballoc = 0xfffd;
+ printf("rballoc 1 %x => %x\n",rballoc,conv_rballoc(rah,rballoc));
+ rballoc = 0xffff;
+ printf("rballoc 1 %x => %x\n",rballoc,conv_rballoc(rah,rballoc));
+ rballoc = 0xfffe;
+ printf("rballoc 1 %x => %x\n",rballoc,conv_rballoc(rah,rballoc));
+}
+
+#endif
+
diff --git a/openair1/PHY/LTE_TRANSPORT/dlsch_decoding.c b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_decoding.c
similarity index 100%
rename from openair1/PHY/LTE_TRANSPORT/dlsch_decoding.c
rename to openair1/PHY/LTE_UE_TRANSPORT/dlsch_decoding.c
diff --git a/openair1/PHY/LTE_TRANSPORT/dlsch_demodulation.c b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c
similarity index 100%
rename from openair1/PHY/LTE_TRANSPORT/dlsch_demodulation.c
rename to openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c
diff --git a/openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation.c b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c
similarity index 100%
rename from openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation.c
rename to openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c
diff --git a/openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation_avx2.c b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c
similarity index 100%
rename from openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation_avx2.c
rename to openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c
diff --git a/openair1/PHY/LTE_TRANSPORT/drs_modulation.c b/openair1/PHY/LTE_UE_TRANSPORT/drs_modulation.c
similarity index 100%
rename from openair1/PHY/LTE_TRANSPORT/drs_modulation.c
rename to openair1/PHY/LTE_UE_TRANSPORT/drs_modulation.c
diff --git a/openair1/PHY/LTE_TRANSPORT/ulsch_coding.c b/openair1/PHY/LTE_UE_TRANSPORT/ulsch_coding.c
similarity index 100%
rename from openair1/PHY/LTE_TRANSPORT/ulsch_coding.c
rename to openair1/PHY/LTE_UE_TRANSPORT/ulsch_coding.c
diff --git a/openair1/PHY/LTE_TRANSPORT/ulsch_modulation.c b/openair1/PHY/LTE_UE_TRANSPORT/ulsch_modulation.c
similarity index 100%
rename from openair1/PHY/LTE_TRANSPORT/ulsch_modulation.c
rename to openair1/PHY/LTE_UE_TRANSPORT/ulsch_modulation.c
--
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