From 59f6146a35a6a9e3e0c3d6cd536778a356b2f41b Mon Sep 17 00:00:00 2001
From: kaltenbe <florian.kaltenberger@eurecom.fr>
Date: Mon, 15 Feb 2016 19:08:08 +0100
Subject: [PATCH] UE UL failure debugging
---
openair2/LAYER2/MAC/defs.h | 1 +
openair2/LAYER2/MAC/eNB_scheduler.c | 175 +++++++++---------
.../LAYER2/MAC/eNB_scheduler_primitives.c | 12 +-
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c | 18 +-
openair2/LAYER2/MAC/pre_processor.c | 26 ++-
openair2/LAYER2/openair2_proc.c | 3 +-
openair2/RRC/LITE/L2_interface.c | 9 +
openair2/RRC/LITE/proto.h | 6 +
openair2/RRC/LITE/rrc_eNB.c | 12 +-
.../CONF/enb.band7.tm1.50PRB.usrpb210.conf | 4 +-
10 files changed, 168 insertions(+), 98 deletions(-)
diff --git a/openair2/LAYER2/MAC/defs.h b/openair2/LAYER2/MAC/defs.h
index 493ecece78..79d8169839 100644
--- a/openair2/LAYER2/MAC/defs.h
+++ b/openair2/LAYER2/MAC/defs.h
@@ -742,6 +742,7 @@ typedef struct {
int32_t ul_inactivity_timer;
int32_t ul_failure_timer;
int32_t ra_pdcch_order_sent;
+ int32_t ul_out_of_sync;
} UE_sched_ctrl;
/*! \brief eNB template for the Random access information */
typedef struct {
diff --git a/openair2/LAYER2/MAC/eNB_scheduler.c b/openair2/LAYER2/MAC/eNB_scheduler.c
index d5de3bbae6..e0d2d83a73 100644
--- a/openair2/LAYER2/MAC/eNB_scheduler.c
+++ b/openair2/LAYER2/MAC/eNB_scheduler.c
@@ -98,7 +98,6 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
int CC_id,i,next_i;
UE_list_t *UE_list=&eNB_mac_inst[module_idP].UE_list;
rnti_t rnti;
- int ra_pdcch_sent=0;
void *DLSCH_dci=NULL;
int size_bits,size_bytes;
@@ -134,99 +133,99 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
}
else {
// check uplink failure
- if (UE_list->UE_sched_ctrl[i].ul_failure_timer>0) {
- LOG_I(MAC,"UE %d rnti %x: UL Failure timer %d \n",i,rnti,UE_list->UE_sched_ctrl[i].ul_failure_timer);
- if (UE_list->UE_sched_ctrl[i].ra_pdcch_order_sent == 0) {
- if (ra_pdcch_sent==0) {
- UE_list->UE_sched_ctrl[i].ra_pdcch_order_sent=1;
- ra_pdcch_sent=1;
-
- // add a format 1A dci for this UE to request an RA procedure (only one UE per subframe)
- LOG_I(MAC,"UE %d rnti %x: sending PDCCH order for RAPROC \n",i,rnti,UE_list->UE_sched_ctrl[i].ul_failure_timer);
- DLSCH_dci = (void *)UE_list->UE_template[CC_id][i].DLSCH_DCI[0];
- *(uint32_t*)DLSCH_dci = 0;
- if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
- switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
- case 6:
- ((DCI1A_1_5MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
- ((DCI1A_1_5MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 31;
- size_bytes = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
- size_bits = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
- break;
- case 25:
- ((DCI1A_5MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
- ((DCI1A_5MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 511;
- size_bytes = sizeof(DCI1A_5MHz_TDD_1_6_t);
- size_bits = sizeof_DCI1A_5MHz_TDD_1_6_t;
- break;
- case 50:
- ((DCI1A_10MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
- ((DCI1A_10MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 2047;
- size_bytes = sizeof(DCI1A_10MHz_TDD_1_6_t);
- size_bits = sizeof_DCI1A_10MHz_TDD_1_6_t;
- break;
- case 100:
- ((DCI1A_20MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
- ((DCI1A_20MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 8191;
- size_bytes = sizeof(DCI1A_20MHz_TDD_1_6_t);
- size_bits = sizeof_DCI1A_20MHz_TDD_1_6_t;
- break;
- }
+ if ((UE_list->UE_sched_ctrl[i].ul_failure_timer>0)&&
+ (UE_list->UE_sched_ctrl[i].ul_out_of_sync==0)) {
+ LOG_D(MAC,"UE %d rnti %x: UL Failure timer %d \n",i,rnti,UE_list->UE_sched_ctrl[i].ul_failure_timer);
+ if (UE_list->UE_sched_ctrl[i].ra_pdcch_order_sent==0) {
+ UE_list->UE_sched_ctrl[i].ra_pdcch_order_sent=1;
+
+ // add a format 1A dci for this UE to request an RA procedure (only one UE per subframe)
+ LOG_I(MAC,"UE %d rnti %x: sending PDCCH order for RAPROC (failure timer %d) \n",i,rnti,UE_list->UE_sched_ctrl[i].ul_failure_timer);
+ DLSCH_dci = (void *)UE_list->UE_template[CC_id][i].DLSCH_DCI[0];
+ *(uint32_t*)DLSCH_dci = 0;
+ if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
+ switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
+ case 6:
+ ((DCI1A_1_5MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
+ ((DCI1A_1_5MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 31;
+ size_bytes = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
+ size_bits = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
+ break;
+ case 25:
+ ((DCI1A_5MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
+ ((DCI1A_5MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 511;
+ size_bytes = sizeof(DCI1A_5MHz_TDD_1_6_t);
+ size_bits = sizeof_DCI1A_5MHz_TDD_1_6_t;
+ break;
+ case 50:
+ ((DCI1A_10MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
+ ((DCI1A_10MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 2047;
+ size_bytes = sizeof(DCI1A_10MHz_TDD_1_6_t);
+ size_bits = sizeof_DCI1A_10MHz_TDD_1_6_t;
+ break;
+ case 100:
+ ((DCI1A_20MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
+ ((DCI1A_20MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 8191;
+ size_bytes = sizeof(DCI1A_20MHz_TDD_1_6_t);
+ size_bits = sizeof_DCI1A_20MHz_TDD_1_6_t;
+ break;
}
- else { // FDD
- switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
- case 6:
- ((DCI1A_1_5MHz_FDD_t*)DLSCH_dci)->type = 1;
- ((DCI1A_1_5MHz_FDD_t*)DLSCH_dci)->rballoc = 31;
- size_bytes = sizeof(DCI1A_1_5MHz_FDD_t);
- size_bits = sizeof_DCI1A_1_5MHz_FDD_t;
- break;
- case 25:
- ((DCI1A_5MHz_FDD_t*)DLSCH_dci)->type = 1;
- ((DCI1A_5MHz_FDD_t*)DLSCH_dci)->rballoc = 511;
- size_bytes = sizeof(DCI1A_5MHz_FDD_t);
- size_bits = sizeof_DCI1A_5MHz_FDD_t;
- break;
- case 50:
- ((DCI1A_10MHz_FDD_t*)DLSCH_dci)->type = 1;
- ((DCI1A_10MHz_FDD_t*)DLSCH_dci)->rballoc = 2047;
- size_bytes = sizeof(DCI1A_10MHz_FDD_t);
- size_bits = sizeof_DCI1A_10MHz_FDD_t;
- break;
- case 100:
- ((DCI1A_20MHz_FDD_t*)DLSCH_dci)->type = 1;
- ((DCI1A_20MHz_FDD_t*)DLSCH_dci)->rballoc = 8191;
- size_bytes = sizeof(DCI1A_20MHz_FDD_t);
- size_bits = sizeof_DCI1A_20MHz_FDD_t;
+ }
+ else { // FDD
+ switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
+ case 6:
+ ((DCI1A_1_5MHz_FDD_t*)DLSCH_dci)->type = 1;
+ ((DCI1A_1_5MHz_FDD_t*)DLSCH_dci)->rballoc = 31;
+ size_bytes = sizeof(DCI1A_1_5MHz_FDD_t);
+ size_bits = sizeof_DCI1A_1_5MHz_FDD_t;
+ break;
+ case 25:
+ ((DCI1A_5MHz_FDD_t*)DLSCH_dci)->type = 1;
+ ((DCI1A_5MHz_FDD_t*)DLSCH_dci)->rballoc = 511;
+ size_bytes = sizeof(DCI1A_5MHz_FDD_t);
+ size_bits = sizeof_DCI1A_5MHz_FDD_t;
+ break;
+ case 50:
+ ((DCI1A_10MHz_FDD_t*)DLSCH_dci)->type = 1;
+ ((DCI1A_10MHz_FDD_t*)DLSCH_dci)->rballoc = 2047;
+ size_bytes = sizeof(DCI1A_10MHz_FDD_t);
+ size_bits = sizeof_DCI1A_10MHz_FDD_t;
break;
- }
+ case 100:
+ ((DCI1A_20MHz_FDD_t*)DLSCH_dci)->type = 1;
+ ((DCI1A_20MHz_FDD_t*)DLSCH_dci)->rballoc = 8191;
+ size_bytes = sizeof(DCI1A_20MHz_FDD_t);
+ size_bits = sizeof_DCI1A_20MHz_FDD_t;
+ break;
}
-
- add_ue_spec_dci(DCI_pdu[CC_id],
- DLSCH_dci,
- rnti,
- size_bytes,
- process_ue_cqi (module_idP,i),//aggregation,
- size_bits,
- format1A,
- 0);
- }
- else { // ra_pdcch_sent==1
- if ((UE_list->UE_sched_ctrl[i].ul_failure_timer % 40) == 0)
- UE_list->UE_sched_ctrl[i].ra_pdcch_order_sent=0; // resend every 4 frames
}
+
+ add_ue_spec_dci(DCI_pdu[CC_id],
+ DLSCH_dci,
+ rnti,
+ size_bytes,
+ process_ue_cqi (module_idP,i),//aggregation,
+ size_bits,
+ format1A,
+ 0);
}
- UE_list->UE_sched_ctrl[i].ul_failure_timer++;
- // check threshold
- if (UE_list->UE_sched_ctrl[i].ul_failure_timer > 200) {
- // inform RRC of failure and clear timer
- LOG_I(MAC,"UE %d rnti %x: UL Failure Triggering RRC \n",i,rnti,UE_list->UE_sched_ctrl[i].ul_failure_timer);
- mac_eNB_rrc_ul_failure(module_idP,CC_id,frameP,subframeP,rnti);
- UE_list->UE_sched_ctrl[i].ul_failure_timer=0;
+ else { // ra_pdcch_sent==1
+ LOG_I(MAC,"UE %d rnti %x: sent PDCCH order for RAPROC waiting (failure timer %d) \n",i,rnti,UE_list->UE_sched_ctrl[i].ul_failure_timer);
+ if ((UE_list->UE_sched_ctrl[i].ul_failure_timer % 40) == 0)
+ UE_list->UE_sched_ctrl[i].ra_pdcch_order_sent=0; // resend every 4 frames
}
- } // ul_failure_timer>0
-
- }
+ }
+ UE_list->UE_sched_ctrl[i].ul_failure_timer++;
+ // check threshold
+ if (UE_list->UE_sched_ctrl[i].ul_failure_timer > 200) {
+ // inform RRC of failure and clear timer
+ LOG_I(MAC,"UE %d rnti %x: UL Failure Triggering RRC \n",i,rnti,UE_list->UE_sched_ctrl[i].ul_failure_timer);
+ mac_eNB_rrc_ul_failure(module_idP,CC_id,frameP,subframeP,rnti);
+ UE_list->UE_sched_ctrl[i].ul_failure_timer=0;
+ UE_list->UE_sched_ctrl[i].ul_out_of_sync=1;
+ }
+ } // ul_failure_timer>0
+
i = next_i;
}
diff --git a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c
index 8c8eeff148..b3dc9defe1 100644
--- a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+++ b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c
@@ -698,6 +698,12 @@ uint8_t UE_is_to_be_scheduled(module_id_t module_idP,int CC_id,uint8_t UE_id)
UE_sched_ctrl *UE_sched_ctl = &eNB_mac_inst[module_idP].UE_list.UE_sched_ctrl[UE_id];
LOG_D(MAC,"[eNB %d][PUSCH] Checking UL requirements UE %d/%x\n",module_idP,UE_id,UE_RNTI(module_idP,UE_id));
+ // do not schedule UE if UL is not working
+ if (UE_sched_ctl->ul_failure_timer>0)
+ return(0);
+ if (UE_sched_ctl->ul_out_of_sync>0)
+ return(0);
+
if ((UE_template->bsr_info[LCGID0]>0) ||
(UE_template->bsr_info[LCGID1]>0) ||
(UE_template->bsr_info[LCGID2]>0) ||
@@ -1119,8 +1125,10 @@ void UL_failure_indication(module_id_t mod_idP, int cc_idP, frame_t frameP, rnti
UE_list_t *UE_list = &eNB_mac_inst[mod_idP].UE_list;
if (UE_id != -1) {
- LOG_I(MAC,"[eNB %d][SR %x] Frame %d subframeP %d Signaling UL Failure for UE %d on CC_id %d\n",mod_idP,rntiP,frameP,subframeP, UE_id,cc_idP);
- UE_list->UE_sched_ctrl[UE_id].ul_failure_timer=1;
+ LOG_I(MAC,"[eNB %d][UE %d/%x] Frame %d subframeP %d Signaling UL Failure for UE %d on CC_id %d (timer %d)\n",mod_idP,UE_id,rntiP,frameP,subframeP, UE_id,cc_idP,
+ UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
+ if (UE_list->UE_sched_ctrl[UE_id].ul_failure_timer == 0)
+ UE_list->UE_sched_ctrl[UE_id].ul_failure_timer=1;
} else {
// AssertFatal(0, "find_UE_id(%u,rnti %d) not found", enb_mod_idP, rntiP);
// AssertError(0, 0, "Frame %d: find_UE_id(%u,rnti %d) not found\n", frameP, enb_mod_idP, rntiP);
diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
index 42f19cc2ae..95a894f52a 100644
--- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
@@ -109,6 +109,10 @@ void rx_sdu(
if (UE_id!=-1) {
UE_list->UE_sched_ctrl[UE_id].ul_inactivity_timer=0;
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer=0;
+ if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync > 0) {
+ UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync=0;
+ mac_eNB_rrc_ul_in_sync(enb_mod_idP,CC_idP,frameP,subframeP,UE_RNTI(enb_mod_idP,UE_id));
+ }
}
payload_ptr = parse_ulsch_header(sduP,&num_ce,&num_sdu,rx_ces,rx_lcids,rx_lengths,sdu_lenP);
@@ -133,6 +137,14 @@ void rx_sdu(
case CRNTI:
UE_id = find_UE_id(enb_mod_idP,(((uint16_t)payload_ptr[0])<<8) + payload_ptr[1]);
LOG_I(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d (ce %d/%d): CRNTI %x (UE_id %d) in Msg3\n",enb_mod_idP, CC_idP, rx_ces[i], i,num_ce,(((uint16_t)payload_ptr[0])<<8) + payload_ptr[1],UE_id);
+ if (UE_id!=-1) {
+ UE_list->UE_sched_ctrl[UE_id].ul_inactivity_timer=0;
+ UE_list->UE_sched_ctrl[UE_id].ul_failure_timer=0;
+ if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync > 0) {
+ UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync=0;
+ mac_eNB_rrc_ul_in_sync(enb_mod_idP,CC_idP,frameP,subframeP,(((uint16_t)payload_ptr[0])<<8) + payload_ptr[1]);
+ }
+ }
crnti_rx=1;
payload_ptr+=2;
@@ -773,8 +785,10 @@ void schedule_ulsch_rnti(module_id_t module_idP,
if (round==0) // always schedule
#endif
{
- LOG_D(MAC,"[eNB %d][PUSCH] Frame %d subframe %d Scheduling UE %d/%x in round %d(SR %d,UE_inactivity timer %d)\n",
- module_idP,frameP,subframeP,UE_id,rnti,round,UE_template->ul_SR,UE_list->UE_sched_ctrl[UE_id].ul_inactivity_timer);
+ LOG_D(MAC,"[eNB %d][PUSCH] Frame %d subframe %d Scheduling UE %d/%x in round %d(SR %d,UL_inactivity timer %d,UL_failure timer %d)\n",
+ module_idP,frameP,subframeP,UE_id,rnti,round,UE_template->ul_SR,
+ UE_list->UE_sched_ctrl[UE_id].ul_inactivity_timer,
+ UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
// reset the scheduling request
UE_template->ul_SR = 0;
aggregation = process_ue_cqi(module_idP,UE_id); // =2 by default!!
diff --git a/openair2/LAYER2/MAC/pre_processor.c b/openair2/LAYER2/MAC/pre_processor.c
index 410d454419..dc52699eb8 100644
--- a/openair2/LAYER2/MAC/pre_processor.c
+++ b/openair2/LAYER2/MAC/pre_processor.c
@@ -319,6 +319,8 @@ void sort_UEs (module_id_t Mod_idP,
rnti1 = UE_RNTI(Mod_idP,UE_id1);
if(rnti1 == NOT_A_RNTI)
continue;
+ if (UE_list->UE_sched_ctrl[UE_id1].ul_out_of_sync == 1)
+ continue;
pCC_id1 = UE_PCCID(Mod_idP,UE_id1);
cqi1 = maxcqi(Mod_idP,UE_id1); //
round1 = maxround(Mod_idP,rnti1,frameP,subframeP,0);
@@ -327,6 +329,8 @@ void sort_UEs (module_id_t Mod_idP,
rnti2 = UE_RNTI(Mod_idP,UE_id2);
if(rnti2 == NOT_A_RNTI)
continue;
+ if (UE_list->UE_sched_ctrl[UE_id2].ul_out_of_sync == 1)
+ continue;
cqi2 = maxcqi(Mod_idP,UE_id2);
round2 = maxround(Mod_idP,rnti2,frameP,subframeP,0); //mac_xface->get_ue_active_harq_pid(Mod_id,rnti2,subframe,&harq_pid2,&round2,0);
pCC_id2 = UE_PCCID(Mod_idP,UE_id2);
@@ -453,7 +457,8 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
if(rnti == NOT_A_RNTI)
continue;
-
+ if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
+ continue;
UE_id = i;
// if there is no available harq_process, skip the UE
@@ -563,6 +568,8 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
// LOG_D(MAC,"UE %d rnti 0x\n", UE_id, rnti );
if(rnti == NOT_A_RNTI)
continue;
+ if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
+ continue;
transmission_mode = mac_xface->get_transmission_mode(Mod_id,CC_id,rnti);
// mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
@@ -607,6 +614,8 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
round2 = ue_sched_ctl2->round[CC_id];
if(rnti2 == NOT_A_RNTI)
continue;
+ if (UE_list->UE_sched_ctrl[UE_id2].ul_out_of_sync == 1)
+ continue;
eNB_UE_stats2 = mac_xface->get_eNB_UE_stats(Mod_id,CC_id,rnti2);
//mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti2,frameP,subframeP,&harq_pid2,&round2,0);
@@ -965,6 +974,9 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
if (rnti==NOT_A_RNTI)
continue;
+ if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
+ continue;
+
UE_id = i;
for (n=0; n<UE_list->numactiveULCCs[UE_id]; n++) {
@@ -1013,6 +1025,8 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
if (rnti==NOT_A_RNTI)
continue;
+ if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
+ continue;
UE_id = i;
@@ -1041,6 +1055,8 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
if (rnti==NOT_A_RNTI)
continue;
+ if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
+ continue;
UE_id = i;
@@ -1146,6 +1162,8 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
if (rnti==NOT_A_RNTI)
continue;
+ if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
+ continue;
UE_id = i;
@@ -1246,7 +1264,9 @@ void sort_ue_ul (module_id_t module_idP,int frameP, sub_frame_t subframeP)
rnti1 = UE_RNTI(module_idP,UE_id1);
if(rnti1 == NOT_A_RNTI)
- continue;
+ continue;
+ if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
+ continue;
pCCid1 = UE_PCCID(module_idP,UE_id1);
round1 = maxround(module_idP,rnti1,frameP,subframeP,1);
@@ -1256,6 +1276,8 @@ void sort_ue_ul (module_id_t module_idP,int frameP, sub_frame_t subframeP)
if(rnti2 == NOT_A_RNTI)
continue;
+ if (UE_list->UE_sched_ctrl[UE_id2].ul_out_of_sync == 1)
+ continue;
pCCid2 = UE_PCCID(module_idP,UE_id2);
round2 = maxround(module_idP,rnti2,frameP,subframeP,1);
diff --git a/openair2/LAYER2/openair2_proc.c b/openair2/LAYER2/openair2_proc.c
index 35684d239a..8e3c39f9f0 100644
--- a/openair2/LAYER2/openair2_proc.c
+++ b/openair2/LAYER2/openair2_proc.c
@@ -201,9 +201,10 @@ int dump_eNB_l2_stats(char *buffer, int length)
UE_list->eNB_UE_stats[CC_id][UE_id].avg_overhead_bytes
);
- len += sprintf(&buffer[len],"[MAC] UE %d (ULSCH), Status %d, RNTI %x : rx power (normalized %d, target %d), MCS (pre %d, post %d), RB (rx %d, retx %d, total %d), Current TBS %d \n",
+ len += sprintf(&buffer[len],"[MAC] UE %d (ULSCH), Status %d, Failute timer %d, RNTI %x : rx power (normalized %d, target %d), MCS (pre %d, post %d), RB (rx %d, retx %d, total %d), Current TBS %d \n",
UE_id,
map_int_to_str(rrc_status_names, UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status),
+ UE_list->UE_sched_ctrl[UE_id].ul_failure_timer,
UE_list->eNB_UE_stats[CC_id][UE_id].crnti,
UE_list->eNB_UE_stats[CC_id][UE_id].normalized_rx_power,
UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power,
diff --git a/openair2/RRC/LITE/L2_interface.c b/openair2/RRC/LITE/L2_interface.c
index cea9640275..7a4a69e2d2 100644
--- a/openair2/RRC/LITE/L2_interface.c
+++ b/openair2/RRC/LITE/L2_interface.c
@@ -723,6 +723,15 @@ void mac_eNB_rrc_ul_failure(const module_id_t Mod_instP,
return;
}
+
+void mac_eNB_rrc_ul_in_sync(const module_id_t Mod_instP,
+ const int CC_id,
+ const frame_t frameP,
+ const sub_frame_t subframeP,
+ const rnti_t rnti) {
+
+ return;
+}
//------------------------------------------------------------------------------
int
mac_UE_get_rrc_status(
diff --git a/openair2/RRC/LITE/proto.h b/openair2/RRC/LITE/proto.h
index cde0643ee1..920d4d85f3 100644
--- a/openair2/RRC/LITE/proto.h
+++ b/openair2/RRC/LITE/proto.h
@@ -316,6 +316,12 @@ void mac_eNB_rrc_ul_failure(const module_id_t Mod_instP,
const sub_frame_t subframeP,
const rnti_t rnti);
+void mac_eNB_rrc_ul_in_sync(const module_id_t Mod_instP,
+ const int CC_id,
+ const frame_t frameP,
+ const sub_frame_t subframeP,
+ const rnti_t rnti);
+
uint8_t
rrc_data_req(
const protocol_ctxt_t* const ctxt_pP,
diff --git a/openair2/RRC/LITE/rrc_eNB.c b/openair2/RRC/LITE/rrc_eNB.c
index da1b07e25b..befdc32c63 100644
--- a/openair2/RRC/LITE/rrc_eNB.c
+++ b/openair2/RRC/LITE/rrc_eNB.c
@@ -567,10 +567,20 @@ rrc_eNB_ue_context_stmsi_exist(
{
struct rrc_eNB_ue_context_s* ue_context_p = NULL;
RB_FOREACH(ue_context_p, rrc_ue_tree_s, &(eNB_rrc_inst[ctxt_pP->module_id].rrc_ue_head)) {
- if (ue_context_p->ue_context.Initialue_identity_s_TMSI.presence == TRUE)
+ LOG_I(RRC,"checking for UE S-TMSI %x, mme %x (%p): rnti %x",
+ m_tmsiP, mme_codeP, ue_context_p,
+ ue_context_p->ue_context.rnti);
+ if (ue_context_p->ue_context.Initialue_identity_s_TMSI.presence == TRUE) {
+ printf("S-TMSI %x, MME %x\n",
+ ue_context_p->ue_context.Initialue_identity_s_TMSI.m_tmsi,
+ ue_context_p->ue_context.Initialue_identity_s_TMSI.mme_code);
if (ue_context_p->ue_context.Initialue_identity_s_TMSI.m_tmsi == m_tmsiP)
if (ue_context_p->ue_context.Initialue_identity_s_TMSI.mme_code == mme_codeP)
return ue_context_p;
+ }
+ else
+ printf("\n");
+
}
return NULL;
}
diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.50PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.50PRB.usrpb210.conf
index d81099533a..2ce9598129 100644
--- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.50PRB.usrpb210.conf
+++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.50PRB.usrpb210.conf
@@ -140,10 +140,10 @@ eNBs =
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
- ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.213/24";
+ ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.215/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
- ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.213/24";
+ ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.215/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
--
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